1 /*
2 * Copyright © 2014-2015 Broadcom
3 * Copyright © 2021 Google
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
22 * IN THE SOFTWARE.
23 */
24
25 #include "nir_builder.h"
26
27 void
nir_builder_init(nir_builder * build,nir_function_impl * impl)28 nir_builder_init(nir_builder *build, nir_function_impl *impl)
29 {
30 memset(build, 0, sizeof(*build));
31 build->exact = false;
32 build->impl = impl;
33 build->shader = impl->function->shader;
34 }
35
36 nir_builder MUST_CHECK PRINTFLIKE(3, 4)
nir_builder_init_simple_shader(gl_shader_stage stage,const nir_shader_compiler_options * options,const char * name,...)37 nir_builder_init_simple_shader(gl_shader_stage stage,
38 const nir_shader_compiler_options *options,
39 const char *name, ...)
40 {
41 nir_builder b;
42
43 memset(&b, 0, sizeof(b));
44 b.shader = nir_shader_create(NULL, stage, options, NULL);
45
46 if (name) {
47 va_list args;
48 va_start(args, name);
49 b.shader->info.name = ralloc_vasprintf(b.shader, name, args);
50 va_end(args);
51 }
52
53 nir_function *func = nir_function_create(b.shader, "main");
54 func->is_entrypoint = true;
55 b.exact = false;
56 b.impl = nir_function_impl_create(func);
57 b.cursor = nir_after_cf_list(&b.impl->body);
58
59 /* Simple shaders are typically internal, e.g. blit shaders */
60 b.shader->info.internal = true;
61
62 return b;
63 }
64
65 nir_ssa_def *
nir_builder_alu_instr_finish_and_insert(nir_builder * build,nir_alu_instr * instr)66 nir_builder_alu_instr_finish_and_insert(nir_builder *build, nir_alu_instr *instr)
67 {
68 const nir_op_info *op_info = &nir_op_infos[instr->op];
69
70 instr->exact = build->exact;
71
72 /* Guess the number of components the destination temporary should have
73 * based on our input sizes, if it's not fixed for the op.
74 */
75 unsigned num_components = op_info->output_size;
76 if (num_components == 0) {
77 for (unsigned i = 0; i < op_info->num_inputs; i++) {
78 if (op_info->input_sizes[i] == 0)
79 num_components = MAX2(num_components,
80 instr->src[i].src.ssa->num_components);
81 }
82 }
83 assert(num_components != 0);
84
85 /* Figure out the bitwidth based on the source bitwidth if the instruction
86 * is variable-width.
87 */
88 unsigned bit_size = nir_alu_type_get_type_size(op_info->output_type);
89 if (bit_size == 0) {
90 for (unsigned i = 0; i < op_info->num_inputs; i++) {
91 unsigned src_bit_size = instr->src[i].src.ssa->bit_size;
92 if (nir_alu_type_get_type_size(op_info->input_types[i]) == 0) {
93 if (bit_size)
94 assert(src_bit_size == bit_size);
95 else
96 bit_size = src_bit_size;
97 } else {
98 assert(src_bit_size ==
99 nir_alu_type_get_type_size(op_info->input_types[i]));
100 }
101 }
102 }
103
104 /* When in doubt, assume 32. */
105 if (bit_size == 0)
106 bit_size = 32;
107
108 /* Make sure we don't swizzle from outside of our source vector (like if a
109 * scalar value was passed into a multiply with a vector).
110 */
111 for (unsigned i = 0; i < op_info->num_inputs; i++) {
112 for (unsigned j = instr->src[i].src.ssa->num_components;
113 j < NIR_MAX_VEC_COMPONENTS; j++) {
114 instr->src[i].swizzle[j] = instr->src[i].src.ssa->num_components - 1;
115 }
116 }
117
118 nir_ssa_dest_init(&instr->instr, &instr->dest.dest, num_components,
119 bit_size, NULL);
120 instr->dest.write_mask = (1 << num_components) - 1;
121
122 nir_builder_instr_insert(build, &instr->instr);
123
124 return &instr->dest.dest.ssa;
125 }
126
127 nir_ssa_def *
nir_build_alu(nir_builder * build,nir_op op,nir_ssa_def * src0,nir_ssa_def * src1,nir_ssa_def * src2,nir_ssa_def * src3)128 nir_build_alu(nir_builder *build, nir_op op, nir_ssa_def *src0,
129 nir_ssa_def *src1, nir_ssa_def *src2, nir_ssa_def *src3)
130 {
131 nir_alu_instr *instr = nir_alu_instr_create(build->shader, op);
132 if (!instr)
133 return NULL;
134
135 instr->src[0].src = nir_src_for_ssa(src0);
136 if (src1)
137 instr->src[1].src = nir_src_for_ssa(src1);
138 if (src2)
139 instr->src[2].src = nir_src_for_ssa(src2);
140 if (src3)
141 instr->src[3].src = nir_src_for_ssa(src3);
142
143 return nir_builder_alu_instr_finish_and_insert(build, instr);
144 }
145
146 nir_ssa_def *
nir_build_alu1(nir_builder * build,nir_op op,nir_ssa_def * src0)147 nir_build_alu1(nir_builder *build, nir_op op, nir_ssa_def *src0)
148 {
149 nir_alu_instr *instr = nir_alu_instr_create(build->shader, op);
150 if (!instr)
151 return NULL;
152
153 instr->src[0].src = nir_src_for_ssa(src0);
154
155 return nir_builder_alu_instr_finish_and_insert(build, instr);
156 }
157
158 nir_ssa_def *
nir_build_alu2(nir_builder * build,nir_op op,nir_ssa_def * src0,nir_ssa_def * src1)159 nir_build_alu2(nir_builder *build, nir_op op, nir_ssa_def *src0,
160 nir_ssa_def *src1)
161 {
162 nir_alu_instr *instr = nir_alu_instr_create(build->shader, op);
163 if (!instr)
164 return NULL;
165
166 instr->src[0].src = nir_src_for_ssa(src0);
167 instr->src[1].src = nir_src_for_ssa(src1);
168
169 return nir_builder_alu_instr_finish_and_insert(build, instr);
170 }
171
172 nir_ssa_def *
nir_build_alu3(nir_builder * build,nir_op op,nir_ssa_def * src0,nir_ssa_def * src1,nir_ssa_def * src2)173 nir_build_alu3(nir_builder *build, nir_op op, nir_ssa_def *src0,
174 nir_ssa_def *src1, nir_ssa_def *src2)
175 {
176 nir_alu_instr *instr = nir_alu_instr_create(build->shader, op);
177 if (!instr)
178 return NULL;
179
180 instr->src[0].src = nir_src_for_ssa(src0);
181 instr->src[1].src = nir_src_for_ssa(src1);
182 instr->src[2].src = nir_src_for_ssa(src2);
183
184 return nir_builder_alu_instr_finish_and_insert(build, instr);
185 }
186
187 nir_ssa_def *
nir_build_alu4(nir_builder * build,nir_op op,nir_ssa_def * src0,nir_ssa_def * src1,nir_ssa_def * src2,nir_ssa_def * src3)188 nir_build_alu4(nir_builder *build, nir_op op, nir_ssa_def *src0,
189 nir_ssa_def *src1, nir_ssa_def *src2, nir_ssa_def *src3)
190 {
191 nir_alu_instr *instr = nir_alu_instr_create(build->shader, op);
192 if (!instr)
193 return NULL;
194
195 instr->src[0].src = nir_src_for_ssa(src0);
196 instr->src[1].src = nir_src_for_ssa(src1);
197 instr->src[2].src = nir_src_for_ssa(src2);
198 instr->src[3].src = nir_src_for_ssa(src3);
199
200 return nir_builder_alu_instr_finish_and_insert(build, instr);
201 }
202
203 /* for the couple special cases with more than 4 src args: */
204 nir_ssa_def *
nir_build_alu_src_arr(nir_builder * build,nir_op op,nir_ssa_def ** srcs)205 nir_build_alu_src_arr(nir_builder *build, nir_op op, nir_ssa_def **srcs)
206 {
207 const nir_op_info *op_info = &nir_op_infos[op];
208 nir_alu_instr *instr = nir_alu_instr_create(build->shader, op);
209 if (!instr)
210 return NULL;
211
212 for (unsigned i = 0; i < op_info->num_inputs; i++)
213 instr->src[i].src = nir_src_for_ssa(srcs[i]);
214
215 return nir_builder_alu_instr_finish_and_insert(build, instr);
216 }
217
218 nir_ssa_def *
nir_vec_scalars(nir_builder * build,nir_ssa_scalar * comp,unsigned num_components)219 nir_vec_scalars(nir_builder *build, nir_ssa_scalar *comp, unsigned num_components)
220 {
221 nir_op op = nir_op_vec(num_components);
222 nir_alu_instr *instr = nir_alu_instr_create(build->shader, op);
223 if (!instr)
224 return NULL;
225
226 for (unsigned i = 0; i < num_components; i++) {
227 instr->src[i].src = nir_src_for_ssa(comp[i].def);
228 instr->src[i].swizzle[0] = comp[i].comp;
229 }
230 instr->exact = build->exact;
231
232 /* Note: not reusing nir_builder_alu_instr_finish_and_insert() because it
233 * can't re-guess the num_components when num_components == 1 (nir_op_mov).
234 */
235 nir_ssa_dest_init(&instr->instr, &instr->dest.dest, num_components,
236 comp[0].def->bit_size, NULL);
237 instr->dest.write_mask = (1 << num_components) - 1;
238
239 nir_builder_instr_insert(build, &instr->instr);
240
241 return &instr->dest.dest.ssa;
242 }
243
244 /**
245 * Turns a nir_src into a nir_ssa_def * so it can be passed to
246 * nir_build_alu()-based builder calls.
247 *
248 * See nir_ssa_for_alu_src() for alu instructions.
249 */
250 nir_ssa_def *
nir_ssa_for_src(nir_builder * build,nir_src src,int num_components)251 nir_ssa_for_src(nir_builder *build, nir_src src, int num_components)
252 {
253 if (src.is_ssa && src.ssa->num_components == num_components)
254 return src.ssa;
255
256 assert((unsigned)num_components <= nir_src_num_components(src));
257
258 nir_alu_src alu = { NIR_SRC_INIT };
259 alu.src = src;
260 for (int j = 0; j < NIR_MAX_VEC_COMPONENTS; j++)
261 alu.swizzle[j] = j;
262
263 return nir_mov_alu(build, alu, num_components);
264 }
265
266 /**
267 * Similar to nir_ssa_for_src(), but for alu srcs, respecting the
268 * nir_alu_src's swizzle.
269 */
270 nir_ssa_def *
nir_ssa_for_alu_src(nir_builder * build,nir_alu_instr * instr,unsigned srcn)271 nir_ssa_for_alu_src(nir_builder *build, nir_alu_instr *instr, unsigned srcn)
272 {
273 if (nir_alu_src_is_trivial_ssa(instr, srcn))
274 return instr->src[srcn].src.ssa;
275
276 nir_alu_src *src = &instr->src[srcn];
277 unsigned num_components = nir_ssa_alu_instr_src_components(instr, srcn);
278 return nir_mov_alu(build, *src, num_components);
279 }
280
281 /* Generic builder for system values. */
282 nir_ssa_def *
nir_load_system_value(nir_builder * build,nir_intrinsic_op op,int index,unsigned num_components,unsigned bit_size)283 nir_load_system_value(nir_builder *build, nir_intrinsic_op op, int index,
284 unsigned num_components, unsigned bit_size)
285 {
286 nir_intrinsic_instr *load = nir_intrinsic_instr_create(build->shader, op);
287 if (nir_intrinsic_infos[op].dest_components > 0)
288 assert(num_components == nir_intrinsic_infos[op].dest_components);
289 else
290 load->num_components = num_components;
291 load->const_index[0] = index;
292
293 nir_ssa_dest_init(&load->instr, &load->dest,
294 num_components, bit_size, NULL);
295 nir_builder_instr_insert(build, &load->instr);
296 return &load->dest.ssa;
297 }
298
299 void
nir_builder_instr_insert(nir_builder * build,nir_instr * instr)300 nir_builder_instr_insert(nir_builder *build, nir_instr *instr)
301 {
302 nir_instr_insert(build->cursor, instr);
303
304 if (build->update_divergence)
305 nir_update_instr_divergence(build->shader, instr);
306
307 /* Move the cursor forward. */
308 build->cursor = nir_after_instr(instr);
309 }
310
311 void
nir_builder_cf_insert(nir_builder * build,nir_cf_node * cf)312 nir_builder_cf_insert(nir_builder *build, nir_cf_node *cf)
313 {
314 nir_cf_node_insert(build->cursor, cf);
315 }
316
317 bool
nir_builder_is_inside_cf(nir_builder * build,nir_cf_node * cf_node)318 nir_builder_is_inside_cf(nir_builder *build, nir_cf_node *cf_node)
319 {
320 nir_block *block = nir_cursor_current_block(build->cursor);
321 for (nir_cf_node *n = &block->cf_node; n; n = n->parent) {
322 if (n == cf_node)
323 return true;
324 }
325 return false;
326 }
327
328 nir_if *
nir_push_if_src(nir_builder * build,nir_src condition)329 nir_push_if_src(nir_builder *build, nir_src condition)
330 {
331 nir_if *nif = nir_if_create(build->shader);
332 nif->condition = condition;
333 nir_builder_cf_insert(build, &nif->cf_node);
334 build->cursor = nir_before_cf_list(&nif->then_list);
335 return nif;
336 }
337
338 nir_if *
nir_push_if(nir_builder * build,nir_ssa_def * condition)339 nir_push_if(nir_builder *build, nir_ssa_def *condition)
340 {
341 return nir_push_if_src(build, nir_src_for_ssa(condition));
342 }
343
344 nir_if *
nir_push_else(nir_builder * build,nir_if * nif)345 nir_push_else(nir_builder *build, nir_if *nif)
346 {
347 if (nif) {
348 assert(nir_builder_is_inside_cf(build, &nif->cf_node));
349 } else {
350 nir_block *block = nir_cursor_current_block(build->cursor);
351 nif = nir_cf_node_as_if(block->cf_node.parent);
352 }
353 build->cursor = nir_before_cf_list(&nif->else_list);
354 return nif;
355 }
356
357 void
nir_pop_if(nir_builder * build,nir_if * nif)358 nir_pop_if(nir_builder *build, nir_if *nif)
359 {
360 if (nif) {
361 assert(nir_builder_is_inside_cf(build, &nif->cf_node));
362 } else {
363 nir_block *block = nir_cursor_current_block(build->cursor);
364 nif = nir_cf_node_as_if(block->cf_node.parent);
365 }
366 build->cursor = nir_after_cf_node(&nif->cf_node);
367 }
368
369 nir_ssa_def *
nir_if_phi(nir_builder * build,nir_ssa_def * then_def,nir_ssa_def * else_def)370 nir_if_phi(nir_builder *build, nir_ssa_def *then_def, nir_ssa_def *else_def)
371 {
372 nir_block *block = nir_cursor_current_block(build->cursor);
373 nir_if *nif = nir_cf_node_as_if(nir_cf_node_prev(&block->cf_node));
374
375 nir_phi_instr *phi = nir_phi_instr_create(build->shader);
376 nir_phi_instr_add_src(phi, nir_if_last_then_block(nif), nir_src_for_ssa(then_def));
377 nir_phi_instr_add_src(phi, nir_if_last_else_block(nif), nir_src_for_ssa(else_def));
378
379 assert(then_def->num_components == else_def->num_components);
380 assert(then_def->bit_size == else_def->bit_size);
381 nir_ssa_dest_init(&phi->instr, &phi->dest,
382 then_def->num_components, then_def->bit_size, NULL);
383
384 nir_builder_instr_insert(build, &phi->instr);
385
386 return &phi->dest.ssa;
387 }
388
389 nir_loop *
nir_push_loop(nir_builder * build)390 nir_push_loop(nir_builder *build)
391 {
392 nir_loop *loop = nir_loop_create(build->shader);
393 nir_builder_cf_insert(build, &loop->cf_node);
394 build->cursor = nir_before_cf_list(&loop->body);
395 return loop;
396 }
397
398 void
nir_pop_loop(nir_builder * build,nir_loop * loop)399 nir_pop_loop(nir_builder *build, nir_loop *loop)
400 {
401 if (loop) {
402 assert(nir_builder_is_inside_cf(build, &loop->cf_node));
403 } else {
404 nir_block *block = nir_cursor_current_block(build->cursor);
405 loop = nir_cf_node_as_loop(block->cf_node.parent);
406 }
407 build->cursor = nir_after_cf_node(&loop->cf_node);
408 }
409
410 nir_ssa_def *
nir_compare_func(nir_builder * b,enum compare_func func,nir_ssa_def * src0,nir_ssa_def * src1)411 nir_compare_func(nir_builder *b, enum compare_func func,
412 nir_ssa_def *src0, nir_ssa_def *src1)
413 {
414 switch (func) {
415 case COMPARE_FUNC_NEVER:
416 return nir_imm_int(b, 0);
417 case COMPARE_FUNC_ALWAYS:
418 return nir_imm_int(b, ~0);
419 case COMPARE_FUNC_EQUAL:
420 return nir_feq(b, src0, src1);
421 case COMPARE_FUNC_NOTEQUAL:
422 return nir_fneu(b, src0, src1);
423 case COMPARE_FUNC_GREATER:
424 return nir_flt(b, src1, src0);
425 case COMPARE_FUNC_GEQUAL:
426 return nir_fge(b, src0, src1);
427 case COMPARE_FUNC_LESS:
428 return nir_flt(b, src0, src1);
429 case COMPARE_FUNC_LEQUAL:
430 return nir_fge(b, src1, src0);
431 }
432 unreachable("bad compare func");
433 }
434
435 nir_ssa_def *
nir_type_convert(nir_builder * b,nir_ssa_def * src,nir_alu_type src_type,nir_alu_type dest_type)436 nir_type_convert(nir_builder *b,
437 nir_ssa_def *src,
438 nir_alu_type src_type,
439 nir_alu_type dest_type)
440 {
441 assert(nir_alu_type_get_type_size(src_type) == 0 ||
442 nir_alu_type_get_type_size(src_type) == src->bit_size);
443
444 src_type = (nir_alu_type) (src_type | src->bit_size);
445
446 nir_op opcode =
447 nir_type_conversion_op(src_type, dest_type, nir_rounding_mode_undef);
448
449 return nir_build_alu(b, opcode, src, NULL, NULL, NULL);
450 }
451
452 nir_ssa_def *
nir_gen_rect_vertices(nir_builder * b,nir_ssa_def * z,nir_ssa_def * w)453 nir_gen_rect_vertices(nir_builder *b, nir_ssa_def *z, nir_ssa_def *w)
454 {
455 if (!z)
456 z = nir_imm_float(b, 0.0);
457 if (!w)
458 w = nir_imm_float(b, 1.0);
459
460 nir_ssa_def *vertex_id;
461 if (b->shader->options->vertex_id_zero_based)
462 vertex_id = nir_load_vertex_id_zero_base(b);
463 else
464 vertex_id = nir_load_vertex_id(b);
465
466 /* vertex 0: -1.0, -1.0
467 * vertex 1: -1.0, 1.0
468 * vertex 2: 1.0, -1.0
469 * vertex 3: 1.0, 1.0
470 *
471 * so:
472 *
473 * channel 0 is vertex_id < 2 ? -1.0 : 1.0
474 * channel 1 is vertex_id & 1 ? 1.0 : -1.0
475 */
476
477 nir_ssa_def *c0cmp = nir_ilt(b, vertex_id, nir_imm_int(b, 2));
478 nir_ssa_def *c1cmp = nir_test_mask(b, vertex_id, 1);
479
480 nir_ssa_def *comp[4];
481 comp[0] = nir_bcsel(b, c0cmp, nir_imm_float(b, -1.0), nir_imm_float(b, 1.0));
482 comp[1] = nir_bcsel(b, c1cmp, nir_imm_float(b, 1.0), nir_imm_float(b, -1.0));
483 comp[2] = z;
484 comp[3] = w;
485
486 return nir_vec(b, comp, 4);
487 }
488