1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * QLogic Fibre Channel HBA Driver
4 * Copyright (c) 2003-2014 QLogic Corporation
5 */
6 #include "qla_def.h"
7 #include "qla_target.h"
8
9 #include <linux/delay.h>
10 #include <linux/slab.h>
11 #include <linux/cpu.h>
12 #include <linux/t10-pi.h>
13 #include <scsi/scsi_tcq.h>
14 #include <scsi/scsi_bsg_fc.h>
15 #include <scsi/scsi_eh.h>
16 #include <scsi/fc/fc_fs.h>
17 #include <linux/nvme-fc-driver.h>
18
19 static void qla2x00_mbx_completion(scsi_qla_host_t *, uint16_t);
20 static void qla2x00_status_entry(scsi_qla_host_t *, struct rsp_que *, void *);
21 static void qla2x00_status_cont_entry(struct rsp_que *, sts_cont_entry_t *);
22 static int qla2x00_error_entry(scsi_qla_host_t *, struct rsp_que *,
23 sts_entry_t *);
24 static void qla27xx_process_purex_fpin(struct scsi_qla_host *vha,
25 struct purex_item *item);
26 static struct purex_item *qla24xx_alloc_purex_item(scsi_qla_host_t *vha,
27 uint16_t size);
28 static struct purex_item *qla24xx_copy_std_pkt(struct scsi_qla_host *vha,
29 void *pkt);
30 static struct purex_item *qla27xx_copy_fpin_pkt(struct scsi_qla_host *vha,
31 void **pkt, struct rsp_que **rsp);
32
33 static void
qla27xx_process_purex_fpin(struct scsi_qla_host * vha,struct purex_item * item)34 qla27xx_process_purex_fpin(struct scsi_qla_host *vha, struct purex_item *item)
35 {
36 void *pkt = &item->iocb;
37 uint16_t pkt_size = item->size;
38
39 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x508d,
40 "%s: Enter\n", __func__);
41
42 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x508e,
43 "-------- ELS REQ -------\n");
44 ql_dump_buffer(ql_dbg_init + ql_dbg_verbose, vha, 0x508f,
45 pkt, pkt_size);
46
47 fc_host_fpin_rcv(vha->host, pkt_size, (char *)pkt);
48 }
49
50 const char *const port_state_str[] = {
51 "Unknown",
52 "UNCONFIGURED",
53 "DEAD",
54 "LOST",
55 "ONLINE"
56 };
57
58 static void
qla24xx_process_abts(struct scsi_qla_host * vha,struct purex_item * pkt)59 qla24xx_process_abts(struct scsi_qla_host *vha, struct purex_item *pkt)
60 {
61 struct abts_entry_24xx *abts =
62 (struct abts_entry_24xx *)&pkt->iocb;
63 struct qla_hw_data *ha = vha->hw;
64 struct els_entry_24xx *rsp_els;
65 struct abts_entry_24xx *abts_rsp;
66 dma_addr_t dma;
67 uint32_t fctl;
68 int rval;
69
70 ql_dbg(ql_dbg_init, vha, 0x0286, "%s: entered.\n", __func__);
71
72 ql_log(ql_log_warn, vha, 0x0287,
73 "Processing ABTS xchg=%#x oxid=%#x rxid=%#x seqid=%#x seqcnt=%#x\n",
74 abts->rx_xch_addr_to_abort, abts->ox_id, abts->rx_id,
75 abts->seq_id, abts->seq_cnt);
76 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x0287,
77 "-------- ABTS RCV -------\n");
78 ql_dump_buffer(ql_dbg_init + ql_dbg_verbose, vha, 0x0287,
79 (uint8_t *)abts, sizeof(*abts));
80
81 rsp_els = dma_alloc_coherent(&ha->pdev->dev, sizeof(*rsp_els), &dma,
82 GFP_KERNEL);
83 if (!rsp_els) {
84 ql_log(ql_log_warn, vha, 0x0287,
85 "Failed allocate dma buffer ABTS/ELS RSP.\n");
86 return;
87 }
88
89 /* terminate exchange */
90 rsp_els->entry_type = ELS_IOCB_TYPE;
91 rsp_els->entry_count = 1;
92 rsp_els->nport_handle = cpu_to_le16(~0);
93 rsp_els->rx_xchg_address = abts->rx_xch_addr_to_abort;
94 rsp_els->control_flags = cpu_to_le16(EPD_RX_XCHG);
95 ql_dbg(ql_dbg_init, vha, 0x0283,
96 "Sending ELS Response to terminate exchange %#x...\n",
97 abts->rx_xch_addr_to_abort);
98 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x0283,
99 "-------- ELS RSP -------\n");
100 ql_dump_buffer(ql_dbg_init + ql_dbg_verbose, vha, 0x0283,
101 (uint8_t *)rsp_els, sizeof(*rsp_els));
102 rval = qla2x00_issue_iocb(vha, rsp_els, dma, 0);
103 if (rval) {
104 ql_log(ql_log_warn, vha, 0x0288,
105 "%s: iocb failed to execute -> %x\n", __func__, rval);
106 } else if (rsp_els->comp_status) {
107 ql_log(ql_log_warn, vha, 0x0289,
108 "%s: iocb failed to complete -> completion=%#x subcode=(%#x,%#x)\n",
109 __func__, rsp_els->comp_status,
110 rsp_els->error_subcode_1, rsp_els->error_subcode_2);
111 } else {
112 ql_dbg(ql_dbg_init, vha, 0x028a,
113 "%s: abort exchange done.\n", __func__);
114 }
115
116 /* send ABTS response */
117 abts_rsp = (void *)rsp_els;
118 memset(abts_rsp, 0, sizeof(*abts_rsp));
119 abts_rsp->entry_type = ABTS_RSP_TYPE;
120 abts_rsp->entry_count = 1;
121 abts_rsp->nport_handle = abts->nport_handle;
122 abts_rsp->vp_idx = abts->vp_idx;
123 abts_rsp->sof_type = abts->sof_type & 0xf0;
124 abts_rsp->rx_xch_addr = abts->rx_xch_addr;
125 abts_rsp->d_id[0] = abts->s_id[0];
126 abts_rsp->d_id[1] = abts->s_id[1];
127 abts_rsp->d_id[2] = abts->s_id[2];
128 abts_rsp->r_ctl = FC_ROUTING_BLD | FC_R_CTL_BLD_BA_ACC;
129 abts_rsp->s_id[0] = abts->d_id[0];
130 abts_rsp->s_id[1] = abts->d_id[1];
131 abts_rsp->s_id[2] = abts->d_id[2];
132 abts_rsp->cs_ctl = abts->cs_ctl;
133 /* include flipping bit23 in fctl */
134 fctl = ~(abts->f_ctl[2] | 0x7F) << 16 |
135 FC_F_CTL_LAST_SEQ | FC_F_CTL_END_SEQ | FC_F_CTL_SEQ_INIT;
136 abts_rsp->f_ctl[0] = fctl >> 0 & 0xff;
137 abts_rsp->f_ctl[1] = fctl >> 8 & 0xff;
138 abts_rsp->f_ctl[2] = fctl >> 16 & 0xff;
139 abts_rsp->type = FC_TYPE_BLD;
140 abts_rsp->rx_id = abts->rx_id;
141 abts_rsp->ox_id = abts->ox_id;
142 abts_rsp->payload.ba_acc.aborted_rx_id = abts->rx_id;
143 abts_rsp->payload.ba_acc.aborted_ox_id = abts->ox_id;
144 abts_rsp->payload.ba_acc.high_seq_cnt = cpu_to_le16(~0);
145 abts_rsp->rx_xch_addr_to_abort = abts->rx_xch_addr_to_abort;
146 ql_dbg(ql_dbg_init, vha, 0x028b,
147 "Sending BA ACC response to ABTS %#x...\n",
148 abts->rx_xch_addr_to_abort);
149 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x028b,
150 "-------- ELS RSP -------\n");
151 ql_dump_buffer(ql_dbg_init + ql_dbg_verbose, vha, 0x028b,
152 (uint8_t *)abts_rsp, sizeof(*abts_rsp));
153 rval = qla2x00_issue_iocb(vha, abts_rsp, dma, 0);
154 if (rval) {
155 ql_log(ql_log_warn, vha, 0x028c,
156 "%s: iocb failed to execute -> %x\n", __func__, rval);
157 } else if (abts_rsp->comp_status) {
158 ql_log(ql_log_warn, vha, 0x028d,
159 "%s: iocb failed to complete -> completion=%#x subcode=(%#x,%#x)\n",
160 __func__, abts_rsp->comp_status,
161 abts_rsp->payload.error.subcode1,
162 abts_rsp->payload.error.subcode2);
163 } else {
164 ql_dbg(ql_dbg_init, vha, 0x028ea,
165 "%s: done.\n", __func__);
166 }
167
168 dma_free_coherent(&ha->pdev->dev, sizeof(*rsp_els), rsp_els, dma);
169 }
170
171 /**
172 * qla2100_intr_handler() - Process interrupts for the ISP2100 and ISP2200.
173 * @irq: interrupt number
174 * @dev_id: SCSI driver HA context
175 *
176 * Called by system whenever the host adapter generates an interrupt.
177 *
178 * Returns handled flag.
179 */
180 irqreturn_t
qla2100_intr_handler(int irq,void * dev_id)181 qla2100_intr_handler(int irq, void *dev_id)
182 {
183 scsi_qla_host_t *vha;
184 struct qla_hw_data *ha;
185 struct device_reg_2xxx __iomem *reg;
186 int status;
187 unsigned long iter;
188 uint16_t hccr;
189 uint16_t mb[8];
190 struct rsp_que *rsp;
191 unsigned long flags;
192
193 rsp = (struct rsp_que *) dev_id;
194 if (!rsp) {
195 ql_log(ql_log_info, NULL, 0x505d,
196 "%s: NULL response queue pointer.\n", __func__);
197 return (IRQ_NONE);
198 }
199
200 ha = rsp->hw;
201 reg = &ha->iobase->isp;
202 status = 0;
203
204 spin_lock_irqsave(&ha->hardware_lock, flags);
205 vha = pci_get_drvdata(ha->pdev);
206 for (iter = 50; iter--; ) {
207 hccr = rd_reg_word(®->hccr);
208 if (qla2x00_check_reg16_for_disconnect(vha, hccr))
209 break;
210 if (hccr & HCCR_RISC_PAUSE) {
211 if (pci_channel_offline(ha->pdev))
212 break;
213
214 /*
215 * Issue a "HARD" reset in order for the RISC interrupt
216 * bit to be cleared. Schedule a big hammer to get
217 * out of the RISC PAUSED state.
218 */
219 wrt_reg_word(®->hccr, HCCR_RESET_RISC);
220 rd_reg_word(®->hccr);
221
222 ha->isp_ops->fw_dump(vha);
223 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
224 break;
225 } else if ((rd_reg_word(®->istatus) & ISR_RISC_INT) == 0)
226 break;
227
228 if (rd_reg_word(®->semaphore) & BIT_0) {
229 wrt_reg_word(®->hccr, HCCR_CLR_RISC_INT);
230 rd_reg_word(®->hccr);
231
232 /* Get mailbox data. */
233 mb[0] = RD_MAILBOX_REG(ha, reg, 0);
234 if (mb[0] > 0x3fff && mb[0] < 0x8000) {
235 qla2x00_mbx_completion(vha, mb[0]);
236 status |= MBX_INTERRUPT;
237 } else if (mb[0] > 0x7fff && mb[0] < 0xc000) {
238 mb[1] = RD_MAILBOX_REG(ha, reg, 1);
239 mb[2] = RD_MAILBOX_REG(ha, reg, 2);
240 mb[3] = RD_MAILBOX_REG(ha, reg, 3);
241 qla2x00_async_event(vha, rsp, mb);
242 } else {
243 /*EMPTY*/
244 ql_dbg(ql_dbg_async, vha, 0x5025,
245 "Unrecognized interrupt type (%d).\n",
246 mb[0]);
247 }
248 /* Release mailbox registers. */
249 wrt_reg_word(®->semaphore, 0);
250 rd_reg_word(®->semaphore);
251 } else {
252 qla2x00_process_response_queue(rsp);
253
254 wrt_reg_word(®->hccr, HCCR_CLR_RISC_INT);
255 rd_reg_word(®->hccr);
256 }
257 }
258 qla2x00_handle_mbx_completion(ha, status);
259 spin_unlock_irqrestore(&ha->hardware_lock, flags);
260
261 return (IRQ_HANDLED);
262 }
263
264 bool
qla2x00_check_reg32_for_disconnect(scsi_qla_host_t * vha,uint32_t reg)265 qla2x00_check_reg32_for_disconnect(scsi_qla_host_t *vha, uint32_t reg)
266 {
267 /* Check for PCI disconnection */
268 if (reg == 0xffffffff && !pci_channel_offline(vha->hw->pdev)) {
269 if (!test_and_set_bit(PFLG_DISCONNECTED, &vha->pci_flags) &&
270 !test_bit(PFLG_DRIVER_REMOVING, &vha->pci_flags) &&
271 !test_bit(PFLG_DRIVER_PROBING, &vha->pci_flags)) {
272 /*
273 * Schedule this (only once) on the default system
274 * workqueue so that all the adapter workqueues and the
275 * DPC thread can be shutdown cleanly.
276 */
277 schedule_work(&vha->hw->board_disable);
278 }
279 return true;
280 } else
281 return false;
282 }
283
284 bool
qla2x00_check_reg16_for_disconnect(scsi_qla_host_t * vha,uint16_t reg)285 qla2x00_check_reg16_for_disconnect(scsi_qla_host_t *vha, uint16_t reg)
286 {
287 return qla2x00_check_reg32_for_disconnect(vha, 0xffff0000 | reg);
288 }
289
290 /**
291 * qla2300_intr_handler() - Process interrupts for the ISP23xx and ISP63xx.
292 * @irq: interrupt number
293 * @dev_id: SCSI driver HA context
294 *
295 * Called by system whenever the host adapter generates an interrupt.
296 *
297 * Returns handled flag.
298 */
299 irqreturn_t
qla2300_intr_handler(int irq,void * dev_id)300 qla2300_intr_handler(int irq, void *dev_id)
301 {
302 scsi_qla_host_t *vha;
303 struct device_reg_2xxx __iomem *reg;
304 int status;
305 unsigned long iter;
306 uint32_t stat;
307 uint16_t hccr;
308 uint16_t mb[8];
309 struct rsp_que *rsp;
310 struct qla_hw_data *ha;
311 unsigned long flags;
312
313 rsp = (struct rsp_que *) dev_id;
314 if (!rsp) {
315 ql_log(ql_log_info, NULL, 0x5058,
316 "%s: NULL response queue pointer.\n", __func__);
317 return (IRQ_NONE);
318 }
319
320 ha = rsp->hw;
321 reg = &ha->iobase->isp;
322 status = 0;
323
324 spin_lock_irqsave(&ha->hardware_lock, flags);
325 vha = pci_get_drvdata(ha->pdev);
326 for (iter = 50; iter--; ) {
327 stat = rd_reg_dword(®->u.isp2300.host_status);
328 if (qla2x00_check_reg32_for_disconnect(vha, stat))
329 break;
330 if (stat & HSR_RISC_PAUSED) {
331 if (unlikely(pci_channel_offline(ha->pdev)))
332 break;
333
334 hccr = rd_reg_word(®->hccr);
335
336 if (hccr & (BIT_15 | BIT_13 | BIT_11 | BIT_8))
337 ql_log(ql_log_warn, vha, 0x5026,
338 "Parity error -- HCCR=%x, Dumping "
339 "firmware.\n", hccr);
340 else
341 ql_log(ql_log_warn, vha, 0x5027,
342 "RISC paused -- HCCR=%x, Dumping "
343 "firmware.\n", hccr);
344
345 /*
346 * Issue a "HARD" reset in order for the RISC
347 * interrupt bit to be cleared. Schedule a big
348 * hammer to get out of the RISC PAUSED state.
349 */
350 wrt_reg_word(®->hccr, HCCR_RESET_RISC);
351 rd_reg_word(®->hccr);
352
353 ha->isp_ops->fw_dump(vha);
354 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
355 break;
356 } else if ((stat & HSR_RISC_INT) == 0)
357 break;
358
359 switch (stat & 0xff) {
360 case 0x1:
361 case 0x2:
362 case 0x10:
363 case 0x11:
364 qla2x00_mbx_completion(vha, MSW(stat));
365 status |= MBX_INTERRUPT;
366
367 /* Release mailbox registers. */
368 wrt_reg_word(®->semaphore, 0);
369 break;
370 case 0x12:
371 mb[0] = MSW(stat);
372 mb[1] = RD_MAILBOX_REG(ha, reg, 1);
373 mb[2] = RD_MAILBOX_REG(ha, reg, 2);
374 mb[3] = RD_MAILBOX_REG(ha, reg, 3);
375 qla2x00_async_event(vha, rsp, mb);
376 break;
377 case 0x13:
378 qla2x00_process_response_queue(rsp);
379 break;
380 case 0x15:
381 mb[0] = MBA_CMPLT_1_16BIT;
382 mb[1] = MSW(stat);
383 qla2x00_async_event(vha, rsp, mb);
384 break;
385 case 0x16:
386 mb[0] = MBA_SCSI_COMPLETION;
387 mb[1] = MSW(stat);
388 mb[2] = RD_MAILBOX_REG(ha, reg, 2);
389 qla2x00_async_event(vha, rsp, mb);
390 break;
391 default:
392 ql_dbg(ql_dbg_async, vha, 0x5028,
393 "Unrecognized interrupt type (%d).\n", stat & 0xff);
394 break;
395 }
396 wrt_reg_word(®->hccr, HCCR_CLR_RISC_INT);
397 rd_reg_word_relaxed(®->hccr);
398 }
399 qla2x00_handle_mbx_completion(ha, status);
400 spin_unlock_irqrestore(&ha->hardware_lock, flags);
401
402 return (IRQ_HANDLED);
403 }
404
405 /**
406 * qla2x00_mbx_completion() - Process mailbox command completions.
407 * @vha: SCSI driver HA context
408 * @mb0: Mailbox0 register
409 */
410 static void
qla2x00_mbx_completion(scsi_qla_host_t * vha,uint16_t mb0)411 qla2x00_mbx_completion(scsi_qla_host_t *vha, uint16_t mb0)
412 {
413 uint16_t cnt;
414 uint32_t mboxes;
415 __le16 __iomem *wptr;
416 struct qla_hw_data *ha = vha->hw;
417 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
418
419 /* Read all mbox registers? */
420 WARN_ON_ONCE(ha->mbx_count > 32);
421 mboxes = (1ULL << ha->mbx_count) - 1;
422 if (!ha->mcp)
423 ql_dbg(ql_dbg_async, vha, 0x5001, "MBX pointer ERROR.\n");
424 else
425 mboxes = ha->mcp->in_mb;
426
427 /* Load return mailbox registers. */
428 ha->flags.mbox_int = 1;
429 ha->mailbox_out[0] = mb0;
430 mboxes >>= 1;
431 wptr = MAILBOX_REG(ha, reg, 1);
432
433 for (cnt = 1; cnt < ha->mbx_count; cnt++) {
434 if (IS_QLA2200(ha) && cnt == 8)
435 wptr = MAILBOX_REG(ha, reg, 8);
436 if ((cnt == 4 || cnt == 5) && (mboxes & BIT_0))
437 ha->mailbox_out[cnt] = qla2x00_debounce_register(wptr);
438 else if (mboxes & BIT_0)
439 ha->mailbox_out[cnt] = rd_reg_word(wptr);
440
441 wptr++;
442 mboxes >>= 1;
443 }
444 }
445
446 static void
qla81xx_idc_event(scsi_qla_host_t * vha,uint16_t aen,uint16_t descr)447 qla81xx_idc_event(scsi_qla_host_t *vha, uint16_t aen, uint16_t descr)
448 {
449 static char *event[] =
450 { "Complete", "Request Notification", "Time Extension" };
451 int rval;
452 struct device_reg_24xx __iomem *reg24 = &vha->hw->iobase->isp24;
453 struct device_reg_82xx __iomem *reg82 = &vha->hw->iobase->isp82;
454 __le16 __iomem *wptr;
455 uint16_t cnt, timeout, mb[QLA_IDC_ACK_REGS];
456
457 /* Seed data -- mailbox1 -> mailbox7. */
458 if (IS_QLA81XX(vha->hw) || IS_QLA83XX(vha->hw))
459 wptr = ®24->mailbox1;
460 else if (IS_QLA8044(vha->hw))
461 wptr = ®82->mailbox_out[1];
462 else
463 return;
464
465 for (cnt = 0; cnt < QLA_IDC_ACK_REGS; cnt++, wptr++)
466 mb[cnt] = rd_reg_word(wptr);
467
468 ql_dbg(ql_dbg_async, vha, 0x5021,
469 "Inter-Driver Communication %s -- "
470 "%04x %04x %04x %04x %04x %04x %04x.\n",
471 event[aen & 0xff], mb[0], mb[1], mb[2], mb[3],
472 mb[4], mb[5], mb[6]);
473 switch (aen) {
474 /* Handle IDC Error completion case. */
475 case MBA_IDC_COMPLETE:
476 if (mb[1] >> 15) {
477 vha->hw->flags.idc_compl_status = 1;
478 if (vha->hw->notify_dcbx_comp && !vha->vp_idx)
479 complete(&vha->hw->dcbx_comp);
480 }
481 break;
482
483 case MBA_IDC_NOTIFY:
484 /* Acknowledgement needed? [Notify && non-zero timeout]. */
485 timeout = (descr >> 8) & 0xf;
486 ql_dbg(ql_dbg_async, vha, 0x5022,
487 "%lu Inter-Driver Communication %s -- ACK timeout=%d.\n",
488 vha->host_no, event[aen & 0xff], timeout);
489
490 if (!timeout)
491 return;
492 rval = qla2x00_post_idc_ack_work(vha, mb);
493 if (rval != QLA_SUCCESS)
494 ql_log(ql_log_warn, vha, 0x5023,
495 "IDC failed to post ACK.\n");
496 break;
497 case MBA_IDC_TIME_EXT:
498 vha->hw->idc_extend_tmo = descr;
499 ql_dbg(ql_dbg_async, vha, 0x5087,
500 "%lu Inter-Driver Communication %s -- "
501 "Extend timeout by=%d.\n",
502 vha->host_no, event[aen & 0xff], vha->hw->idc_extend_tmo);
503 break;
504 }
505 }
506
507 #define LS_UNKNOWN 2
508 const char *
qla2x00_get_link_speed_str(struct qla_hw_data * ha,uint16_t speed)509 qla2x00_get_link_speed_str(struct qla_hw_data *ha, uint16_t speed)
510 {
511 static const char *const link_speeds[] = {
512 "1", "2", "?", "4", "8", "16", "32", "10"
513 };
514 #define QLA_LAST_SPEED (ARRAY_SIZE(link_speeds) - 1)
515
516 if (IS_QLA2100(ha) || IS_QLA2200(ha))
517 return link_speeds[0];
518 else if (speed == 0x13)
519 return link_speeds[QLA_LAST_SPEED];
520 else if (speed < QLA_LAST_SPEED)
521 return link_speeds[speed];
522 else
523 return link_speeds[LS_UNKNOWN];
524 }
525
526 static void
qla83xx_handle_8200_aen(scsi_qla_host_t * vha,uint16_t * mb)527 qla83xx_handle_8200_aen(scsi_qla_host_t *vha, uint16_t *mb)
528 {
529 struct qla_hw_data *ha = vha->hw;
530
531 /*
532 * 8200 AEN Interpretation:
533 * mb[0] = AEN code
534 * mb[1] = AEN Reason code
535 * mb[2] = LSW of Peg-Halt Status-1 Register
536 * mb[6] = MSW of Peg-Halt Status-1 Register
537 * mb[3] = LSW of Peg-Halt Status-2 register
538 * mb[7] = MSW of Peg-Halt Status-2 register
539 * mb[4] = IDC Device-State Register value
540 * mb[5] = IDC Driver-Presence Register value
541 */
542 ql_dbg(ql_dbg_async, vha, 0x506b, "AEN Code: mb[0] = 0x%x AEN reason: "
543 "mb[1] = 0x%x PH-status1: mb[2] = 0x%x PH-status1: mb[6] = 0x%x.\n",
544 mb[0], mb[1], mb[2], mb[6]);
545 ql_dbg(ql_dbg_async, vha, 0x506c, "PH-status2: mb[3] = 0x%x "
546 "PH-status2: mb[7] = 0x%x Device-State: mb[4] = 0x%x "
547 "Drv-Presence: mb[5] = 0x%x.\n", mb[3], mb[7], mb[4], mb[5]);
548
549 if (mb[1] & (IDC_PEG_HALT_STATUS_CHANGE | IDC_NIC_FW_REPORTED_FAILURE |
550 IDC_HEARTBEAT_FAILURE)) {
551 ha->flags.nic_core_hung = 1;
552 ql_log(ql_log_warn, vha, 0x5060,
553 "83XX: F/W Error Reported: Check if reset required.\n");
554
555 if (mb[1] & IDC_PEG_HALT_STATUS_CHANGE) {
556 uint32_t protocol_engine_id, fw_err_code, err_level;
557
558 /*
559 * IDC_PEG_HALT_STATUS_CHANGE interpretation:
560 * - PEG-Halt Status-1 Register:
561 * (LSW = mb[2], MSW = mb[6])
562 * Bits 0-7 = protocol-engine ID
563 * Bits 8-28 = f/w error code
564 * Bits 29-31 = Error-level
565 * Error-level 0x1 = Non-Fatal error
566 * Error-level 0x2 = Recoverable Fatal error
567 * Error-level 0x4 = UnRecoverable Fatal error
568 * - PEG-Halt Status-2 Register:
569 * (LSW = mb[3], MSW = mb[7])
570 */
571 protocol_engine_id = (mb[2] & 0xff);
572 fw_err_code = (((mb[2] & 0xff00) >> 8) |
573 ((mb[6] & 0x1fff) << 8));
574 err_level = ((mb[6] & 0xe000) >> 13);
575 ql_log(ql_log_warn, vha, 0x5061, "PegHalt Status-1 "
576 "Register: protocol_engine_id=0x%x "
577 "fw_err_code=0x%x err_level=0x%x.\n",
578 protocol_engine_id, fw_err_code, err_level);
579 ql_log(ql_log_warn, vha, 0x5062, "PegHalt Status-2 "
580 "Register: 0x%x%x.\n", mb[7], mb[3]);
581 if (err_level == ERR_LEVEL_NON_FATAL) {
582 ql_log(ql_log_warn, vha, 0x5063,
583 "Not a fatal error, f/w has recovered itself.\n");
584 } else if (err_level == ERR_LEVEL_RECOVERABLE_FATAL) {
585 ql_log(ql_log_fatal, vha, 0x5064,
586 "Recoverable Fatal error: Chip reset "
587 "required.\n");
588 qla83xx_schedule_work(vha,
589 QLA83XX_NIC_CORE_RESET);
590 } else if (err_level == ERR_LEVEL_UNRECOVERABLE_FATAL) {
591 ql_log(ql_log_fatal, vha, 0x5065,
592 "Unrecoverable Fatal error: Set FAILED "
593 "state, reboot required.\n");
594 qla83xx_schedule_work(vha,
595 QLA83XX_NIC_CORE_UNRECOVERABLE);
596 }
597 }
598
599 if (mb[1] & IDC_NIC_FW_REPORTED_FAILURE) {
600 uint16_t peg_fw_state, nw_interface_link_up;
601 uint16_t nw_interface_signal_detect, sfp_status;
602 uint16_t htbt_counter, htbt_monitor_enable;
603 uint16_t sfp_additional_info, sfp_multirate;
604 uint16_t sfp_tx_fault, link_speed, dcbx_status;
605
606 /*
607 * IDC_NIC_FW_REPORTED_FAILURE interpretation:
608 * - PEG-to-FC Status Register:
609 * (LSW = mb[2], MSW = mb[6])
610 * Bits 0-7 = Peg-Firmware state
611 * Bit 8 = N/W Interface Link-up
612 * Bit 9 = N/W Interface signal detected
613 * Bits 10-11 = SFP Status
614 * SFP Status 0x0 = SFP+ transceiver not expected
615 * SFP Status 0x1 = SFP+ transceiver not present
616 * SFP Status 0x2 = SFP+ transceiver invalid
617 * SFP Status 0x3 = SFP+ transceiver present and
618 * valid
619 * Bits 12-14 = Heartbeat Counter
620 * Bit 15 = Heartbeat Monitor Enable
621 * Bits 16-17 = SFP Additional Info
622 * SFP info 0x0 = Unregocnized transceiver for
623 * Ethernet
624 * SFP info 0x1 = SFP+ brand validation failed
625 * SFP info 0x2 = SFP+ speed validation failed
626 * SFP info 0x3 = SFP+ access error
627 * Bit 18 = SFP Multirate
628 * Bit 19 = SFP Tx Fault
629 * Bits 20-22 = Link Speed
630 * Bits 23-27 = Reserved
631 * Bits 28-30 = DCBX Status
632 * DCBX Status 0x0 = DCBX Disabled
633 * DCBX Status 0x1 = DCBX Enabled
634 * DCBX Status 0x2 = DCBX Exchange error
635 * Bit 31 = Reserved
636 */
637 peg_fw_state = (mb[2] & 0x00ff);
638 nw_interface_link_up = ((mb[2] & 0x0100) >> 8);
639 nw_interface_signal_detect = ((mb[2] & 0x0200) >> 9);
640 sfp_status = ((mb[2] & 0x0c00) >> 10);
641 htbt_counter = ((mb[2] & 0x7000) >> 12);
642 htbt_monitor_enable = ((mb[2] & 0x8000) >> 15);
643 sfp_additional_info = (mb[6] & 0x0003);
644 sfp_multirate = ((mb[6] & 0x0004) >> 2);
645 sfp_tx_fault = ((mb[6] & 0x0008) >> 3);
646 link_speed = ((mb[6] & 0x0070) >> 4);
647 dcbx_status = ((mb[6] & 0x7000) >> 12);
648
649 ql_log(ql_log_warn, vha, 0x5066,
650 "Peg-to-Fc Status Register:\n"
651 "peg_fw_state=0x%x, nw_interface_link_up=0x%x, "
652 "nw_interface_signal_detect=0x%x"
653 "\nsfp_statis=0x%x.\n ", peg_fw_state,
654 nw_interface_link_up, nw_interface_signal_detect,
655 sfp_status);
656 ql_log(ql_log_warn, vha, 0x5067,
657 "htbt_counter=0x%x, htbt_monitor_enable=0x%x, "
658 "sfp_additional_info=0x%x, sfp_multirate=0x%x.\n ",
659 htbt_counter, htbt_monitor_enable,
660 sfp_additional_info, sfp_multirate);
661 ql_log(ql_log_warn, vha, 0x5068,
662 "sfp_tx_fault=0x%x, link_state=0x%x, "
663 "dcbx_status=0x%x.\n", sfp_tx_fault, link_speed,
664 dcbx_status);
665
666 qla83xx_schedule_work(vha, QLA83XX_NIC_CORE_RESET);
667 }
668
669 if (mb[1] & IDC_HEARTBEAT_FAILURE) {
670 ql_log(ql_log_warn, vha, 0x5069,
671 "Heartbeat Failure encountered, chip reset "
672 "required.\n");
673
674 qla83xx_schedule_work(vha, QLA83XX_NIC_CORE_RESET);
675 }
676 }
677
678 if (mb[1] & IDC_DEVICE_STATE_CHANGE) {
679 ql_log(ql_log_info, vha, 0x506a,
680 "IDC Device-State changed = 0x%x.\n", mb[4]);
681 if (ha->flags.nic_core_reset_owner)
682 return;
683 qla83xx_schedule_work(vha, MBA_IDC_AEN);
684 }
685 }
686
687 int
qla2x00_is_a_vp_did(scsi_qla_host_t * vha,uint32_t rscn_entry)688 qla2x00_is_a_vp_did(scsi_qla_host_t *vha, uint32_t rscn_entry)
689 {
690 struct qla_hw_data *ha = vha->hw;
691 scsi_qla_host_t *vp;
692 uint32_t vp_did;
693 unsigned long flags;
694 int ret = 0;
695
696 if (!ha->num_vhosts)
697 return ret;
698
699 spin_lock_irqsave(&ha->vport_slock, flags);
700 list_for_each_entry(vp, &ha->vp_list, list) {
701 vp_did = vp->d_id.b24;
702 if (vp_did == rscn_entry) {
703 ret = 1;
704 break;
705 }
706 }
707 spin_unlock_irqrestore(&ha->vport_slock, flags);
708
709 return ret;
710 }
711
712 fc_port_t *
qla2x00_find_fcport_by_loopid(scsi_qla_host_t * vha,uint16_t loop_id)713 qla2x00_find_fcport_by_loopid(scsi_qla_host_t *vha, uint16_t loop_id)
714 {
715 fc_port_t *f, *tf;
716
717 f = tf = NULL;
718 list_for_each_entry_safe(f, tf, &vha->vp_fcports, list)
719 if (f->loop_id == loop_id)
720 return f;
721 return NULL;
722 }
723
724 fc_port_t *
qla2x00_find_fcport_by_wwpn(scsi_qla_host_t * vha,u8 * wwpn,u8 incl_deleted)725 qla2x00_find_fcport_by_wwpn(scsi_qla_host_t *vha, u8 *wwpn, u8 incl_deleted)
726 {
727 fc_port_t *f, *tf;
728
729 f = tf = NULL;
730 list_for_each_entry_safe(f, tf, &vha->vp_fcports, list) {
731 if (memcmp(f->port_name, wwpn, WWN_SIZE) == 0) {
732 if (incl_deleted)
733 return f;
734 else if (f->deleted == 0)
735 return f;
736 }
737 }
738 return NULL;
739 }
740
741 fc_port_t *
qla2x00_find_fcport_by_nportid(scsi_qla_host_t * vha,port_id_t * id,u8 incl_deleted)742 qla2x00_find_fcport_by_nportid(scsi_qla_host_t *vha, port_id_t *id,
743 u8 incl_deleted)
744 {
745 fc_port_t *f, *tf;
746
747 f = tf = NULL;
748 list_for_each_entry_safe(f, tf, &vha->vp_fcports, list) {
749 if (f->d_id.b24 == id->b24) {
750 if (incl_deleted)
751 return f;
752 else if (f->deleted == 0)
753 return f;
754 }
755 }
756 return NULL;
757 }
758
759 /* Shall be called only on supported adapters. */
760 static void
qla27xx_handle_8200_aen(scsi_qla_host_t * vha,uint16_t * mb)761 qla27xx_handle_8200_aen(scsi_qla_host_t *vha, uint16_t *mb)
762 {
763 struct qla_hw_data *ha = vha->hw;
764 bool reset_isp_needed = 0;
765
766 ql_log(ql_log_warn, vha, 0x02f0,
767 "MPI Heartbeat stop. MPI reset is%s needed. "
768 "MB0[%xh] MB1[%xh] MB2[%xh] MB3[%xh]\n",
769 mb[1] & BIT_8 ? "" : " not",
770 mb[0], mb[1], mb[2], mb[3]);
771
772 if ((mb[1] & BIT_8) == 0)
773 return;
774
775 ql_log(ql_log_warn, vha, 0x02f1,
776 "MPI Heartbeat stop. FW dump needed\n");
777
778 if (ql2xfulldump_on_mpifail) {
779 ha->isp_ops->fw_dump(vha);
780 reset_isp_needed = 1;
781 }
782
783 ha->isp_ops->mpi_fw_dump(vha, 1);
784
785 if (reset_isp_needed) {
786 vha->hw->flags.fw_init_done = 0;
787 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
788 qla2xxx_wake_dpc(vha);
789 }
790 }
791
792 static struct purex_item *
qla24xx_alloc_purex_item(scsi_qla_host_t * vha,uint16_t size)793 qla24xx_alloc_purex_item(scsi_qla_host_t *vha, uint16_t size)
794 {
795 struct purex_item *item = NULL;
796 uint8_t item_hdr_size = sizeof(*item);
797
798 if (size > QLA_DEFAULT_PAYLOAD_SIZE) {
799 item = kzalloc(item_hdr_size +
800 (size - QLA_DEFAULT_PAYLOAD_SIZE), GFP_ATOMIC);
801 } else {
802 if (atomic_inc_return(&vha->default_item.in_use) == 1) {
803 item = &vha->default_item;
804 goto initialize_purex_header;
805 } else {
806 item = kzalloc(item_hdr_size, GFP_ATOMIC);
807 }
808 }
809 if (!item) {
810 ql_log(ql_log_warn, vha, 0x5092,
811 ">> Failed allocate purex list item.\n");
812
813 return NULL;
814 }
815
816 initialize_purex_header:
817 item->vha = vha;
818 item->size = size;
819 return item;
820 }
821
822 static void
qla24xx_queue_purex_item(scsi_qla_host_t * vha,struct purex_item * pkt,void (* process_item)(struct scsi_qla_host * vha,struct purex_item * pkt))823 qla24xx_queue_purex_item(scsi_qla_host_t *vha, struct purex_item *pkt,
824 void (*process_item)(struct scsi_qla_host *vha,
825 struct purex_item *pkt))
826 {
827 struct purex_list *list = &vha->purex_list;
828 ulong flags;
829
830 pkt->process_item = process_item;
831
832 spin_lock_irqsave(&list->lock, flags);
833 list_add_tail(&pkt->list, &list->head);
834 spin_unlock_irqrestore(&list->lock, flags);
835
836 set_bit(PROCESS_PUREX_IOCB, &vha->dpc_flags);
837 }
838
839 /**
840 * qla24xx_copy_std_pkt() - Copy over purex ELS which is
841 * contained in a single IOCB.
842 * purex packet.
843 * @vha: SCSI driver HA context
844 * @pkt: ELS packet
845 */
846 static struct purex_item
qla24xx_copy_std_pkt(struct scsi_qla_host * vha,void * pkt)847 *qla24xx_copy_std_pkt(struct scsi_qla_host *vha, void *pkt)
848 {
849 struct purex_item *item;
850
851 item = qla24xx_alloc_purex_item(vha,
852 QLA_DEFAULT_PAYLOAD_SIZE);
853 if (!item)
854 return item;
855
856 memcpy(&item->iocb, pkt, sizeof(item->iocb));
857 return item;
858 }
859
860 /**
861 * qla27xx_copy_fpin_pkt() - Copy over fpin packets that can
862 * span over multiple IOCBs.
863 * @vha: SCSI driver HA context
864 * @pkt: ELS packet
865 * @rsp: Response queue
866 */
867 static struct purex_item *
qla27xx_copy_fpin_pkt(struct scsi_qla_host * vha,void ** pkt,struct rsp_que ** rsp)868 qla27xx_copy_fpin_pkt(struct scsi_qla_host *vha, void **pkt,
869 struct rsp_que **rsp)
870 {
871 struct purex_entry_24xx *purex = *pkt;
872 struct rsp_que *rsp_q = *rsp;
873 sts_cont_entry_t *new_pkt;
874 uint16_t no_bytes = 0, total_bytes = 0, pending_bytes = 0;
875 uint16_t buffer_copy_offset = 0;
876 uint16_t entry_count, entry_count_remaining;
877 struct purex_item *item;
878 void *fpin_pkt = NULL;
879
880 total_bytes = (le16_to_cpu(purex->frame_size) & 0x0FFF)
881 - PURX_ELS_HEADER_SIZE;
882 pending_bytes = total_bytes;
883 entry_count = entry_count_remaining = purex->entry_count;
884 no_bytes = (pending_bytes > sizeof(purex->els_frame_payload)) ?
885 sizeof(purex->els_frame_payload) : pending_bytes;
886 ql_log(ql_log_info, vha, 0x509a,
887 "FPIN ELS, frame_size 0x%x, entry count %d\n",
888 total_bytes, entry_count);
889
890 item = qla24xx_alloc_purex_item(vha, total_bytes);
891 if (!item)
892 return item;
893
894 fpin_pkt = &item->iocb;
895
896 memcpy(fpin_pkt, &purex->els_frame_payload[0], no_bytes);
897 buffer_copy_offset += no_bytes;
898 pending_bytes -= no_bytes;
899 --entry_count_remaining;
900
901 ((response_t *)purex)->signature = RESPONSE_PROCESSED;
902 wmb();
903
904 do {
905 while ((total_bytes > 0) && (entry_count_remaining > 0)) {
906 if (rsp_q->ring_ptr->signature == RESPONSE_PROCESSED) {
907 ql_dbg(ql_dbg_async, vha, 0x5084,
908 "Ran out of IOCBs, partial data 0x%x\n",
909 buffer_copy_offset);
910 cpu_relax();
911 continue;
912 }
913
914 new_pkt = (sts_cont_entry_t *)rsp_q->ring_ptr;
915 *pkt = new_pkt;
916
917 if (new_pkt->entry_type != STATUS_CONT_TYPE) {
918 ql_log(ql_log_warn, vha, 0x507a,
919 "Unexpected IOCB type, partial data 0x%x\n",
920 buffer_copy_offset);
921 break;
922 }
923
924 rsp_q->ring_index++;
925 if (rsp_q->ring_index == rsp_q->length) {
926 rsp_q->ring_index = 0;
927 rsp_q->ring_ptr = rsp_q->ring;
928 } else {
929 rsp_q->ring_ptr++;
930 }
931 no_bytes = (pending_bytes > sizeof(new_pkt->data)) ?
932 sizeof(new_pkt->data) : pending_bytes;
933 if ((buffer_copy_offset + no_bytes) <= total_bytes) {
934 memcpy(((uint8_t *)fpin_pkt +
935 buffer_copy_offset), new_pkt->data,
936 no_bytes);
937 buffer_copy_offset += no_bytes;
938 pending_bytes -= no_bytes;
939 --entry_count_remaining;
940 } else {
941 ql_log(ql_log_warn, vha, 0x5044,
942 "Attempt to copy more that we got, optimizing..%x\n",
943 buffer_copy_offset);
944 memcpy(((uint8_t *)fpin_pkt +
945 buffer_copy_offset), new_pkt->data,
946 total_bytes - buffer_copy_offset);
947 }
948
949 ((response_t *)new_pkt)->signature = RESPONSE_PROCESSED;
950 wmb();
951 }
952
953 if (pending_bytes != 0 || entry_count_remaining != 0) {
954 ql_log(ql_log_fatal, vha, 0x508b,
955 "Dropping partial FPIN, underrun bytes = 0x%x, entry cnts 0x%x\n",
956 total_bytes, entry_count_remaining);
957 qla24xx_free_purex_item(item);
958 return NULL;
959 }
960 } while (entry_count_remaining > 0);
961 host_to_fcp_swap((uint8_t *)&item->iocb, total_bytes);
962 return item;
963 }
964
965 /**
966 * qla2x00_async_event() - Process aynchronous events.
967 * @vha: SCSI driver HA context
968 * @rsp: response queue
969 * @mb: Mailbox registers (0 - 3)
970 */
971 void
qla2x00_async_event(scsi_qla_host_t * vha,struct rsp_que * rsp,uint16_t * mb)972 qla2x00_async_event(scsi_qla_host_t *vha, struct rsp_que *rsp, uint16_t *mb)
973 {
974 uint16_t handle_cnt;
975 uint16_t cnt, mbx;
976 uint32_t handles[5];
977 struct qla_hw_data *ha = vha->hw;
978 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
979 struct device_reg_24xx __iomem *reg24 = &ha->iobase->isp24;
980 struct device_reg_82xx __iomem *reg82 = &ha->iobase->isp82;
981 uint32_t rscn_entry, host_pid;
982 unsigned long flags;
983 fc_port_t *fcport = NULL;
984
985 if (!vha->hw->flags.fw_started)
986 return;
987
988 /* Setup to process RIO completion. */
989 handle_cnt = 0;
990 if (IS_CNA_CAPABLE(ha))
991 goto skip_rio;
992 switch (mb[0]) {
993 case MBA_SCSI_COMPLETION:
994 handles[0] = make_handle(mb[2], mb[1]);
995 handle_cnt = 1;
996 break;
997 case MBA_CMPLT_1_16BIT:
998 handles[0] = mb[1];
999 handle_cnt = 1;
1000 mb[0] = MBA_SCSI_COMPLETION;
1001 break;
1002 case MBA_CMPLT_2_16BIT:
1003 handles[0] = mb[1];
1004 handles[1] = mb[2];
1005 handle_cnt = 2;
1006 mb[0] = MBA_SCSI_COMPLETION;
1007 break;
1008 case MBA_CMPLT_3_16BIT:
1009 handles[0] = mb[1];
1010 handles[1] = mb[2];
1011 handles[2] = mb[3];
1012 handle_cnt = 3;
1013 mb[0] = MBA_SCSI_COMPLETION;
1014 break;
1015 case MBA_CMPLT_4_16BIT:
1016 handles[0] = mb[1];
1017 handles[1] = mb[2];
1018 handles[2] = mb[3];
1019 handles[3] = (uint32_t)RD_MAILBOX_REG(ha, reg, 6);
1020 handle_cnt = 4;
1021 mb[0] = MBA_SCSI_COMPLETION;
1022 break;
1023 case MBA_CMPLT_5_16BIT:
1024 handles[0] = mb[1];
1025 handles[1] = mb[2];
1026 handles[2] = mb[3];
1027 handles[3] = (uint32_t)RD_MAILBOX_REG(ha, reg, 6);
1028 handles[4] = (uint32_t)RD_MAILBOX_REG(ha, reg, 7);
1029 handle_cnt = 5;
1030 mb[0] = MBA_SCSI_COMPLETION;
1031 break;
1032 case MBA_CMPLT_2_32BIT:
1033 handles[0] = make_handle(mb[2], mb[1]);
1034 handles[1] = make_handle(RD_MAILBOX_REG(ha, reg, 7),
1035 RD_MAILBOX_REG(ha, reg, 6));
1036 handle_cnt = 2;
1037 mb[0] = MBA_SCSI_COMPLETION;
1038 break;
1039 default:
1040 break;
1041 }
1042 skip_rio:
1043 switch (mb[0]) {
1044 case MBA_SCSI_COMPLETION: /* Fast Post */
1045 if (!vha->flags.online)
1046 break;
1047
1048 for (cnt = 0; cnt < handle_cnt; cnt++)
1049 qla2x00_process_completed_request(vha, rsp->req,
1050 handles[cnt]);
1051 break;
1052
1053 case MBA_RESET: /* Reset */
1054 ql_dbg(ql_dbg_async, vha, 0x5002,
1055 "Asynchronous RESET.\n");
1056
1057 set_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
1058 break;
1059
1060 case MBA_SYSTEM_ERR: /* System Error */
1061 mbx = 0;
1062 if (IS_QLA81XX(ha) || IS_QLA83XX(ha) ||
1063 IS_QLA27XX(ha) || IS_QLA28XX(ha)) {
1064 u16 m[4];
1065
1066 m[0] = rd_reg_word(®24->mailbox4);
1067 m[1] = rd_reg_word(®24->mailbox5);
1068 m[2] = rd_reg_word(®24->mailbox6);
1069 mbx = m[3] = rd_reg_word(®24->mailbox7);
1070
1071 ql_log(ql_log_warn, vha, 0x5003,
1072 "ISP System Error - mbx1=%xh mbx2=%xh mbx3=%xh mbx4=%xh mbx5=%xh mbx6=%xh mbx7=%xh.\n",
1073 mb[1], mb[2], mb[3], m[0], m[1], m[2], m[3]);
1074 } else
1075 ql_log(ql_log_warn, vha, 0x5003,
1076 "ISP System Error - mbx1=%xh mbx2=%xh mbx3=%xh.\n ",
1077 mb[1], mb[2], mb[3]);
1078
1079 if ((IS_QLA27XX(ha) || IS_QLA28XX(ha)) &&
1080 rd_reg_word(®24->mailbox7) & BIT_8)
1081 ha->isp_ops->mpi_fw_dump(vha, 1);
1082 ha->isp_ops->fw_dump(vha);
1083 ha->flags.fw_init_done = 0;
1084 QLA_FW_STOPPED(ha);
1085
1086 if (IS_FWI2_CAPABLE(ha)) {
1087 if (mb[1] == 0 && mb[2] == 0) {
1088 ql_log(ql_log_fatal, vha, 0x5004,
1089 "Unrecoverable Hardware Error: adapter "
1090 "marked OFFLINE!\n");
1091 vha->flags.online = 0;
1092 vha->device_flags |= DFLG_DEV_FAILED;
1093 } else {
1094 /* Check to see if MPI timeout occurred */
1095 if ((mbx & MBX_3) && (ha->port_no == 0))
1096 set_bit(MPI_RESET_NEEDED,
1097 &vha->dpc_flags);
1098
1099 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
1100 }
1101 } else if (mb[1] == 0) {
1102 ql_log(ql_log_fatal, vha, 0x5005,
1103 "Unrecoverable Hardware Error: adapter marked "
1104 "OFFLINE!\n");
1105 vha->flags.online = 0;
1106 vha->device_flags |= DFLG_DEV_FAILED;
1107 } else
1108 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
1109 break;
1110
1111 case MBA_REQ_TRANSFER_ERR: /* Request Transfer Error */
1112 ql_log(ql_log_warn, vha, 0x5006,
1113 "ISP Request Transfer Error (%x).\n", mb[1]);
1114
1115 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
1116 break;
1117
1118 case MBA_RSP_TRANSFER_ERR: /* Response Transfer Error */
1119 ql_log(ql_log_warn, vha, 0x5007,
1120 "ISP Response Transfer Error (%x).\n", mb[1]);
1121
1122 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
1123 break;
1124
1125 case MBA_WAKEUP_THRES: /* Request Queue Wake-up */
1126 ql_dbg(ql_dbg_async, vha, 0x5008,
1127 "Asynchronous WAKEUP_THRES (%x).\n", mb[1]);
1128 break;
1129
1130 case MBA_LOOP_INIT_ERR:
1131 ql_log(ql_log_warn, vha, 0x5090,
1132 "LOOP INIT ERROR (%x).\n", mb[1]);
1133 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
1134 break;
1135
1136 case MBA_LIP_OCCURRED: /* Loop Initialization Procedure */
1137 ha->flags.lip_ae = 1;
1138
1139 ql_dbg(ql_dbg_async, vha, 0x5009,
1140 "LIP occurred (%x).\n", mb[1]);
1141
1142 if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
1143 atomic_set(&vha->loop_state, LOOP_DOWN);
1144 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
1145 qla2x00_mark_all_devices_lost(vha);
1146 }
1147
1148 if (vha->vp_idx) {
1149 atomic_set(&vha->vp_state, VP_FAILED);
1150 fc_vport_set_state(vha->fc_vport, FC_VPORT_FAILED);
1151 }
1152
1153 set_bit(REGISTER_FC4_NEEDED, &vha->dpc_flags);
1154 set_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags);
1155
1156 vha->flags.management_server_logged_in = 0;
1157 qla2x00_post_aen_work(vha, FCH_EVT_LIP, mb[1]);
1158 break;
1159
1160 case MBA_LOOP_UP: /* Loop Up Event */
1161 if (IS_QLA2100(ha) || IS_QLA2200(ha))
1162 ha->link_data_rate = PORT_SPEED_1GB;
1163 else
1164 ha->link_data_rate = mb[1];
1165
1166 ql_log(ql_log_info, vha, 0x500a,
1167 "LOOP UP detected (%s Gbps).\n",
1168 qla2x00_get_link_speed_str(ha, ha->link_data_rate));
1169
1170 if (IS_QLA83XX(ha) || IS_QLA27XX(ha) || IS_QLA28XX(ha)) {
1171 if (mb[2] & BIT_0)
1172 ql_log(ql_log_info, vha, 0x11a0,
1173 "FEC=enabled (link up).\n");
1174 }
1175
1176 vha->flags.management_server_logged_in = 0;
1177 qla2x00_post_aen_work(vha, FCH_EVT_LINKUP, ha->link_data_rate);
1178
1179 break;
1180
1181 case MBA_LOOP_DOWN: /* Loop Down Event */
1182 SAVE_TOPO(ha);
1183 ha->flags.lip_ae = 0;
1184 ha->current_topology = 0;
1185
1186 mbx = (IS_QLA81XX(ha) || IS_QLA8031(ha))
1187 ? rd_reg_word(®24->mailbox4) : 0;
1188 mbx = (IS_P3P_TYPE(ha)) ? rd_reg_word(®82->mailbox_out[4])
1189 : mbx;
1190 ql_log(ql_log_info, vha, 0x500b,
1191 "LOOP DOWN detected (%x %x %x %x).\n",
1192 mb[1], mb[2], mb[3], mbx);
1193
1194 if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
1195 atomic_set(&vha->loop_state, LOOP_DOWN);
1196 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
1197 /*
1198 * In case of loop down, restore WWPN from
1199 * NVRAM in case of FA-WWPN capable ISP
1200 * Restore for Physical Port only
1201 */
1202 if (!vha->vp_idx) {
1203 if (ha->flags.fawwpn_enabled &&
1204 (ha->current_topology == ISP_CFG_F)) {
1205 memcpy(vha->port_name, ha->port_name, WWN_SIZE);
1206 fc_host_port_name(vha->host) =
1207 wwn_to_u64(vha->port_name);
1208 ql_dbg(ql_dbg_init + ql_dbg_verbose,
1209 vha, 0x00d8, "LOOP DOWN detected,"
1210 "restore WWPN %016llx\n",
1211 wwn_to_u64(vha->port_name));
1212 }
1213
1214 clear_bit(VP_CONFIG_OK, &vha->vp_flags);
1215 }
1216
1217 vha->device_flags |= DFLG_NO_CABLE;
1218 qla2x00_mark_all_devices_lost(vha);
1219 }
1220
1221 if (vha->vp_idx) {
1222 atomic_set(&vha->vp_state, VP_FAILED);
1223 fc_vport_set_state(vha->fc_vport, FC_VPORT_FAILED);
1224 }
1225
1226 vha->flags.management_server_logged_in = 0;
1227 ha->link_data_rate = PORT_SPEED_UNKNOWN;
1228 qla2x00_post_aen_work(vha, FCH_EVT_LINKDOWN, 0);
1229 break;
1230
1231 case MBA_LIP_RESET: /* LIP reset occurred */
1232 ql_dbg(ql_dbg_async, vha, 0x500c,
1233 "LIP reset occurred (%x).\n", mb[1]);
1234
1235 if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
1236 atomic_set(&vha->loop_state, LOOP_DOWN);
1237 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
1238 qla2x00_mark_all_devices_lost(vha);
1239 }
1240
1241 if (vha->vp_idx) {
1242 atomic_set(&vha->vp_state, VP_FAILED);
1243 fc_vport_set_state(vha->fc_vport, FC_VPORT_FAILED);
1244 }
1245
1246 set_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
1247
1248 ha->operating_mode = LOOP;
1249 vha->flags.management_server_logged_in = 0;
1250 qla2x00_post_aen_work(vha, FCH_EVT_LIPRESET, mb[1]);
1251 break;
1252
1253 /* case MBA_DCBX_COMPLETE: */
1254 case MBA_POINT_TO_POINT: /* Point-to-Point */
1255 ha->flags.lip_ae = 0;
1256
1257 if (IS_QLA2100(ha))
1258 break;
1259
1260 if (IS_CNA_CAPABLE(ha)) {
1261 ql_dbg(ql_dbg_async, vha, 0x500d,
1262 "DCBX Completed -- %04x %04x %04x.\n",
1263 mb[1], mb[2], mb[3]);
1264 if (ha->notify_dcbx_comp && !vha->vp_idx)
1265 complete(&ha->dcbx_comp);
1266
1267 } else
1268 ql_dbg(ql_dbg_async, vha, 0x500e,
1269 "Asynchronous P2P MODE received.\n");
1270
1271 /*
1272 * Until there's a transition from loop down to loop up, treat
1273 * this as loop down only.
1274 */
1275 if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
1276 atomic_set(&vha->loop_state, LOOP_DOWN);
1277 if (!atomic_read(&vha->loop_down_timer))
1278 atomic_set(&vha->loop_down_timer,
1279 LOOP_DOWN_TIME);
1280 if (!N2N_TOPO(ha))
1281 qla2x00_mark_all_devices_lost(vha);
1282 }
1283
1284 if (vha->vp_idx) {
1285 atomic_set(&vha->vp_state, VP_FAILED);
1286 fc_vport_set_state(vha->fc_vport, FC_VPORT_FAILED);
1287 }
1288
1289 if (!(test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags)))
1290 set_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
1291
1292 set_bit(REGISTER_FC4_NEEDED, &vha->dpc_flags);
1293 set_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags);
1294
1295 vha->flags.management_server_logged_in = 0;
1296 break;
1297
1298 case MBA_CHG_IN_CONNECTION: /* Change in connection mode */
1299 if (IS_QLA2100(ha))
1300 break;
1301
1302 ql_dbg(ql_dbg_async, vha, 0x500f,
1303 "Configuration change detected: value=%x.\n", mb[1]);
1304
1305 if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
1306 atomic_set(&vha->loop_state, LOOP_DOWN);
1307 if (!atomic_read(&vha->loop_down_timer))
1308 atomic_set(&vha->loop_down_timer,
1309 LOOP_DOWN_TIME);
1310 qla2x00_mark_all_devices_lost(vha);
1311 }
1312
1313 if (vha->vp_idx) {
1314 atomic_set(&vha->vp_state, VP_FAILED);
1315 fc_vport_set_state(vha->fc_vport, FC_VPORT_FAILED);
1316 }
1317
1318 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
1319 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
1320 break;
1321
1322 case MBA_PORT_UPDATE: /* Port database update */
1323 /*
1324 * Handle only global and vn-port update events
1325 *
1326 * Relevant inputs:
1327 * mb[1] = N_Port handle of changed port
1328 * OR 0xffff for global event
1329 * mb[2] = New login state
1330 * 7 = Port logged out
1331 * mb[3] = LSB is vp_idx, 0xff = all vps
1332 *
1333 * Skip processing if:
1334 * Event is global, vp_idx is NOT all vps,
1335 * vp_idx does not match
1336 * Event is not global, vp_idx does not match
1337 */
1338 if (IS_QLA2XXX_MIDTYPE(ha) &&
1339 ((mb[1] == 0xffff && (mb[3] & 0xff) != 0xff) ||
1340 (mb[1] != 0xffff)) && vha->vp_idx != (mb[3] & 0xff))
1341 break;
1342
1343 if (mb[2] == 0x7) {
1344 ql_dbg(ql_dbg_async, vha, 0x5010,
1345 "Port %s %04x %04x %04x.\n",
1346 mb[1] == 0xffff ? "unavailable" : "logout",
1347 mb[1], mb[2], mb[3]);
1348
1349 if (mb[1] == 0xffff)
1350 goto global_port_update;
1351
1352 if (mb[1] == NPH_SNS_LID(ha)) {
1353 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
1354 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
1355 break;
1356 }
1357
1358 /* use handle_cnt for loop id/nport handle */
1359 if (IS_FWI2_CAPABLE(ha))
1360 handle_cnt = NPH_SNS;
1361 else
1362 handle_cnt = SIMPLE_NAME_SERVER;
1363 if (mb[1] == handle_cnt) {
1364 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
1365 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
1366 break;
1367 }
1368
1369 /* Port logout */
1370 fcport = qla2x00_find_fcport_by_loopid(vha, mb[1]);
1371 if (!fcport)
1372 break;
1373 if (atomic_read(&fcport->state) != FCS_ONLINE)
1374 break;
1375 ql_dbg(ql_dbg_async, vha, 0x508a,
1376 "Marking port lost loopid=%04x portid=%06x.\n",
1377 fcport->loop_id, fcport->d_id.b24);
1378 if (qla_ini_mode_enabled(vha)) {
1379 fcport->logout_on_delete = 0;
1380 qlt_schedule_sess_for_deletion(fcport);
1381 }
1382 break;
1383
1384 global_port_update:
1385 if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
1386 atomic_set(&vha->loop_state, LOOP_DOWN);
1387 atomic_set(&vha->loop_down_timer,
1388 LOOP_DOWN_TIME);
1389 vha->device_flags |= DFLG_NO_CABLE;
1390 qla2x00_mark_all_devices_lost(vha);
1391 }
1392
1393 if (vha->vp_idx) {
1394 atomic_set(&vha->vp_state, VP_FAILED);
1395 fc_vport_set_state(vha->fc_vport,
1396 FC_VPORT_FAILED);
1397 qla2x00_mark_all_devices_lost(vha);
1398 }
1399
1400 vha->flags.management_server_logged_in = 0;
1401 ha->link_data_rate = PORT_SPEED_UNKNOWN;
1402 break;
1403 }
1404
1405 /*
1406 * If PORT UPDATE is global (received LIP_OCCURRED/LIP_RESET
1407 * event etc. earlier indicating loop is down) then process
1408 * it. Otherwise ignore it and Wait for RSCN to come in.
1409 */
1410 atomic_set(&vha->loop_down_timer, 0);
1411 if (atomic_read(&vha->loop_state) != LOOP_DOWN &&
1412 !ha->flags.n2n_ae &&
1413 atomic_read(&vha->loop_state) != LOOP_DEAD) {
1414 ql_dbg(ql_dbg_async, vha, 0x5011,
1415 "Asynchronous PORT UPDATE ignored %04x/%04x/%04x.\n",
1416 mb[1], mb[2], mb[3]);
1417 break;
1418 }
1419
1420 ql_dbg(ql_dbg_async, vha, 0x5012,
1421 "Port database changed %04x %04x %04x.\n",
1422 mb[1], mb[2], mb[3]);
1423
1424 /*
1425 * Mark all devices as missing so we will login again.
1426 */
1427 atomic_set(&vha->loop_state, LOOP_UP);
1428 vha->scan.scan_retry = 0;
1429
1430 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
1431 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
1432 set_bit(VP_CONFIG_OK, &vha->vp_flags);
1433 break;
1434
1435 case MBA_RSCN_UPDATE: /* State Change Registration */
1436 /* Check if the Vport has issued a SCR */
1437 if (vha->vp_idx && test_bit(VP_SCR_NEEDED, &vha->vp_flags))
1438 break;
1439 /* Only handle SCNs for our Vport index. */
1440 if (ha->flags.npiv_supported && vha->vp_idx != (mb[3] & 0xff))
1441 break;
1442
1443 ql_dbg(ql_dbg_async, vha, 0x5013,
1444 "RSCN database changed -- %04x %04x %04x.\n",
1445 mb[1], mb[2], mb[3]);
1446
1447 rscn_entry = ((mb[1] & 0xff) << 16) | mb[2];
1448 host_pid = (vha->d_id.b.domain << 16) | (vha->d_id.b.area << 8)
1449 | vha->d_id.b.al_pa;
1450 if (rscn_entry == host_pid) {
1451 ql_dbg(ql_dbg_async, vha, 0x5014,
1452 "Ignoring RSCN update to local host "
1453 "port ID (%06x).\n", host_pid);
1454 break;
1455 }
1456
1457 /* Ignore reserved bits from RSCN-payload. */
1458 rscn_entry = ((mb[1] & 0x3ff) << 16) | mb[2];
1459
1460 /* Skip RSCNs for virtual ports on the same physical port */
1461 if (qla2x00_is_a_vp_did(vha, rscn_entry))
1462 break;
1463
1464 atomic_set(&vha->loop_down_timer, 0);
1465 vha->flags.management_server_logged_in = 0;
1466 {
1467 struct event_arg ea;
1468
1469 memset(&ea, 0, sizeof(ea));
1470 ea.id.b24 = rscn_entry;
1471 ea.id.b.rsvd_1 = rscn_entry >> 24;
1472 qla2x00_handle_rscn(vha, &ea);
1473 qla2x00_post_aen_work(vha, FCH_EVT_RSCN, rscn_entry);
1474 }
1475 break;
1476 case MBA_CONGN_NOTI_RECV:
1477 if (!ha->flags.scm_enabled ||
1478 mb[1] != QLA_CON_PRIMITIVE_RECEIVED)
1479 break;
1480
1481 if (mb[2] == QLA_CONGESTION_ARB_WARNING) {
1482 ql_dbg(ql_dbg_async, vha, 0x509b,
1483 "Congestion Warning %04x %04x.\n", mb[1], mb[2]);
1484 } else if (mb[2] == QLA_CONGESTION_ARB_ALARM) {
1485 ql_log(ql_log_warn, vha, 0x509b,
1486 "Congestion Alarm %04x %04x.\n", mb[1], mb[2]);
1487 }
1488 break;
1489 /* case MBA_RIO_RESPONSE: */
1490 case MBA_ZIO_RESPONSE:
1491 ql_dbg(ql_dbg_async, vha, 0x5015,
1492 "[R|Z]IO update completion.\n");
1493
1494 if (IS_FWI2_CAPABLE(ha))
1495 qla24xx_process_response_queue(vha, rsp);
1496 else
1497 qla2x00_process_response_queue(rsp);
1498 break;
1499
1500 case MBA_DISCARD_RND_FRAME:
1501 ql_dbg(ql_dbg_async, vha, 0x5016,
1502 "Discard RND Frame -- %04x %04x %04x.\n",
1503 mb[1], mb[2], mb[3]);
1504 break;
1505
1506 case MBA_TRACE_NOTIFICATION:
1507 ql_dbg(ql_dbg_async, vha, 0x5017,
1508 "Trace Notification -- %04x %04x.\n", mb[1], mb[2]);
1509 break;
1510
1511 case MBA_ISP84XX_ALERT:
1512 ql_dbg(ql_dbg_async, vha, 0x5018,
1513 "ISP84XX Alert Notification -- %04x %04x %04x.\n",
1514 mb[1], mb[2], mb[3]);
1515
1516 spin_lock_irqsave(&ha->cs84xx->access_lock, flags);
1517 switch (mb[1]) {
1518 case A84_PANIC_RECOVERY:
1519 ql_log(ql_log_info, vha, 0x5019,
1520 "Alert 84XX: panic recovery %04x %04x.\n",
1521 mb[2], mb[3]);
1522 break;
1523 case A84_OP_LOGIN_COMPLETE:
1524 ha->cs84xx->op_fw_version = mb[3] << 16 | mb[2];
1525 ql_log(ql_log_info, vha, 0x501a,
1526 "Alert 84XX: firmware version %x.\n",
1527 ha->cs84xx->op_fw_version);
1528 break;
1529 case A84_DIAG_LOGIN_COMPLETE:
1530 ha->cs84xx->diag_fw_version = mb[3] << 16 | mb[2];
1531 ql_log(ql_log_info, vha, 0x501b,
1532 "Alert 84XX: diagnostic firmware version %x.\n",
1533 ha->cs84xx->diag_fw_version);
1534 break;
1535 case A84_GOLD_LOGIN_COMPLETE:
1536 ha->cs84xx->diag_fw_version = mb[3] << 16 | mb[2];
1537 ha->cs84xx->fw_update = 1;
1538 ql_log(ql_log_info, vha, 0x501c,
1539 "Alert 84XX: gold firmware version %x.\n",
1540 ha->cs84xx->gold_fw_version);
1541 break;
1542 default:
1543 ql_log(ql_log_warn, vha, 0x501d,
1544 "Alert 84xx: Invalid Alert %04x %04x %04x.\n",
1545 mb[1], mb[2], mb[3]);
1546 }
1547 spin_unlock_irqrestore(&ha->cs84xx->access_lock, flags);
1548 break;
1549 case MBA_DCBX_START:
1550 ql_dbg(ql_dbg_async, vha, 0x501e,
1551 "DCBX Started -- %04x %04x %04x.\n",
1552 mb[1], mb[2], mb[3]);
1553 break;
1554 case MBA_DCBX_PARAM_UPDATE:
1555 ql_dbg(ql_dbg_async, vha, 0x501f,
1556 "DCBX Parameters Updated -- %04x %04x %04x.\n",
1557 mb[1], mb[2], mb[3]);
1558 break;
1559 case MBA_FCF_CONF_ERR:
1560 ql_dbg(ql_dbg_async, vha, 0x5020,
1561 "FCF Configuration Error -- %04x %04x %04x.\n",
1562 mb[1], mb[2], mb[3]);
1563 break;
1564 case MBA_IDC_NOTIFY:
1565 if (IS_QLA8031(vha->hw) || IS_QLA8044(ha)) {
1566 mb[4] = rd_reg_word(®24->mailbox4);
1567 if (((mb[2] & 0x7fff) == MBC_PORT_RESET ||
1568 (mb[2] & 0x7fff) == MBC_SET_PORT_CONFIG) &&
1569 (mb[4] & INTERNAL_LOOPBACK_MASK) != 0) {
1570 set_bit(ISP_QUIESCE_NEEDED, &vha->dpc_flags);
1571 /*
1572 * Extend loop down timer since port is active.
1573 */
1574 if (atomic_read(&vha->loop_state) == LOOP_DOWN)
1575 atomic_set(&vha->loop_down_timer,
1576 LOOP_DOWN_TIME);
1577 qla2xxx_wake_dpc(vha);
1578 }
1579 }
1580 fallthrough;
1581 case MBA_IDC_COMPLETE:
1582 if (ha->notify_lb_portup_comp && !vha->vp_idx)
1583 complete(&ha->lb_portup_comp);
1584 fallthrough;
1585 case MBA_IDC_TIME_EXT:
1586 if (IS_QLA81XX(vha->hw) || IS_QLA8031(vha->hw) ||
1587 IS_QLA8044(ha))
1588 qla81xx_idc_event(vha, mb[0], mb[1]);
1589 break;
1590
1591 case MBA_IDC_AEN:
1592 if (IS_QLA27XX(ha) || IS_QLA28XX(ha)) {
1593 qla27xx_handle_8200_aen(vha, mb);
1594 } else if (IS_QLA83XX(ha)) {
1595 mb[4] = rd_reg_word(®24->mailbox4);
1596 mb[5] = rd_reg_word(®24->mailbox5);
1597 mb[6] = rd_reg_word(®24->mailbox6);
1598 mb[7] = rd_reg_word(®24->mailbox7);
1599 qla83xx_handle_8200_aen(vha, mb);
1600 } else {
1601 ql_dbg(ql_dbg_async, vha, 0x5052,
1602 "skip Heartbeat processing mb0-3=[0x%04x] [0x%04x] [0x%04x] [0x%04x]\n",
1603 mb[0], mb[1], mb[2], mb[3]);
1604 }
1605 break;
1606
1607 case MBA_DPORT_DIAGNOSTICS:
1608 ql_dbg(ql_dbg_async, vha, 0x5052,
1609 "D-Port Diagnostics: %04x %04x %04x %04x\n",
1610 mb[0], mb[1], mb[2], mb[3]);
1611 memcpy(vha->dport_data, mb, sizeof(vha->dport_data));
1612 if (IS_QLA83XX(ha) || IS_QLA27XX(ha) || IS_QLA28XX(ha)) {
1613 static char *results[] = {
1614 "start", "done(pass)", "done(error)", "undefined" };
1615 static char *types[] = {
1616 "none", "dynamic", "static", "other" };
1617 uint result = mb[1] >> 0 & 0x3;
1618 uint type = mb[1] >> 6 & 0x3;
1619 uint sw = mb[1] >> 15 & 0x1;
1620 ql_dbg(ql_dbg_async, vha, 0x5052,
1621 "D-Port Diagnostics: result=%s type=%s [sw=%u]\n",
1622 results[result], types[type], sw);
1623 if (result == 2) {
1624 static char *reasons[] = {
1625 "reserved", "unexpected reject",
1626 "unexpected phase", "retry exceeded",
1627 "timed out", "not supported",
1628 "user stopped" };
1629 uint reason = mb[2] >> 0 & 0xf;
1630 uint phase = mb[2] >> 12 & 0xf;
1631 ql_dbg(ql_dbg_async, vha, 0x5052,
1632 "D-Port Diagnostics: reason=%s phase=%u \n",
1633 reason < 7 ? reasons[reason] : "other",
1634 phase >> 1);
1635 }
1636 }
1637 break;
1638
1639 case MBA_TEMPERATURE_ALERT:
1640 ql_dbg(ql_dbg_async, vha, 0x505e,
1641 "TEMPERATURE ALERT: %04x %04x %04x\n", mb[1], mb[2], mb[3]);
1642 if (mb[1] == 0x12)
1643 schedule_work(&ha->board_disable);
1644 break;
1645
1646 case MBA_TRANS_INSERT:
1647 ql_dbg(ql_dbg_async, vha, 0x5091,
1648 "Transceiver Insertion: %04x\n", mb[1]);
1649 set_bit(DETECT_SFP_CHANGE, &vha->dpc_flags);
1650 break;
1651
1652 case MBA_TRANS_REMOVE:
1653 ql_dbg(ql_dbg_async, vha, 0x5091, "Transceiver Removal\n");
1654 break;
1655
1656 default:
1657 ql_dbg(ql_dbg_async, vha, 0x5057,
1658 "Unknown AEN:%04x %04x %04x %04x\n",
1659 mb[0], mb[1], mb[2], mb[3]);
1660 }
1661
1662 qlt_async_event(mb[0], vha, mb);
1663
1664 if (!vha->vp_idx && ha->num_vhosts)
1665 qla2x00_alert_all_vps(rsp, mb);
1666 }
1667
1668 /**
1669 * qla2x00_process_completed_request() - Process a Fast Post response.
1670 * @vha: SCSI driver HA context
1671 * @req: request queue
1672 * @index: SRB index
1673 */
1674 void
qla2x00_process_completed_request(struct scsi_qla_host * vha,struct req_que * req,uint32_t index)1675 qla2x00_process_completed_request(struct scsi_qla_host *vha,
1676 struct req_que *req, uint32_t index)
1677 {
1678 srb_t *sp;
1679 struct qla_hw_data *ha = vha->hw;
1680
1681 /* Validate handle. */
1682 if (index >= req->num_outstanding_cmds) {
1683 ql_log(ql_log_warn, vha, 0x3014,
1684 "Invalid SCSI command index (%x).\n", index);
1685
1686 if (IS_P3P_TYPE(ha))
1687 set_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags);
1688 else
1689 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
1690 return;
1691 }
1692
1693 sp = req->outstanding_cmds[index];
1694 if (sp) {
1695 /* Free outstanding command slot. */
1696 req->outstanding_cmds[index] = NULL;
1697
1698 /* Save ISP completion status */
1699 sp->done(sp, DID_OK << 16);
1700 } else {
1701 ql_log(ql_log_warn, vha, 0x3016, "Invalid SCSI SRB.\n");
1702
1703 if (IS_P3P_TYPE(ha))
1704 set_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags);
1705 else
1706 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
1707 }
1708 }
1709
1710 srb_t *
qla2x00_get_sp_from_handle(scsi_qla_host_t * vha,const char * func,struct req_que * req,void * iocb)1711 qla2x00_get_sp_from_handle(scsi_qla_host_t *vha, const char *func,
1712 struct req_que *req, void *iocb)
1713 {
1714 struct qla_hw_data *ha = vha->hw;
1715 sts_entry_t *pkt = iocb;
1716 srb_t *sp;
1717 uint16_t index;
1718
1719 index = LSW(pkt->handle);
1720 if (index >= req->num_outstanding_cmds) {
1721 ql_log(ql_log_warn, vha, 0x5031,
1722 "%s: Invalid command index (%x) type %8ph.\n",
1723 func, index, iocb);
1724 if (IS_P3P_TYPE(ha))
1725 set_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags);
1726 else
1727 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
1728 return NULL;
1729 }
1730 sp = req->outstanding_cmds[index];
1731 if (!sp) {
1732 ql_log(ql_log_warn, vha, 0x5032,
1733 "%s: Invalid completion handle (%x) -- timed-out.\n",
1734 func, index);
1735 return NULL;
1736 }
1737 if (sp->handle != index) {
1738 ql_log(ql_log_warn, vha, 0x5033,
1739 "%s: SRB handle (%x) mismatch %x.\n", func,
1740 sp->handle, index);
1741 return NULL;
1742 }
1743
1744 req->outstanding_cmds[index] = NULL;
1745 return sp;
1746 }
1747
1748 static void
qla2x00_mbx_iocb_entry(scsi_qla_host_t * vha,struct req_que * req,struct mbx_entry * mbx)1749 qla2x00_mbx_iocb_entry(scsi_qla_host_t *vha, struct req_que *req,
1750 struct mbx_entry *mbx)
1751 {
1752 const char func[] = "MBX-IOCB";
1753 const char *type;
1754 fc_port_t *fcport;
1755 srb_t *sp;
1756 struct srb_iocb *lio;
1757 uint16_t *data;
1758 uint16_t status;
1759
1760 sp = qla2x00_get_sp_from_handle(vha, func, req, mbx);
1761 if (!sp)
1762 return;
1763
1764 lio = &sp->u.iocb_cmd;
1765 type = sp->name;
1766 fcport = sp->fcport;
1767 data = lio->u.logio.data;
1768
1769 data[0] = MBS_COMMAND_ERROR;
1770 data[1] = lio->u.logio.flags & SRB_LOGIN_RETRIED ?
1771 QLA_LOGIO_LOGIN_RETRIED : 0;
1772 if (mbx->entry_status) {
1773 ql_dbg(ql_dbg_async, vha, 0x5043,
1774 "Async-%s error entry - hdl=%x portid=%02x%02x%02x "
1775 "entry-status=%x status=%x state-flag=%x "
1776 "status-flags=%x.\n", type, sp->handle,
1777 fcport->d_id.b.domain, fcport->d_id.b.area,
1778 fcport->d_id.b.al_pa, mbx->entry_status,
1779 le16_to_cpu(mbx->status), le16_to_cpu(mbx->state_flags),
1780 le16_to_cpu(mbx->status_flags));
1781
1782 ql_dump_buffer(ql_dbg_async + ql_dbg_buffer, vha, 0x5029,
1783 mbx, sizeof(*mbx));
1784
1785 goto logio_done;
1786 }
1787
1788 status = le16_to_cpu(mbx->status);
1789 if (status == 0x30 && sp->type == SRB_LOGIN_CMD &&
1790 le16_to_cpu(mbx->mb0) == MBS_COMMAND_COMPLETE)
1791 status = 0;
1792 if (!status && le16_to_cpu(mbx->mb0) == MBS_COMMAND_COMPLETE) {
1793 ql_dbg(ql_dbg_async, vha, 0x5045,
1794 "Async-%s complete - hdl=%x portid=%02x%02x%02x mbx1=%x.\n",
1795 type, sp->handle, fcport->d_id.b.domain,
1796 fcport->d_id.b.area, fcport->d_id.b.al_pa,
1797 le16_to_cpu(mbx->mb1));
1798
1799 data[0] = MBS_COMMAND_COMPLETE;
1800 if (sp->type == SRB_LOGIN_CMD) {
1801 fcport->port_type = FCT_TARGET;
1802 if (le16_to_cpu(mbx->mb1) & BIT_0)
1803 fcport->port_type = FCT_INITIATOR;
1804 else if (le16_to_cpu(mbx->mb1) & BIT_1)
1805 fcport->flags |= FCF_FCP2_DEVICE;
1806 }
1807 goto logio_done;
1808 }
1809
1810 data[0] = le16_to_cpu(mbx->mb0);
1811 switch (data[0]) {
1812 case MBS_PORT_ID_USED:
1813 data[1] = le16_to_cpu(mbx->mb1);
1814 break;
1815 case MBS_LOOP_ID_USED:
1816 break;
1817 default:
1818 data[0] = MBS_COMMAND_ERROR;
1819 break;
1820 }
1821
1822 ql_log(ql_log_warn, vha, 0x5046,
1823 "Async-%s failed - hdl=%x portid=%02x%02x%02x status=%x "
1824 "mb0=%x mb1=%x mb2=%x mb6=%x mb7=%x.\n", type, sp->handle,
1825 fcport->d_id.b.domain, fcport->d_id.b.area, fcport->d_id.b.al_pa,
1826 status, le16_to_cpu(mbx->mb0), le16_to_cpu(mbx->mb1),
1827 le16_to_cpu(mbx->mb2), le16_to_cpu(mbx->mb6),
1828 le16_to_cpu(mbx->mb7));
1829
1830 logio_done:
1831 sp->done(sp, 0);
1832 }
1833
1834 static void
qla24xx_mbx_iocb_entry(scsi_qla_host_t * vha,struct req_que * req,struct mbx_24xx_entry * pkt)1835 qla24xx_mbx_iocb_entry(scsi_qla_host_t *vha, struct req_que *req,
1836 struct mbx_24xx_entry *pkt)
1837 {
1838 const char func[] = "MBX-IOCB2";
1839 struct qla_hw_data *ha = vha->hw;
1840 srb_t *sp;
1841 struct srb_iocb *si;
1842 u16 sz, i;
1843 int res;
1844
1845 sp = qla2x00_get_sp_from_handle(vha, func, req, pkt);
1846 if (!sp)
1847 return;
1848
1849 if (sp->type == SRB_SCSI_CMD ||
1850 sp->type == SRB_NVME_CMD ||
1851 sp->type == SRB_TM_CMD) {
1852 ql_log(ql_log_warn, vha, 0x509d,
1853 "Inconsistent event entry type %d\n", sp->type);
1854 if (IS_P3P_TYPE(ha))
1855 set_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags);
1856 else
1857 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
1858 return;
1859 }
1860
1861 si = &sp->u.iocb_cmd;
1862 sz = min(ARRAY_SIZE(pkt->mb), ARRAY_SIZE(sp->u.iocb_cmd.u.mbx.in_mb));
1863
1864 for (i = 0; i < sz; i++)
1865 si->u.mbx.in_mb[i] = pkt->mb[i];
1866
1867 res = (si->u.mbx.in_mb[0] & MBS_MASK);
1868
1869 sp->done(sp, res);
1870 }
1871
1872 static void
qla24xxx_nack_iocb_entry(scsi_qla_host_t * vha,struct req_que * req,struct nack_to_isp * pkt)1873 qla24xxx_nack_iocb_entry(scsi_qla_host_t *vha, struct req_que *req,
1874 struct nack_to_isp *pkt)
1875 {
1876 const char func[] = "nack";
1877 srb_t *sp;
1878 int res = 0;
1879
1880 sp = qla2x00_get_sp_from_handle(vha, func, req, pkt);
1881 if (!sp)
1882 return;
1883
1884 if (pkt->u.isp2x.status != cpu_to_le16(NOTIFY_ACK_SUCCESS))
1885 res = QLA_FUNCTION_FAILED;
1886
1887 sp->done(sp, res);
1888 }
1889
1890 static void
qla2x00_ct_entry(scsi_qla_host_t * vha,struct req_que * req,sts_entry_t * pkt,int iocb_type)1891 qla2x00_ct_entry(scsi_qla_host_t *vha, struct req_que *req,
1892 sts_entry_t *pkt, int iocb_type)
1893 {
1894 const char func[] = "CT_IOCB";
1895 const char *type;
1896 srb_t *sp;
1897 struct bsg_job *bsg_job;
1898 struct fc_bsg_reply *bsg_reply;
1899 uint16_t comp_status;
1900 int res = 0;
1901
1902 sp = qla2x00_get_sp_from_handle(vha, func, req, pkt);
1903 if (!sp)
1904 return;
1905
1906 switch (sp->type) {
1907 case SRB_CT_CMD:
1908 bsg_job = sp->u.bsg_job;
1909 bsg_reply = bsg_job->reply;
1910
1911 type = "ct pass-through";
1912
1913 comp_status = le16_to_cpu(pkt->comp_status);
1914
1915 /*
1916 * return FC_CTELS_STATUS_OK and leave the decoding of the ELS/CT
1917 * fc payload to the caller
1918 */
1919 bsg_reply->reply_data.ctels_reply.status = FC_CTELS_STATUS_OK;
1920 bsg_job->reply_len = sizeof(struct fc_bsg_reply);
1921
1922 if (comp_status != CS_COMPLETE) {
1923 if (comp_status == CS_DATA_UNDERRUN) {
1924 res = DID_OK << 16;
1925 bsg_reply->reply_payload_rcv_len =
1926 le16_to_cpu(pkt->rsp_info_len);
1927
1928 ql_log(ql_log_warn, vha, 0x5048,
1929 "CT pass-through-%s error comp_status=0x%x total_byte=0x%x.\n",
1930 type, comp_status,
1931 bsg_reply->reply_payload_rcv_len);
1932 } else {
1933 ql_log(ql_log_warn, vha, 0x5049,
1934 "CT pass-through-%s error comp_status=0x%x.\n",
1935 type, comp_status);
1936 res = DID_ERROR << 16;
1937 bsg_reply->reply_payload_rcv_len = 0;
1938 }
1939 ql_dump_buffer(ql_dbg_async + ql_dbg_buffer, vha, 0x5035,
1940 pkt, sizeof(*pkt));
1941 } else {
1942 res = DID_OK << 16;
1943 bsg_reply->reply_payload_rcv_len =
1944 bsg_job->reply_payload.payload_len;
1945 bsg_job->reply_len = 0;
1946 }
1947 break;
1948 case SRB_CT_PTHRU_CMD:
1949 /*
1950 * borrowing sts_entry_24xx.comp_status.
1951 * same location as ct_entry_24xx.comp_status
1952 */
1953 res = qla2x00_chk_ms_status(vha, (ms_iocb_entry_t *)pkt,
1954 (struct ct_sns_rsp *)sp->u.iocb_cmd.u.ctarg.rsp,
1955 sp->name);
1956 break;
1957 }
1958
1959 sp->done(sp, res);
1960 }
1961
1962 static void
qla24xx_els_ct_entry(scsi_qla_host_t * vha,struct req_que * req,struct sts_entry_24xx * pkt,int iocb_type)1963 qla24xx_els_ct_entry(scsi_qla_host_t *vha, struct req_que *req,
1964 struct sts_entry_24xx *pkt, int iocb_type)
1965 {
1966 struct els_sts_entry_24xx *ese = (struct els_sts_entry_24xx *)pkt;
1967 const char func[] = "ELS_CT_IOCB";
1968 const char *type;
1969 srb_t *sp;
1970 struct bsg_job *bsg_job;
1971 struct fc_bsg_reply *bsg_reply;
1972 uint16_t comp_status;
1973 uint32_t fw_status[3];
1974 int res;
1975 struct srb_iocb *els;
1976
1977 sp = qla2x00_get_sp_from_handle(vha, func, req, pkt);
1978 if (!sp)
1979 return;
1980
1981 type = NULL;
1982 switch (sp->type) {
1983 case SRB_ELS_CMD_RPT:
1984 case SRB_ELS_CMD_HST:
1985 type = "els";
1986 break;
1987 case SRB_CT_CMD:
1988 type = "ct pass-through";
1989 break;
1990 case SRB_ELS_DCMD:
1991 type = "Driver ELS logo";
1992 if (iocb_type != ELS_IOCB_TYPE) {
1993 ql_dbg(ql_dbg_user, vha, 0x5047,
1994 "Completing %s: (%p) type=%d.\n",
1995 type, sp, sp->type);
1996 sp->done(sp, 0);
1997 return;
1998 }
1999 break;
2000 case SRB_CT_PTHRU_CMD:
2001 /* borrowing sts_entry_24xx.comp_status.
2002 same location as ct_entry_24xx.comp_status
2003 */
2004 res = qla2x00_chk_ms_status(sp->vha, (ms_iocb_entry_t *)pkt,
2005 (struct ct_sns_rsp *)sp->u.iocb_cmd.u.ctarg.rsp,
2006 sp->name);
2007 sp->done(sp, res);
2008 return;
2009 default:
2010 ql_dbg(ql_dbg_user, vha, 0x503e,
2011 "Unrecognized SRB: (%p) type=%d.\n", sp, sp->type);
2012 return;
2013 }
2014
2015 comp_status = fw_status[0] = le16_to_cpu(pkt->comp_status);
2016 fw_status[1] = le32_to_cpu(ese->error_subcode_1);
2017 fw_status[2] = le32_to_cpu(ese->error_subcode_2);
2018
2019 if (iocb_type == ELS_IOCB_TYPE) {
2020 els = &sp->u.iocb_cmd;
2021 els->u.els_plogi.fw_status[0] = cpu_to_le32(fw_status[0]);
2022 els->u.els_plogi.fw_status[1] = cpu_to_le32(fw_status[1]);
2023 els->u.els_plogi.fw_status[2] = cpu_to_le32(fw_status[2]);
2024 els->u.els_plogi.comp_status = cpu_to_le16(fw_status[0]);
2025 if (comp_status == CS_COMPLETE) {
2026 res = DID_OK << 16;
2027 } else {
2028 if (comp_status == CS_DATA_UNDERRUN) {
2029 res = DID_OK << 16;
2030 els->u.els_plogi.len = cpu_to_le16(le32_to_cpu(
2031 ese->total_byte_count));
2032 } else {
2033 els->u.els_plogi.len = 0;
2034 res = DID_ERROR << 16;
2035 }
2036 }
2037 ql_dbg(ql_dbg_disc, vha, 0x503f,
2038 "ELS IOCB Done -%s hdl=%x comp_status=0x%x error subcode 1=0x%x error subcode 2=0x%x total_byte=0x%x\n",
2039 type, sp->handle, comp_status, fw_status[1], fw_status[2],
2040 le32_to_cpu(ese->total_byte_count));
2041 goto els_ct_done;
2042 }
2043
2044 /* return FC_CTELS_STATUS_OK and leave the decoding of the ELS/CT
2045 * fc payload to the caller
2046 */
2047 bsg_job = sp->u.bsg_job;
2048 bsg_reply = bsg_job->reply;
2049 bsg_reply->reply_data.ctels_reply.status = FC_CTELS_STATUS_OK;
2050 bsg_job->reply_len = sizeof(struct fc_bsg_reply) + sizeof(fw_status);
2051
2052 if (comp_status != CS_COMPLETE) {
2053 if (comp_status == CS_DATA_UNDERRUN) {
2054 res = DID_OK << 16;
2055 bsg_reply->reply_payload_rcv_len =
2056 le32_to_cpu(ese->total_byte_count);
2057
2058 ql_dbg(ql_dbg_user, vha, 0x503f,
2059 "ELS-CT pass-through-%s error hdl=%x comp_status-status=0x%x "
2060 "error subcode 1=0x%x error subcode 2=0x%x total_byte = 0x%x.\n",
2061 type, sp->handle, comp_status, fw_status[1], fw_status[2],
2062 le32_to_cpu(ese->total_byte_count));
2063 } else {
2064 ql_dbg(ql_dbg_user, vha, 0x5040,
2065 "ELS-CT pass-through-%s error hdl=%x comp_status-status=0x%x "
2066 "error subcode 1=0x%x error subcode 2=0x%x.\n",
2067 type, sp->handle, comp_status,
2068 le32_to_cpu(ese->error_subcode_1),
2069 le32_to_cpu(ese->error_subcode_2));
2070 res = DID_ERROR << 16;
2071 bsg_reply->reply_payload_rcv_len = 0;
2072 }
2073 memcpy(bsg_job->reply + sizeof(struct fc_bsg_reply),
2074 fw_status, sizeof(fw_status));
2075 ql_dump_buffer(ql_dbg_user + ql_dbg_buffer, vha, 0x5056,
2076 pkt, sizeof(*pkt));
2077 }
2078 else {
2079 res = DID_OK << 16;
2080 bsg_reply->reply_payload_rcv_len = bsg_job->reply_payload.payload_len;
2081 bsg_job->reply_len = 0;
2082 }
2083 els_ct_done:
2084
2085 sp->done(sp, res);
2086 }
2087
2088 static void
qla24xx_logio_entry(scsi_qla_host_t * vha,struct req_que * req,struct logio_entry_24xx * logio)2089 qla24xx_logio_entry(scsi_qla_host_t *vha, struct req_que *req,
2090 struct logio_entry_24xx *logio)
2091 {
2092 const char func[] = "LOGIO-IOCB";
2093 const char *type;
2094 fc_port_t *fcport;
2095 srb_t *sp;
2096 struct srb_iocb *lio;
2097 uint16_t *data;
2098 uint32_t iop[2];
2099
2100 sp = qla2x00_get_sp_from_handle(vha, func, req, logio);
2101 if (!sp)
2102 return;
2103
2104 lio = &sp->u.iocb_cmd;
2105 type = sp->name;
2106 fcport = sp->fcport;
2107 data = lio->u.logio.data;
2108
2109 data[0] = MBS_COMMAND_ERROR;
2110 data[1] = lio->u.logio.flags & SRB_LOGIN_RETRIED ?
2111 QLA_LOGIO_LOGIN_RETRIED : 0;
2112 if (logio->entry_status) {
2113 ql_log(ql_log_warn, fcport->vha, 0x5034,
2114 "Async-%s error entry - %8phC hdl=%x"
2115 "portid=%02x%02x%02x entry-status=%x.\n",
2116 type, fcport->port_name, sp->handle, fcport->d_id.b.domain,
2117 fcport->d_id.b.area, fcport->d_id.b.al_pa,
2118 logio->entry_status);
2119 ql_dump_buffer(ql_dbg_async + ql_dbg_buffer, vha, 0x504d,
2120 logio, sizeof(*logio));
2121
2122 goto logio_done;
2123 }
2124
2125 if (le16_to_cpu(logio->comp_status) == CS_COMPLETE) {
2126 ql_dbg(ql_dbg_async, sp->vha, 0x5036,
2127 "Async-%s complete: handle=%x pid=%06x wwpn=%8phC iop0=%x\n",
2128 type, sp->handle, fcport->d_id.b24, fcport->port_name,
2129 le32_to_cpu(logio->io_parameter[0]));
2130
2131 vha->hw->exch_starvation = 0;
2132 data[0] = MBS_COMMAND_COMPLETE;
2133
2134 if (sp->type == SRB_PRLI_CMD) {
2135 lio->u.logio.iop[0] =
2136 le32_to_cpu(logio->io_parameter[0]);
2137 lio->u.logio.iop[1] =
2138 le32_to_cpu(logio->io_parameter[1]);
2139 goto logio_done;
2140 }
2141
2142 if (sp->type != SRB_LOGIN_CMD)
2143 goto logio_done;
2144
2145 iop[0] = le32_to_cpu(logio->io_parameter[0]);
2146 if (iop[0] & BIT_4) {
2147 fcport->port_type = FCT_TARGET;
2148 if (iop[0] & BIT_8)
2149 fcport->flags |= FCF_FCP2_DEVICE;
2150 } else if (iop[0] & BIT_5)
2151 fcport->port_type = FCT_INITIATOR;
2152
2153 if (iop[0] & BIT_7)
2154 fcport->flags |= FCF_CONF_COMP_SUPPORTED;
2155
2156 if (logio->io_parameter[7] || logio->io_parameter[8])
2157 fcport->supported_classes |= FC_COS_CLASS2;
2158 if (logio->io_parameter[9] || logio->io_parameter[10])
2159 fcport->supported_classes |= FC_COS_CLASS3;
2160
2161 goto logio_done;
2162 }
2163
2164 iop[0] = le32_to_cpu(logio->io_parameter[0]);
2165 iop[1] = le32_to_cpu(logio->io_parameter[1]);
2166 lio->u.logio.iop[0] = iop[0];
2167 lio->u.logio.iop[1] = iop[1];
2168 switch (iop[0]) {
2169 case LSC_SCODE_PORTID_USED:
2170 data[0] = MBS_PORT_ID_USED;
2171 data[1] = LSW(iop[1]);
2172 break;
2173 case LSC_SCODE_NPORT_USED:
2174 data[0] = MBS_LOOP_ID_USED;
2175 break;
2176 case LSC_SCODE_CMD_FAILED:
2177 if (iop[1] == 0x0606) {
2178 /*
2179 * PLOGI/PRLI Completed. We must have Recv PLOGI/PRLI,
2180 * Target side acked.
2181 */
2182 data[0] = MBS_COMMAND_COMPLETE;
2183 goto logio_done;
2184 }
2185 data[0] = MBS_COMMAND_ERROR;
2186 break;
2187 case LSC_SCODE_NOXCB:
2188 vha->hw->exch_starvation++;
2189 if (vha->hw->exch_starvation > 5) {
2190 ql_log(ql_log_warn, vha, 0xd046,
2191 "Exchange starvation. Resetting RISC\n");
2192
2193 vha->hw->exch_starvation = 0;
2194
2195 if (IS_P3P_TYPE(vha->hw))
2196 set_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags);
2197 else
2198 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
2199 qla2xxx_wake_dpc(vha);
2200 }
2201 fallthrough;
2202 default:
2203 data[0] = MBS_COMMAND_ERROR;
2204 break;
2205 }
2206
2207 ql_dbg(ql_dbg_async, sp->vha, 0x5037,
2208 "Async-%s failed: handle=%x pid=%06x wwpn=%8phC comp_status=%x iop0=%x iop1=%x\n",
2209 type, sp->handle, fcport->d_id.b24, fcport->port_name,
2210 le16_to_cpu(logio->comp_status),
2211 le32_to_cpu(logio->io_parameter[0]),
2212 le32_to_cpu(logio->io_parameter[1]));
2213
2214 logio_done:
2215 sp->done(sp, 0);
2216 }
2217
2218 static void
qla24xx_tm_iocb_entry(scsi_qla_host_t * vha,struct req_que * req,void * tsk)2219 qla24xx_tm_iocb_entry(scsi_qla_host_t *vha, struct req_que *req, void *tsk)
2220 {
2221 const char func[] = "TMF-IOCB";
2222 const char *type;
2223 fc_port_t *fcport;
2224 srb_t *sp;
2225 struct srb_iocb *iocb;
2226 struct sts_entry_24xx *sts = (struct sts_entry_24xx *)tsk;
2227
2228 sp = qla2x00_get_sp_from_handle(vha, func, req, tsk);
2229 if (!sp)
2230 return;
2231
2232 iocb = &sp->u.iocb_cmd;
2233 type = sp->name;
2234 fcport = sp->fcport;
2235 iocb->u.tmf.data = QLA_SUCCESS;
2236
2237 if (sts->entry_status) {
2238 ql_log(ql_log_warn, fcport->vha, 0x5038,
2239 "Async-%s error - hdl=%x entry-status(%x).\n",
2240 type, sp->handle, sts->entry_status);
2241 iocb->u.tmf.data = QLA_FUNCTION_FAILED;
2242 } else if (sts->comp_status != cpu_to_le16(CS_COMPLETE)) {
2243 ql_log(ql_log_warn, fcport->vha, 0x5039,
2244 "Async-%s error - hdl=%x completion status(%x).\n",
2245 type, sp->handle, sts->comp_status);
2246 iocb->u.tmf.data = QLA_FUNCTION_FAILED;
2247 } else if ((le16_to_cpu(sts->scsi_status) &
2248 SS_RESPONSE_INFO_LEN_VALID)) {
2249 host_to_fcp_swap(sts->data, sizeof(sts->data));
2250 if (le32_to_cpu(sts->rsp_data_len) < 4) {
2251 ql_log(ql_log_warn, fcport->vha, 0x503b,
2252 "Async-%s error - hdl=%x not enough response(%d).\n",
2253 type, sp->handle, sts->rsp_data_len);
2254 } else if (sts->data[3]) {
2255 ql_log(ql_log_warn, fcport->vha, 0x503c,
2256 "Async-%s error - hdl=%x response(%x).\n",
2257 type, sp->handle, sts->data[3]);
2258 iocb->u.tmf.data = QLA_FUNCTION_FAILED;
2259 }
2260 }
2261
2262 if (iocb->u.tmf.data != QLA_SUCCESS)
2263 ql_dump_buffer(ql_dbg_async + ql_dbg_buffer, sp->vha, 0x5055,
2264 sts, sizeof(*sts));
2265
2266 sp->done(sp, 0);
2267 }
2268
qla24xx_nvme_iocb_entry(scsi_qla_host_t * vha,struct req_que * req,void * tsk,srb_t * sp)2269 static void qla24xx_nvme_iocb_entry(scsi_qla_host_t *vha, struct req_que *req,
2270 void *tsk, srb_t *sp)
2271 {
2272 fc_port_t *fcport;
2273 struct srb_iocb *iocb;
2274 struct sts_entry_24xx *sts = (struct sts_entry_24xx *)tsk;
2275 uint16_t state_flags;
2276 struct nvmefc_fcp_req *fd;
2277 uint16_t ret = QLA_SUCCESS;
2278 __le16 comp_status = sts->comp_status;
2279 int logit = 0;
2280
2281 iocb = &sp->u.iocb_cmd;
2282 fcport = sp->fcport;
2283 iocb->u.nvme.comp_status = comp_status;
2284 state_flags = le16_to_cpu(sts->state_flags);
2285 fd = iocb->u.nvme.desc;
2286
2287 if (unlikely(iocb->u.nvme.aen_op))
2288 atomic_dec(&sp->vha->hw->nvme_active_aen_cnt);
2289
2290 if (unlikely(comp_status != CS_COMPLETE))
2291 logit = 1;
2292
2293 fd->transferred_length = fd->payload_length -
2294 le32_to_cpu(sts->residual_len);
2295
2296 /*
2297 * State flags: Bit 6 and 0.
2298 * If 0 is set, we don't care about 6.
2299 * both cases resp was dma'd to host buffer
2300 * if both are 0, that is good path case.
2301 * if six is set and 0 is clear, we need to
2302 * copy resp data from status iocb to resp buffer.
2303 */
2304 if (!(state_flags & (SF_FCP_RSP_DMA | SF_NVME_ERSP))) {
2305 iocb->u.nvme.rsp_pyld_len = 0;
2306 } else if ((state_flags & (SF_FCP_RSP_DMA | SF_NVME_ERSP)) ==
2307 (SF_FCP_RSP_DMA | SF_NVME_ERSP)) {
2308 /* Response already DMA'd to fd->rspaddr. */
2309 iocb->u.nvme.rsp_pyld_len = sts->nvme_rsp_pyld_len;
2310 } else if ((state_flags & SF_FCP_RSP_DMA)) {
2311 /*
2312 * Non-zero value in first 12 bytes of NVMe_RSP IU, treat this
2313 * as an error.
2314 */
2315 iocb->u.nvme.rsp_pyld_len = 0;
2316 fd->transferred_length = 0;
2317 ql_dbg(ql_dbg_io, fcport->vha, 0x307a,
2318 "Unexpected values in NVMe_RSP IU.\n");
2319 logit = 1;
2320 } else if (state_flags & SF_NVME_ERSP) {
2321 uint32_t *inbuf, *outbuf;
2322 uint16_t iter;
2323
2324 inbuf = (uint32_t *)&sts->nvme_ersp_data;
2325 outbuf = (uint32_t *)fd->rspaddr;
2326 iocb->u.nvme.rsp_pyld_len = sts->nvme_rsp_pyld_len;
2327 if (unlikely(le16_to_cpu(iocb->u.nvme.rsp_pyld_len) >
2328 sizeof(struct nvme_fc_ersp_iu))) {
2329 if (ql_mask_match(ql_dbg_io)) {
2330 WARN_ONCE(1, "Unexpected response payload length %u.\n",
2331 iocb->u.nvme.rsp_pyld_len);
2332 ql_log(ql_log_warn, fcport->vha, 0x5100,
2333 "Unexpected response payload length %u.\n",
2334 iocb->u.nvme.rsp_pyld_len);
2335 }
2336 iocb->u.nvme.rsp_pyld_len =
2337 cpu_to_le16(sizeof(struct nvme_fc_ersp_iu));
2338 }
2339 iter = le16_to_cpu(iocb->u.nvme.rsp_pyld_len) >> 2;
2340 for (; iter; iter--)
2341 *outbuf++ = swab32(*inbuf++);
2342 }
2343
2344 if (state_flags & SF_NVME_ERSP) {
2345 struct nvme_fc_ersp_iu *rsp_iu = fd->rspaddr;
2346 u32 tgt_xfer_len;
2347
2348 tgt_xfer_len = be32_to_cpu(rsp_iu->xfrd_len);
2349 if (fd->transferred_length != tgt_xfer_len) {
2350 ql_dbg(ql_dbg_io, fcport->vha, 0x3079,
2351 "Dropped frame(s) detected (sent/rcvd=%u/%u).\n",
2352 tgt_xfer_len, fd->transferred_length);
2353 logit = 1;
2354 } else if (le16_to_cpu(comp_status) == CS_DATA_UNDERRUN) {
2355 /*
2356 * Do not log if this is just an underflow and there
2357 * is no data loss.
2358 */
2359 logit = 0;
2360 }
2361 }
2362
2363 if (unlikely(logit))
2364 ql_log(ql_log_warn, fcport->vha, 0x5060,
2365 "NVME-%s ERR Handling - hdl=%x status(%x) tr_len:%x resid=%x ox_id=%x\n",
2366 sp->name, sp->handle, comp_status,
2367 fd->transferred_length, le32_to_cpu(sts->residual_len),
2368 sts->ox_id);
2369
2370 /*
2371 * If transport error then Failure (HBA rejects request)
2372 * otherwise transport will handle.
2373 */
2374 switch (le16_to_cpu(comp_status)) {
2375 case CS_COMPLETE:
2376 break;
2377
2378 case CS_RESET:
2379 case CS_PORT_UNAVAILABLE:
2380 case CS_PORT_LOGGED_OUT:
2381 fcport->nvme_flag |= NVME_FLAG_RESETTING;
2382 fallthrough;
2383 case CS_ABORTED:
2384 case CS_PORT_BUSY:
2385 fd->transferred_length = 0;
2386 iocb->u.nvme.rsp_pyld_len = 0;
2387 ret = QLA_ABORTED;
2388 break;
2389 case CS_DATA_UNDERRUN:
2390 break;
2391 default:
2392 ret = QLA_FUNCTION_FAILED;
2393 break;
2394 }
2395 sp->done(sp, ret);
2396 }
2397
qla_ctrlvp_completed(scsi_qla_host_t * vha,struct req_que * req,struct vp_ctrl_entry_24xx * vce)2398 static void qla_ctrlvp_completed(scsi_qla_host_t *vha, struct req_que *req,
2399 struct vp_ctrl_entry_24xx *vce)
2400 {
2401 const char func[] = "CTRLVP-IOCB";
2402 srb_t *sp;
2403 int rval = QLA_SUCCESS;
2404
2405 sp = qla2x00_get_sp_from_handle(vha, func, req, vce);
2406 if (!sp)
2407 return;
2408
2409 if (vce->entry_status != 0) {
2410 ql_dbg(ql_dbg_vport, vha, 0x10c4,
2411 "%s: Failed to complete IOCB -- error status (%x)\n",
2412 sp->name, vce->entry_status);
2413 rval = QLA_FUNCTION_FAILED;
2414 } else if (vce->comp_status != cpu_to_le16(CS_COMPLETE)) {
2415 ql_dbg(ql_dbg_vport, vha, 0x10c5,
2416 "%s: Failed to complete IOCB -- completion status (%x) vpidx %x\n",
2417 sp->name, le16_to_cpu(vce->comp_status),
2418 le16_to_cpu(vce->vp_idx_failed));
2419 rval = QLA_FUNCTION_FAILED;
2420 } else {
2421 ql_dbg(ql_dbg_vport, vha, 0x10c6,
2422 "Done %s.\n", __func__);
2423 }
2424
2425 sp->rc = rval;
2426 sp->done(sp, rval);
2427 }
2428
2429 /* Process a single response queue entry. */
qla2x00_process_response_entry(struct scsi_qla_host * vha,struct rsp_que * rsp,sts_entry_t * pkt)2430 static void qla2x00_process_response_entry(struct scsi_qla_host *vha,
2431 struct rsp_que *rsp,
2432 sts_entry_t *pkt)
2433 {
2434 sts21_entry_t *sts21_entry;
2435 sts22_entry_t *sts22_entry;
2436 uint16_t handle_cnt;
2437 uint16_t cnt;
2438
2439 switch (pkt->entry_type) {
2440 case STATUS_TYPE:
2441 qla2x00_status_entry(vha, rsp, pkt);
2442 break;
2443 case STATUS_TYPE_21:
2444 sts21_entry = (sts21_entry_t *)pkt;
2445 handle_cnt = sts21_entry->handle_count;
2446 for (cnt = 0; cnt < handle_cnt; cnt++)
2447 qla2x00_process_completed_request(vha, rsp->req,
2448 sts21_entry->handle[cnt]);
2449 break;
2450 case STATUS_TYPE_22:
2451 sts22_entry = (sts22_entry_t *)pkt;
2452 handle_cnt = sts22_entry->handle_count;
2453 for (cnt = 0; cnt < handle_cnt; cnt++)
2454 qla2x00_process_completed_request(vha, rsp->req,
2455 sts22_entry->handle[cnt]);
2456 break;
2457 case STATUS_CONT_TYPE:
2458 qla2x00_status_cont_entry(rsp, (sts_cont_entry_t *)pkt);
2459 break;
2460 case MBX_IOCB_TYPE:
2461 qla2x00_mbx_iocb_entry(vha, rsp->req, (struct mbx_entry *)pkt);
2462 break;
2463 case CT_IOCB_TYPE:
2464 qla2x00_ct_entry(vha, rsp->req, pkt, CT_IOCB_TYPE);
2465 break;
2466 default:
2467 /* Type Not Supported. */
2468 ql_log(ql_log_warn, vha, 0x504a,
2469 "Received unknown response pkt type %x entry status=%x.\n",
2470 pkt->entry_type, pkt->entry_status);
2471 break;
2472 }
2473 }
2474
2475 /**
2476 * qla2x00_process_response_queue() - Process response queue entries.
2477 * @rsp: response queue
2478 */
2479 void
qla2x00_process_response_queue(struct rsp_que * rsp)2480 qla2x00_process_response_queue(struct rsp_que *rsp)
2481 {
2482 struct scsi_qla_host *vha;
2483 struct qla_hw_data *ha = rsp->hw;
2484 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
2485 sts_entry_t *pkt;
2486
2487 vha = pci_get_drvdata(ha->pdev);
2488
2489 if (!vha->flags.online)
2490 return;
2491
2492 while (rsp->ring_ptr->signature != RESPONSE_PROCESSED) {
2493 pkt = (sts_entry_t *)rsp->ring_ptr;
2494
2495 rsp->ring_index++;
2496 if (rsp->ring_index == rsp->length) {
2497 rsp->ring_index = 0;
2498 rsp->ring_ptr = rsp->ring;
2499 } else {
2500 rsp->ring_ptr++;
2501 }
2502
2503 if (pkt->entry_status != 0) {
2504 qla2x00_error_entry(vha, rsp, pkt);
2505 ((response_t *)pkt)->signature = RESPONSE_PROCESSED;
2506 wmb();
2507 continue;
2508 }
2509
2510 qla2x00_process_response_entry(vha, rsp, pkt);
2511 ((response_t *)pkt)->signature = RESPONSE_PROCESSED;
2512 wmb();
2513 }
2514
2515 /* Adjust ring index */
2516 wrt_reg_word(ISP_RSP_Q_OUT(ha, reg), rsp->ring_index);
2517 }
2518
2519 static inline void
qla2x00_handle_sense(srb_t * sp,uint8_t * sense_data,uint32_t par_sense_len,uint32_t sense_len,struct rsp_que * rsp,int res)2520 qla2x00_handle_sense(srb_t *sp, uint8_t *sense_data, uint32_t par_sense_len,
2521 uint32_t sense_len, struct rsp_que *rsp, int res)
2522 {
2523 struct scsi_qla_host *vha = sp->vha;
2524 struct scsi_cmnd *cp = GET_CMD_SP(sp);
2525 uint32_t track_sense_len;
2526
2527 if (sense_len >= SCSI_SENSE_BUFFERSIZE)
2528 sense_len = SCSI_SENSE_BUFFERSIZE;
2529
2530 SET_CMD_SENSE_LEN(sp, sense_len);
2531 SET_CMD_SENSE_PTR(sp, cp->sense_buffer);
2532 track_sense_len = sense_len;
2533
2534 if (sense_len > par_sense_len)
2535 sense_len = par_sense_len;
2536
2537 memcpy(cp->sense_buffer, sense_data, sense_len);
2538
2539 SET_CMD_SENSE_PTR(sp, cp->sense_buffer + sense_len);
2540 track_sense_len -= sense_len;
2541 SET_CMD_SENSE_LEN(sp, track_sense_len);
2542
2543 if (track_sense_len != 0) {
2544 rsp->status_srb = sp;
2545 cp->result = res;
2546 }
2547
2548 if (sense_len) {
2549 ql_dbg(ql_dbg_io + ql_dbg_buffer, vha, 0x301c,
2550 "Check condition Sense data, nexus%ld:%d:%llu cmd=%p.\n",
2551 sp->vha->host_no, cp->device->id, cp->device->lun,
2552 cp);
2553 ql_dump_buffer(ql_dbg_io + ql_dbg_buffer, vha, 0x302b,
2554 cp->sense_buffer, sense_len);
2555 }
2556 }
2557
2558 struct scsi_dif_tuple {
2559 __be16 guard; /* Checksum */
2560 __be16 app_tag; /* APPL identifier */
2561 __be32 ref_tag; /* Target LBA or indirect LBA */
2562 };
2563
2564 /*
2565 * Checks the guard or meta-data for the type of error
2566 * detected by the HBA. In case of errors, we set the
2567 * ASC/ASCQ fields in the sense buffer with ILLEGAL_REQUEST
2568 * to indicate to the kernel that the HBA detected error.
2569 */
2570 static inline int
qla2x00_handle_dif_error(srb_t * sp,struct sts_entry_24xx * sts24)2571 qla2x00_handle_dif_error(srb_t *sp, struct sts_entry_24xx *sts24)
2572 {
2573 struct scsi_qla_host *vha = sp->vha;
2574 struct scsi_cmnd *cmd = GET_CMD_SP(sp);
2575 uint8_t *ap = &sts24->data[12];
2576 uint8_t *ep = &sts24->data[20];
2577 uint32_t e_ref_tag, a_ref_tag;
2578 uint16_t e_app_tag, a_app_tag;
2579 uint16_t e_guard, a_guard;
2580
2581 /*
2582 * swab32 of the "data" field in the beginning of qla2x00_status_entry()
2583 * would make guard field appear at offset 2
2584 */
2585 a_guard = get_unaligned_le16(ap + 2);
2586 a_app_tag = get_unaligned_le16(ap + 0);
2587 a_ref_tag = get_unaligned_le32(ap + 4);
2588 e_guard = get_unaligned_le16(ep + 2);
2589 e_app_tag = get_unaligned_le16(ep + 0);
2590 e_ref_tag = get_unaligned_le32(ep + 4);
2591
2592 ql_dbg(ql_dbg_io, vha, 0x3023,
2593 "iocb(s) %p Returned STATUS.\n", sts24);
2594
2595 ql_dbg(ql_dbg_io, vha, 0x3024,
2596 "DIF ERROR in cmd 0x%x lba 0x%llx act ref"
2597 " tag=0x%x, exp ref_tag=0x%x, act app tag=0x%x, exp app"
2598 " tag=0x%x, act guard=0x%x, exp guard=0x%x.\n",
2599 cmd->cmnd[0], (u64)scsi_get_lba(cmd), a_ref_tag, e_ref_tag,
2600 a_app_tag, e_app_tag, a_guard, e_guard);
2601
2602 /*
2603 * Ignore sector if:
2604 * For type 3: ref & app tag is all 'f's
2605 * For type 0,1,2: app tag is all 'f's
2606 */
2607 if (a_app_tag == be16_to_cpu(T10_PI_APP_ESCAPE) &&
2608 (scsi_get_prot_type(cmd) != SCSI_PROT_DIF_TYPE3 ||
2609 a_ref_tag == be32_to_cpu(T10_PI_REF_ESCAPE))) {
2610 uint32_t blocks_done, resid;
2611 sector_t lba_s = scsi_get_lba(cmd);
2612
2613 /* 2TB boundary case covered automatically with this */
2614 blocks_done = e_ref_tag - (uint32_t)lba_s + 1;
2615
2616 resid = scsi_bufflen(cmd) - (blocks_done *
2617 cmd->device->sector_size);
2618
2619 scsi_set_resid(cmd, resid);
2620 cmd->result = DID_OK << 16;
2621
2622 /* Update protection tag */
2623 if (scsi_prot_sg_count(cmd)) {
2624 uint32_t i, j = 0, k = 0, num_ent;
2625 struct scatterlist *sg;
2626 struct t10_pi_tuple *spt;
2627
2628 /* Patch the corresponding protection tags */
2629 scsi_for_each_prot_sg(cmd, sg,
2630 scsi_prot_sg_count(cmd), i) {
2631 num_ent = sg_dma_len(sg) / 8;
2632 if (k + num_ent < blocks_done) {
2633 k += num_ent;
2634 continue;
2635 }
2636 j = blocks_done - k - 1;
2637 k = blocks_done;
2638 break;
2639 }
2640
2641 if (k != blocks_done) {
2642 ql_log(ql_log_warn, vha, 0x302f,
2643 "unexpected tag values tag:lba=%x:%llx)\n",
2644 e_ref_tag, (unsigned long long)lba_s);
2645 return 1;
2646 }
2647
2648 spt = page_address(sg_page(sg)) + sg->offset;
2649 spt += j;
2650
2651 spt->app_tag = T10_PI_APP_ESCAPE;
2652 if (scsi_get_prot_type(cmd) == SCSI_PROT_DIF_TYPE3)
2653 spt->ref_tag = T10_PI_REF_ESCAPE;
2654 }
2655
2656 return 0;
2657 }
2658
2659 /* check guard */
2660 if (e_guard != a_guard) {
2661 scsi_build_sense_buffer(1, cmd->sense_buffer, ILLEGAL_REQUEST,
2662 0x10, 0x1);
2663 set_driver_byte(cmd, DRIVER_SENSE);
2664 set_host_byte(cmd, DID_ABORT);
2665 cmd->result |= SAM_STAT_CHECK_CONDITION;
2666 return 1;
2667 }
2668
2669 /* check ref tag */
2670 if (e_ref_tag != a_ref_tag) {
2671 scsi_build_sense_buffer(1, cmd->sense_buffer, ILLEGAL_REQUEST,
2672 0x10, 0x3);
2673 set_driver_byte(cmd, DRIVER_SENSE);
2674 set_host_byte(cmd, DID_ABORT);
2675 cmd->result |= SAM_STAT_CHECK_CONDITION;
2676 return 1;
2677 }
2678
2679 /* check appl tag */
2680 if (e_app_tag != a_app_tag) {
2681 scsi_build_sense_buffer(1, cmd->sense_buffer, ILLEGAL_REQUEST,
2682 0x10, 0x2);
2683 set_driver_byte(cmd, DRIVER_SENSE);
2684 set_host_byte(cmd, DID_ABORT);
2685 cmd->result |= SAM_STAT_CHECK_CONDITION;
2686 return 1;
2687 }
2688
2689 return 1;
2690 }
2691
2692 static void
qla25xx_process_bidir_status_iocb(scsi_qla_host_t * vha,void * pkt,struct req_que * req,uint32_t index)2693 qla25xx_process_bidir_status_iocb(scsi_qla_host_t *vha, void *pkt,
2694 struct req_que *req, uint32_t index)
2695 {
2696 struct qla_hw_data *ha = vha->hw;
2697 srb_t *sp;
2698 uint16_t comp_status;
2699 uint16_t scsi_status;
2700 uint16_t thread_id;
2701 uint32_t rval = EXT_STATUS_OK;
2702 struct bsg_job *bsg_job = NULL;
2703 struct fc_bsg_request *bsg_request;
2704 struct fc_bsg_reply *bsg_reply;
2705 sts_entry_t *sts = pkt;
2706 struct sts_entry_24xx *sts24 = pkt;
2707
2708 /* Validate handle. */
2709 if (index >= req->num_outstanding_cmds) {
2710 ql_log(ql_log_warn, vha, 0x70af,
2711 "Invalid SCSI completion handle 0x%x.\n", index);
2712 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
2713 return;
2714 }
2715
2716 sp = req->outstanding_cmds[index];
2717 if (!sp) {
2718 ql_log(ql_log_warn, vha, 0x70b0,
2719 "Req:%d: Invalid ISP SCSI completion handle(0x%x)\n",
2720 req->id, index);
2721
2722 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
2723 return;
2724 }
2725
2726 /* Free outstanding command slot. */
2727 req->outstanding_cmds[index] = NULL;
2728 bsg_job = sp->u.bsg_job;
2729 bsg_request = bsg_job->request;
2730 bsg_reply = bsg_job->reply;
2731
2732 if (IS_FWI2_CAPABLE(ha)) {
2733 comp_status = le16_to_cpu(sts24->comp_status);
2734 scsi_status = le16_to_cpu(sts24->scsi_status) & SS_MASK;
2735 } else {
2736 comp_status = le16_to_cpu(sts->comp_status);
2737 scsi_status = le16_to_cpu(sts->scsi_status) & SS_MASK;
2738 }
2739
2740 thread_id = bsg_request->rqst_data.h_vendor.vendor_cmd[1];
2741 switch (comp_status) {
2742 case CS_COMPLETE:
2743 if (scsi_status == 0) {
2744 bsg_reply->reply_payload_rcv_len =
2745 bsg_job->reply_payload.payload_len;
2746 vha->qla_stats.input_bytes +=
2747 bsg_reply->reply_payload_rcv_len;
2748 vha->qla_stats.input_requests++;
2749 rval = EXT_STATUS_OK;
2750 }
2751 goto done;
2752
2753 case CS_DATA_OVERRUN:
2754 ql_dbg(ql_dbg_user, vha, 0x70b1,
2755 "Command completed with data overrun thread_id=%d\n",
2756 thread_id);
2757 rval = EXT_STATUS_DATA_OVERRUN;
2758 break;
2759
2760 case CS_DATA_UNDERRUN:
2761 ql_dbg(ql_dbg_user, vha, 0x70b2,
2762 "Command completed with data underrun thread_id=%d\n",
2763 thread_id);
2764 rval = EXT_STATUS_DATA_UNDERRUN;
2765 break;
2766 case CS_BIDIR_RD_OVERRUN:
2767 ql_dbg(ql_dbg_user, vha, 0x70b3,
2768 "Command completed with read data overrun thread_id=%d\n",
2769 thread_id);
2770 rval = EXT_STATUS_DATA_OVERRUN;
2771 break;
2772
2773 case CS_BIDIR_RD_WR_OVERRUN:
2774 ql_dbg(ql_dbg_user, vha, 0x70b4,
2775 "Command completed with read and write data overrun "
2776 "thread_id=%d\n", thread_id);
2777 rval = EXT_STATUS_DATA_OVERRUN;
2778 break;
2779
2780 case CS_BIDIR_RD_OVERRUN_WR_UNDERRUN:
2781 ql_dbg(ql_dbg_user, vha, 0x70b5,
2782 "Command completed with read data over and write data "
2783 "underrun thread_id=%d\n", thread_id);
2784 rval = EXT_STATUS_DATA_OVERRUN;
2785 break;
2786
2787 case CS_BIDIR_RD_UNDERRUN:
2788 ql_dbg(ql_dbg_user, vha, 0x70b6,
2789 "Command completed with read data underrun "
2790 "thread_id=%d\n", thread_id);
2791 rval = EXT_STATUS_DATA_UNDERRUN;
2792 break;
2793
2794 case CS_BIDIR_RD_UNDERRUN_WR_OVERRUN:
2795 ql_dbg(ql_dbg_user, vha, 0x70b7,
2796 "Command completed with read data under and write data "
2797 "overrun thread_id=%d\n", thread_id);
2798 rval = EXT_STATUS_DATA_UNDERRUN;
2799 break;
2800
2801 case CS_BIDIR_RD_WR_UNDERRUN:
2802 ql_dbg(ql_dbg_user, vha, 0x70b8,
2803 "Command completed with read and write data underrun "
2804 "thread_id=%d\n", thread_id);
2805 rval = EXT_STATUS_DATA_UNDERRUN;
2806 break;
2807
2808 case CS_BIDIR_DMA:
2809 ql_dbg(ql_dbg_user, vha, 0x70b9,
2810 "Command completed with data DMA error thread_id=%d\n",
2811 thread_id);
2812 rval = EXT_STATUS_DMA_ERR;
2813 break;
2814
2815 case CS_TIMEOUT:
2816 ql_dbg(ql_dbg_user, vha, 0x70ba,
2817 "Command completed with timeout thread_id=%d\n",
2818 thread_id);
2819 rval = EXT_STATUS_TIMEOUT;
2820 break;
2821 default:
2822 ql_dbg(ql_dbg_user, vha, 0x70bb,
2823 "Command completed with completion status=0x%x "
2824 "thread_id=%d\n", comp_status, thread_id);
2825 rval = EXT_STATUS_ERR;
2826 break;
2827 }
2828 bsg_reply->reply_payload_rcv_len = 0;
2829
2830 done:
2831 /* Return the vendor specific reply to API */
2832 bsg_reply->reply_data.vendor_reply.vendor_rsp[0] = rval;
2833 bsg_job->reply_len = sizeof(struct fc_bsg_reply);
2834 /* Always return DID_OK, bsg will send the vendor specific response
2835 * in this case only */
2836 sp->done(sp, DID_OK << 16);
2837
2838 }
2839
2840 /**
2841 * qla2x00_status_entry() - Process a Status IOCB entry.
2842 * @vha: SCSI driver HA context
2843 * @rsp: response queue
2844 * @pkt: Entry pointer
2845 */
2846 static void
qla2x00_status_entry(scsi_qla_host_t * vha,struct rsp_que * rsp,void * pkt)2847 qla2x00_status_entry(scsi_qla_host_t *vha, struct rsp_que *rsp, void *pkt)
2848 {
2849 srb_t *sp;
2850 fc_port_t *fcport;
2851 struct scsi_cmnd *cp;
2852 sts_entry_t *sts = pkt;
2853 struct sts_entry_24xx *sts24 = pkt;
2854 uint16_t comp_status;
2855 uint16_t scsi_status;
2856 uint16_t ox_id;
2857 uint8_t lscsi_status;
2858 int32_t resid;
2859 uint32_t sense_len, par_sense_len, rsp_info_len, resid_len,
2860 fw_resid_len;
2861 uint8_t *rsp_info, *sense_data;
2862 struct qla_hw_data *ha = vha->hw;
2863 uint32_t handle;
2864 uint16_t que;
2865 struct req_que *req;
2866 int logit = 1;
2867 int res = 0;
2868 uint16_t state_flags = 0;
2869 uint16_t sts_qual = 0;
2870
2871 if (IS_FWI2_CAPABLE(ha)) {
2872 comp_status = le16_to_cpu(sts24->comp_status);
2873 scsi_status = le16_to_cpu(sts24->scsi_status) & SS_MASK;
2874 state_flags = le16_to_cpu(sts24->state_flags);
2875 } else {
2876 comp_status = le16_to_cpu(sts->comp_status);
2877 scsi_status = le16_to_cpu(sts->scsi_status) & SS_MASK;
2878 }
2879 handle = (uint32_t) LSW(sts->handle);
2880 que = MSW(sts->handle);
2881 req = ha->req_q_map[que];
2882
2883 /* Check for invalid queue pointer */
2884 if (req == NULL ||
2885 que >= find_first_zero_bit(ha->req_qid_map, ha->max_req_queues)) {
2886 ql_dbg(ql_dbg_io, vha, 0x3059,
2887 "Invalid status handle (0x%x): Bad req pointer. req=%p, "
2888 "que=%u.\n", sts->handle, req, que);
2889 return;
2890 }
2891
2892 /* Validate handle. */
2893 if (handle < req->num_outstanding_cmds) {
2894 sp = req->outstanding_cmds[handle];
2895 if (!sp) {
2896 ql_dbg(ql_dbg_io, vha, 0x3075,
2897 "%s(%ld): Already returned command for status handle (0x%x).\n",
2898 __func__, vha->host_no, sts->handle);
2899 return;
2900 }
2901 } else {
2902 ql_dbg(ql_dbg_io, vha, 0x3017,
2903 "Invalid status handle, out of range (0x%x).\n",
2904 sts->handle);
2905
2906 if (!test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags)) {
2907 if (IS_P3P_TYPE(ha))
2908 set_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags);
2909 else
2910 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
2911 qla2xxx_wake_dpc(vha);
2912 }
2913 return;
2914 }
2915 qla_put_iocbs(sp->qpair, &sp->iores);
2916
2917 if (sp->cmd_type != TYPE_SRB) {
2918 req->outstanding_cmds[handle] = NULL;
2919 ql_dbg(ql_dbg_io, vha, 0x3015,
2920 "Unknown sp->cmd_type %x %p).\n",
2921 sp->cmd_type, sp);
2922 return;
2923 }
2924
2925 /* NVME completion. */
2926 if (sp->type == SRB_NVME_CMD) {
2927 req->outstanding_cmds[handle] = NULL;
2928 qla24xx_nvme_iocb_entry(vha, req, pkt, sp);
2929 return;
2930 }
2931
2932 if (unlikely((state_flags & BIT_1) && (sp->type == SRB_BIDI_CMD))) {
2933 qla25xx_process_bidir_status_iocb(vha, pkt, req, handle);
2934 return;
2935 }
2936
2937 /* Task Management completion. */
2938 if (sp->type == SRB_TM_CMD) {
2939 qla24xx_tm_iocb_entry(vha, req, pkt);
2940 return;
2941 }
2942
2943 /* Fast path completion. */
2944 if (comp_status == CS_COMPLETE && scsi_status == 0) {
2945 qla2x00_process_completed_request(vha, req, handle);
2946
2947 return;
2948 }
2949
2950 req->outstanding_cmds[handle] = NULL;
2951 cp = GET_CMD_SP(sp);
2952 if (cp == NULL) {
2953 ql_dbg(ql_dbg_io, vha, 0x3018,
2954 "Command already returned (0x%x/%p).\n",
2955 sts->handle, sp);
2956
2957 return;
2958 }
2959
2960 lscsi_status = scsi_status & STATUS_MASK;
2961
2962 fcport = sp->fcport;
2963
2964 ox_id = 0;
2965 sense_len = par_sense_len = rsp_info_len = resid_len =
2966 fw_resid_len = 0;
2967 if (IS_FWI2_CAPABLE(ha)) {
2968 if (scsi_status & SS_SENSE_LEN_VALID)
2969 sense_len = le32_to_cpu(sts24->sense_len);
2970 if (scsi_status & SS_RESPONSE_INFO_LEN_VALID)
2971 rsp_info_len = le32_to_cpu(sts24->rsp_data_len);
2972 if (scsi_status & (SS_RESIDUAL_UNDER | SS_RESIDUAL_OVER))
2973 resid_len = le32_to_cpu(sts24->rsp_residual_count);
2974 if (comp_status == CS_DATA_UNDERRUN)
2975 fw_resid_len = le32_to_cpu(sts24->residual_len);
2976 rsp_info = sts24->data;
2977 sense_data = sts24->data;
2978 host_to_fcp_swap(sts24->data, sizeof(sts24->data));
2979 ox_id = le16_to_cpu(sts24->ox_id);
2980 par_sense_len = sizeof(sts24->data);
2981 sts_qual = le16_to_cpu(sts24->status_qualifier);
2982 } else {
2983 if (scsi_status & SS_SENSE_LEN_VALID)
2984 sense_len = le16_to_cpu(sts->req_sense_length);
2985 if (scsi_status & SS_RESPONSE_INFO_LEN_VALID)
2986 rsp_info_len = le16_to_cpu(sts->rsp_info_len);
2987 resid_len = le32_to_cpu(sts->residual_length);
2988 rsp_info = sts->rsp_info;
2989 sense_data = sts->req_sense_data;
2990 par_sense_len = sizeof(sts->req_sense_data);
2991 }
2992
2993 /* Check for any FCP transport errors. */
2994 if (scsi_status & SS_RESPONSE_INFO_LEN_VALID) {
2995 /* Sense data lies beyond any FCP RESPONSE data. */
2996 if (IS_FWI2_CAPABLE(ha)) {
2997 sense_data += rsp_info_len;
2998 par_sense_len -= rsp_info_len;
2999 }
3000 if (rsp_info_len > 3 && rsp_info[3]) {
3001 ql_dbg(ql_dbg_io, fcport->vha, 0x3019,
3002 "FCP I/O protocol failure (0x%x/0x%x).\n",
3003 rsp_info_len, rsp_info[3]);
3004
3005 res = DID_BUS_BUSY << 16;
3006 goto out;
3007 }
3008 }
3009
3010 /* Check for overrun. */
3011 if (IS_FWI2_CAPABLE(ha) && comp_status == CS_COMPLETE &&
3012 scsi_status & SS_RESIDUAL_OVER)
3013 comp_status = CS_DATA_OVERRUN;
3014
3015 /*
3016 * Check retry_delay_timer value if we receive a busy or
3017 * queue full.
3018 */
3019 if (unlikely(lscsi_status == SAM_STAT_TASK_SET_FULL ||
3020 lscsi_status == SAM_STAT_BUSY))
3021 qla2x00_set_retry_delay_timestamp(fcport, sts_qual);
3022
3023 /*
3024 * Based on Host and scsi status generate status code for Linux
3025 */
3026 switch (comp_status) {
3027 case CS_COMPLETE:
3028 case CS_QUEUE_FULL:
3029 if (scsi_status == 0) {
3030 res = DID_OK << 16;
3031 break;
3032 }
3033 if (scsi_status & (SS_RESIDUAL_UNDER | SS_RESIDUAL_OVER)) {
3034 resid = resid_len;
3035 scsi_set_resid(cp, resid);
3036
3037 if (!lscsi_status &&
3038 ((unsigned)(scsi_bufflen(cp) - resid) <
3039 cp->underflow)) {
3040 ql_dbg(ql_dbg_io, fcport->vha, 0x301a,
3041 "Mid-layer underflow detected (0x%x of 0x%x bytes).\n",
3042 resid, scsi_bufflen(cp));
3043
3044 res = DID_ERROR << 16;
3045 break;
3046 }
3047 }
3048 res = DID_OK << 16 | lscsi_status;
3049
3050 if (lscsi_status == SAM_STAT_TASK_SET_FULL) {
3051 ql_dbg(ql_dbg_io, fcport->vha, 0x301b,
3052 "QUEUE FULL detected.\n");
3053 break;
3054 }
3055 logit = 0;
3056 if (lscsi_status != SS_CHECK_CONDITION)
3057 break;
3058
3059 memset(cp->sense_buffer, 0, SCSI_SENSE_BUFFERSIZE);
3060 if (!(scsi_status & SS_SENSE_LEN_VALID))
3061 break;
3062
3063 qla2x00_handle_sense(sp, sense_data, par_sense_len, sense_len,
3064 rsp, res);
3065 break;
3066
3067 case CS_DATA_UNDERRUN:
3068 /* Use F/W calculated residual length. */
3069 resid = IS_FWI2_CAPABLE(ha) ? fw_resid_len : resid_len;
3070 scsi_set_resid(cp, resid);
3071 if (scsi_status & SS_RESIDUAL_UNDER) {
3072 if (IS_FWI2_CAPABLE(ha) && fw_resid_len != resid_len) {
3073 ql_dbg(ql_dbg_io, fcport->vha, 0x301d,
3074 "Dropped frame(s) detected (0x%x of 0x%x bytes).\n",
3075 resid, scsi_bufflen(cp));
3076
3077 res = DID_ERROR << 16 | lscsi_status;
3078 goto check_scsi_status;
3079 }
3080
3081 if (!lscsi_status &&
3082 ((unsigned)(scsi_bufflen(cp) - resid) <
3083 cp->underflow)) {
3084 ql_dbg(ql_dbg_io, fcport->vha, 0x301e,
3085 "Mid-layer underflow detected (0x%x of 0x%x bytes).\n",
3086 resid, scsi_bufflen(cp));
3087
3088 res = DID_ERROR << 16;
3089 break;
3090 }
3091 } else if (lscsi_status != SAM_STAT_TASK_SET_FULL &&
3092 lscsi_status != SAM_STAT_BUSY) {
3093 /*
3094 * scsi status of task set and busy are considered to be
3095 * task not completed.
3096 */
3097
3098 ql_dbg(ql_dbg_io, fcport->vha, 0x301f,
3099 "Dropped frame(s) detected (0x%x of 0x%x bytes).\n",
3100 resid, scsi_bufflen(cp));
3101
3102 res = DID_ERROR << 16 | lscsi_status;
3103 goto check_scsi_status;
3104 } else {
3105 ql_dbg(ql_dbg_io, fcport->vha, 0x3030,
3106 "scsi_status: 0x%x, lscsi_status: 0x%x\n",
3107 scsi_status, lscsi_status);
3108 }
3109
3110 res = DID_OK << 16 | lscsi_status;
3111 logit = 0;
3112
3113 check_scsi_status:
3114 /*
3115 * Check to see if SCSI Status is non zero. If so report SCSI
3116 * Status.
3117 */
3118 if (lscsi_status != 0) {
3119 if (lscsi_status == SAM_STAT_TASK_SET_FULL) {
3120 ql_dbg(ql_dbg_io, fcport->vha, 0x3020,
3121 "QUEUE FULL detected.\n");
3122 logit = 1;
3123 break;
3124 }
3125 if (lscsi_status != SS_CHECK_CONDITION)
3126 break;
3127
3128 memset(cp->sense_buffer, 0, SCSI_SENSE_BUFFERSIZE);
3129 if (!(scsi_status & SS_SENSE_LEN_VALID))
3130 break;
3131
3132 qla2x00_handle_sense(sp, sense_data, par_sense_len,
3133 sense_len, rsp, res);
3134 }
3135 break;
3136
3137 case CS_PORT_LOGGED_OUT:
3138 case CS_PORT_CONFIG_CHG:
3139 case CS_PORT_BUSY:
3140 case CS_INCOMPLETE:
3141 case CS_PORT_UNAVAILABLE:
3142 case CS_TIMEOUT:
3143 case CS_RESET:
3144
3145 /*
3146 * We are going to have the fc class block the rport
3147 * while we try to recover so instruct the mid layer
3148 * to requeue until the class decides how to handle this.
3149 */
3150 res = DID_TRANSPORT_DISRUPTED << 16;
3151
3152 if (comp_status == CS_TIMEOUT) {
3153 if (IS_FWI2_CAPABLE(ha))
3154 break;
3155 else if ((le16_to_cpu(sts->status_flags) &
3156 SF_LOGOUT_SENT) == 0)
3157 break;
3158 }
3159
3160 if (atomic_read(&fcport->state) == FCS_ONLINE) {
3161 ql_dbg(ql_dbg_disc, fcport->vha, 0x3021,
3162 "Port to be marked lost on fcport=%02x%02x%02x, current "
3163 "port state= %s comp_status %x.\n", fcport->d_id.b.domain,
3164 fcport->d_id.b.area, fcport->d_id.b.al_pa,
3165 port_state_str[FCS_ONLINE],
3166 comp_status);
3167
3168 qlt_schedule_sess_for_deletion(fcport);
3169 }
3170
3171 break;
3172
3173 case CS_ABORTED:
3174 res = DID_RESET << 16;
3175 break;
3176
3177 case CS_DIF_ERROR:
3178 logit = qla2x00_handle_dif_error(sp, sts24);
3179 res = cp->result;
3180 break;
3181
3182 case CS_TRANSPORT:
3183 res = DID_ERROR << 16;
3184
3185 if (!IS_PI_SPLIT_DET_CAPABLE(ha))
3186 break;
3187
3188 if (state_flags & BIT_4)
3189 scmd_printk(KERN_WARNING, cp,
3190 "Unsupported device '%s' found.\n",
3191 cp->device->vendor);
3192 break;
3193
3194 case CS_DMA:
3195 ql_log(ql_log_info, fcport->vha, 0x3022,
3196 "CS_DMA error: 0x%x-0x%x (0x%x) nexus=%ld:%d:%llu portid=%06x oxid=0x%x cdb=%10phN len=0x%x rsp_info=0x%x resid=0x%x fw_resid=0x%x sp=%p cp=%p.\n",
3197 comp_status, scsi_status, res, vha->host_no,
3198 cp->device->id, cp->device->lun, fcport->d_id.b24,
3199 ox_id, cp->cmnd, scsi_bufflen(cp), rsp_info_len,
3200 resid_len, fw_resid_len, sp, cp);
3201 ql_dump_buffer(ql_dbg_tgt + ql_dbg_verbose, vha, 0xe0ee,
3202 pkt, sizeof(*sts24));
3203 res = DID_ERROR << 16;
3204 break;
3205 default:
3206 res = DID_ERROR << 16;
3207 break;
3208 }
3209
3210 out:
3211 if (logit)
3212 ql_dbg(ql_dbg_io, fcport->vha, 0x3022,
3213 "FCP command status: 0x%x-0x%x (0x%x) nexus=%ld:%d:%llu "
3214 "portid=%02x%02x%02x oxid=0x%x cdb=%10phN len=0x%x "
3215 "rsp_info=0x%x resid=0x%x fw_resid=0x%x sp=%p cp=%p.\n",
3216 comp_status, scsi_status, res, vha->host_no,
3217 cp->device->id, cp->device->lun, fcport->d_id.b.domain,
3218 fcport->d_id.b.area, fcport->d_id.b.al_pa, ox_id,
3219 cp->cmnd, scsi_bufflen(cp), rsp_info_len,
3220 resid_len, fw_resid_len, sp, cp);
3221
3222 if (rsp->status_srb == NULL)
3223 sp->done(sp, res);
3224 }
3225
3226 /**
3227 * qla2x00_status_cont_entry() - Process a Status Continuations entry.
3228 * @rsp: response queue
3229 * @pkt: Entry pointer
3230 *
3231 * Extended sense data.
3232 */
3233 static void
qla2x00_status_cont_entry(struct rsp_que * rsp,sts_cont_entry_t * pkt)3234 qla2x00_status_cont_entry(struct rsp_que *rsp, sts_cont_entry_t *pkt)
3235 {
3236 uint8_t sense_sz = 0;
3237 struct qla_hw_data *ha = rsp->hw;
3238 struct scsi_qla_host *vha = pci_get_drvdata(ha->pdev);
3239 srb_t *sp = rsp->status_srb;
3240 struct scsi_cmnd *cp;
3241 uint32_t sense_len;
3242 uint8_t *sense_ptr;
3243
3244 if (!sp || !GET_CMD_SENSE_LEN(sp))
3245 return;
3246
3247 sense_len = GET_CMD_SENSE_LEN(sp);
3248 sense_ptr = GET_CMD_SENSE_PTR(sp);
3249
3250 cp = GET_CMD_SP(sp);
3251 if (cp == NULL) {
3252 ql_log(ql_log_warn, vha, 0x3025,
3253 "cmd is NULL: already returned to OS (sp=%p).\n", sp);
3254
3255 rsp->status_srb = NULL;
3256 return;
3257 }
3258
3259 if (sense_len > sizeof(pkt->data))
3260 sense_sz = sizeof(pkt->data);
3261 else
3262 sense_sz = sense_len;
3263
3264 /* Move sense data. */
3265 if (IS_FWI2_CAPABLE(ha))
3266 host_to_fcp_swap(pkt->data, sizeof(pkt->data));
3267 memcpy(sense_ptr, pkt->data, sense_sz);
3268 ql_dump_buffer(ql_dbg_io + ql_dbg_buffer, vha, 0x302c,
3269 sense_ptr, sense_sz);
3270
3271 sense_len -= sense_sz;
3272 sense_ptr += sense_sz;
3273
3274 SET_CMD_SENSE_PTR(sp, sense_ptr);
3275 SET_CMD_SENSE_LEN(sp, sense_len);
3276
3277 /* Place command on done queue. */
3278 if (sense_len == 0) {
3279 rsp->status_srb = NULL;
3280 sp->done(sp, cp->result);
3281 }
3282 }
3283
3284 /**
3285 * qla2x00_error_entry() - Process an error entry.
3286 * @vha: SCSI driver HA context
3287 * @rsp: response queue
3288 * @pkt: Entry pointer
3289 * return : 1=allow further error analysis. 0=no additional error analysis.
3290 */
3291 static int
qla2x00_error_entry(scsi_qla_host_t * vha,struct rsp_que * rsp,sts_entry_t * pkt)3292 qla2x00_error_entry(scsi_qla_host_t *vha, struct rsp_que *rsp, sts_entry_t *pkt)
3293 {
3294 srb_t *sp;
3295 struct qla_hw_data *ha = vha->hw;
3296 const char func[] = "ERROR-IOCB";
3297 uint16_t que = MSW(pkt->handle);
3298 struct req_que *req = NULL;
3299 int res = DID_ERROR << 16;
3300
3301 ql_dbg(ql_dbg_async, vha, 0x502a,
3302 "iocb type %xh with error status %xh, handle %xh, rspq id %d\n",
3303 pkt->entry_type, pkt->entry_status, pkt->handle, rsp->id);
3304
3305 if (que >= ha->max_req_queues || !ha->req_q_map[que])
3306 goto fatal;
3307
3308 req = ha->req_q_map[que];
3309
3310 if (pkt->entry_status & RF_BUSY)
3311 res = DID_BUS_BUSY << 16;
3312
3313 if ((pkt->handle & ~QLA_TGT_HANDLE_MASK) == QLA_TGT_SKIP_HANDLE)
3314 return 0;
3315
3316 switch (pkt->entry_type) {
3317 case NOTIFY_ACK_TYPE:
3318 case STATUS_TYPE:
3319 case STATUS_CONT_TYPE:
3320 case LOGINOUT_PORT_IOCB_TYPE:
3321 case CT_IOCB_TYPE:
3322 case ELS_IOCB_TYPE:
3323 case ABORT_IOCB_TYPE:
3324 case MBX_IOCB_TYPE:
3325 default:
3326 sp = qla2x00_get_sp_from_handle(vha, func, req, pkt);
3327 if (sp) {
3328 qla_put_iocbs(sp->qpair, &sp->iores);
3329 sp->done(sp, res);
3330 return 0;
3331 }
3332 break;
3333
3334 case ABTS_RESP_24XX:
3335 case CTIO_TYPE7:
3336 case CTIO_CRC2:
3337 return 1;
3338 }
3339 fatal:
3340 ql_log(ql_log_warn, vha, 0x5030,
3341 "Error entry - invalid handle/queue (%04x).\n", que);
3342 return 0;
3343 }
3344
3345 /**
3346 * qla24xx_mbx_completion() - Process mailbox command completions.
3347 * @vha: SCSI driver HA context
3348 * @mb0: Mailbox0 register
3349 */
3350 static void
qla24xx_mbx_completion(scsi_qla_host_t * vha,uint16_t mb0)3351 qla24xx_mbx_completion(scsi_qla_host_t *vha, uint16_t mb0)
3352 {
3353 uint16_t cnt;
3354 uint32_t mboxes;
3355 __le16 __iomem *wptr;
3356 struct qla_hw_data *ha = vha->hw;
3357 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
3358
3359 /* Read all mbox registers? */
3360 WARN_ON_ONCE(ha->mbx_count > 32);
3361 mboxes = (1ULL << ha->mbx_count) - 1;
3362 if (!ha->mcp)
3363 ql_dbg(ql_dbg_async, vha, 0x504e, "MBX pointer ERROR.\n");
3364 else
3365 mboxes = ha->mcp->in_mb;
3366
3367 /* Load return mailbox registers. */
3368 ha->flags.mbox_int = 1;
3369 ha->mailbox_out[0] = mb0;
3370 mboxes >>= 1;
3371 wptr = ®->mailbox1;
3372
3373 for (cnt = 1; cnt < ha->mbx_count; cnt++) {
3374 if (mboxes & BIT_0)
3375 ha->mailbox_out[cnt] = rd_reg_word(wptr);
3376
3377 mboxes >>= 1;
3378 wptr++;
3379 }
3380 }
3381
3382 static void
qla24xx_abort_iocb_entry(scsi_qla_host_t * vha,struct req_que * req,struct abort_entry_24xx * pkt)3383 qla24xx_abort_iocb_entry(scsi_qla_host_t *vha, struct req_que *req,
3384 struct abort_entry_24xx *pkt)
3385 {
3386 const char func[] = "ABT_IOCB";
3387 srb_t *sp;
3388 struct srb_iocb *abt;
3389
3390 sp = qla2x00_get_sp_from_handle(vha, func, req, pkt);
3391 if (!sp)
3392 return;
3393
3394 abt = &sp->u.iocb_cmd;
3395 abt->u.abt.comp_status = pkt->nport_handle;
3396 sp->done(sp, 0);
3397 }
3398
qla24xx_nvme_ls4_iocb(struct scsi_qla_host * vha,struct pt_ls4_request * pkt,struct req_que * req)3399 void qla24xx_nvme_ls4_iocb(struct scsi_qla_host *vha,
3400 struct pt_ls4_request *pkt, struct req_que *req)
3401 {
3402 srb_t *sp;
3403 const char func[] = "LS4_IOCB";
3404 uint16_t comp_status;
3405
3406 sp = qla2x00_get_sp_from_handle(vha, func, req, pkt);
3407 if (!sp)
3408 return;
3409
3410 comp_status = le16_to_cpu(pkt->status);
3411 sp->done(sp, comp_status);
3412 }
3413
3414 /**
3415 * qla24xx_process_response_queue() - Process response queue entries.
3416 * @vha: SCSI driver HA context
3417 * @rsp: response queue
3418 */
qla24xx_process_response_queue(struct scsi_qla_host * vha,struct rsp_que * rsp)3419 void qla24xx_process_response_queue(struct scsi_qla_host *vha,
3420 struct rsp_que *rsp)
3421 {
3422 struct sts_entry_24xx *pkt;
3423 struct qla_hw_data *ha = vha->hw;
3424 struct purex_entry_24xx *purex_entry;
3425 struct purex_item *pure_item;
3426
3427 if (!ha->flags.fw_started)
3428 return;
3429
3430 if (rsp->qpair->cpuid != smp_processor_id() || !rsp->qpair->rcv_intr) {
3431 rsp->qpair->rcv_intr = 1;
3432 qla_cpu_update(rsp->qpair, smp_processor_id());
3433 }
3434
3435 while (rsp->ring_ptr->signature != RESPONSE_PROCESSED) {
3436 pkt = (struct sts_entry_24xx *)rsp->ring_ptr;
3437
3438 rsp->ring_index++;
3439 if (rsp->ring_index == rsp->length) {
3440 rsp->ring_index = 0;
3441 rsp->ring_ptr = rsp->ring;
3442 } else {
3443 rsp->ring_ptr++;
3444 }
3445
3446 if (pkt->entry_status != 0) {
3447 if (qla2x00_error_entry(vha, rsp, (sts_entry_t *) pkt))
3448 goto process_err;
3449
3450 ((response_t *)pkt)->signature = RESPONSE_PROCESSED;
3451 wmb();
3452 continue;
3453 }
3454 process_err:
3455
3456 switch (pkt->entry_type) {
3457 case STATUS_TYPE:
3458 qla2x00_status_entry(vha, rsp, pkt);
3459 break;
3460 case STATUS_CONT_TYPE:
3461 qla2x00_status_cont_entry(rsp, (sts_cont_entry_t *)pkt);
3462 break;
3463 case VP_RPT_ID_IOCB_TYPE:
3464 qla24xx_report_id_acquisition(vha,
3465 (struct vp_rpt_id_entry_24xx *)pkt);
3466 break;
3467 case LOGINOUT_PORT_IOCB_TYPE:
3468 qla24xx_logio_entry(vha, rsp->req,
3469 (struct logio_entry_24xx *)pkt);
3470 break;
3471 case CT_IOCB_TYPE:
3472 qla24xx_els_ct_entry(vha, rsp->req, pkt, CT_IOCB_TYPE);
3473 break;
3474 case ELS_IOCB_TYPE:
3475 qla24xx_els_ct_entry(vha, rsp->req, pkt, ELS_IOCB_TYPE);
3476 break;
3477 case ABTS_RECV_24XX:
3478 if (qla_ini_mode_enabled(vha)) {
3479 pure_item = qla24xx_copy_std_pkt(vha, pkt);
3480 if (!pure_item)
3481 break;
3482 qla24xx_queue_purex_item(vha, pure_item,
3483 qla24xx_process_abts);
3484 break;
3485 }
3486 if (IS_QLA83XX(ha) || IS_QLA27XX(ha) ||
3487 IS_QLA28XX(ha)) {
3488 /* ensure that the ATIO queue is empty */
3489 qlt_handle_abts_recv(vha, rsp,
3490 (response_t *)pkt);
3491 break;
3492 } else {
3493 qlt_24xx_process_atio_queue(vha, 1);
3494 }
3495 fallthrough;
3496 case ABTS_RESP_24XX:
3497 case CTIO_TYPE7:
3498 case CTIO_CRC2:
3499 qlt_response_pkt_all_vps(vha, rsp, (response_t *)pkt);
3500 break;
3501 case PT_LS4_REQUEST:
3502 qla24xx_nvme_ls4_iocb(vha, (struct pt_ls4_request *)pkt,
3503 rsp->req);
3504 break;
3505 case NOTIFY_ACK_TYPE:
3506 if (pkt->handle == QLA_TGT_SKIP_HANDLE)
3507 qlt_response_pkt_all_vps(vha, rsp,
3508 (response_t *)pkt);
3509 else
3510 qla24xxx_nack_iocb_entry(vha, rsp->req,
3511 (struct nack_to_isp *)pkt);
3512 break;
3513 case MARKER_TYPE:
3514 /* Do nothing in this case, this check is to prevent it
3515 * from falling into default case
3516 */
3517 break;
3518 case ABORT_IOCB_TYPE:
3519 qla24xx_abort_iocb_entry(vha, rsp->req,
3520 (struct abort_entry_24xx *)pkt);
3521 break;
3522 case MBX_IOCB_TYPE:
3523 qla24xx_mbx_iocb_entry(vha, rsp->req,
3524 (struct mbx_24xx_entry *)pkt);
3525 break;
3526 case VP_CTRL_IOCB_TYPE:
3527 qla_ctrlvp_completed(vha, rsp->req,
3528 (struct vp_ctrl_entry_24xx *)pkt);
3529 break;
3530 case PUREX_IOCB_TYPE:
3531 purex_entry = (void *)pkt;
3532 switch (purex_entry->els_frame_payload[3]) {
3533 case ELS_RDP:
3534 pure_item = qla24xx_copy_std_pkt(vha, pkt);
3535 if (!pure_item)
3536 break;
3537 qla24xx_queue_purex_item(vha, pure_item,
3538 qla24xx_process_purex_rdp);
3539 break;
3540 case ELS_FPIN:
3541 if (!vha->hw->flags.scm_enabled) {
3542 ql_log(ql_log_warn, vha, 0x5094,
3543 "SCM not active for this port\n");
3544 break;
3545 }
3546 pure_item = qla27xx_copy_fpin_pkt(vha,
3547 (void **)&pkt, &rsp);
3548 if (!pure_item)
3549 break;
3550 qla24xx_queue_purex_item(vha, pure_item,
3551 qla27xx_process_purex_fpin);
3552 break;
3553
3554 default:
3555 ql_log(ql_log_warn, vha, 0x509c,
3556 "Discarding ELS Request opcode 0x%x\n",
3557 purex_entry->els_frame_payload[3]);
3558 }
3559 break;
3560 default:
3561 /* Type Not Supported. */
3562 ql_dbg(ql_dbg_async, vha, 0x5042,
3563 "Received unknown response pkt type 0x%x entry status=%x.\n",
3564 pkt->entry_type, pkt->entry_status);
3565 break;
3566 }
3567 ((response_t *)pkt)->signature = RESPONSE_PROCESSED;
3568 wmb();
3569 }
3570
3571 /* Adjust ring index */
3572 if (IS_P3P_TYPE(ha)) {
3573 struct device_reg_82xx __iomem *reg = &ha->iobase->isp82;
3574
3575 wrt_reg_dword(®->rsp_q_out[0], rsp->ring_index);
3576 } else {
3577 wrt_reg_dword(rsp->rsp_q_out, rsp->ring_index);
3578 }
3579 }
3580
3581 static void
qla2xxx_check_risc_status(scsi_qla_host_t * vha)3582 qla2xxx_check_risc_status(scsi_qla_host_t *vha)
3583 {
3584 int rval;
3585 uint32_t cnt;
3586 struct qla_hw_data *ha = vha->hw;
3587 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
3588
3589 if (!IS_QLA25XX(ha) && !IS_QLA81XX(ha) && !IS_QLA83XX(ha) &&
3590 !IS_QLA27XX(ha) && !IS_QLA28XX(ha))
3591 return;
3592
3593 rval = QLA_SUCCESS;
3594 wrt_reg_dword(®->iobase_addr, 0x7C00);
3595 rd_reg_dword(®->iobase_addr);
3596 wrt_reg_dword(®->iobase_window, 0x0001);
3597 for (cnt = 10000; (rd_reg_dword(®->iobase_window) & BIT_0) == 0 &&
3598 rval == QLA_SUCCESS; cnt--) {
3599 if (cnt) {
3600 wrt_reg_dword(®->iobase_window, 0x0001);
3601 udelay(10);
3602 } else
3603 rval = QLA_FUNCTION_TIMEOUT;
3604 }
3605 if (rval == QLA_SUCCESS)
3606 goto next_test;
3607
3608 rval = QLA_SUCCESS;
3609 wrt_reg_dword(®->iobase_window, 0x0003);
3610 for (cnt = 100; (rd_reg_dword(®->iobase_window) & BIT_0) == 0 &&
3611 rval == QLA_SUCCESS; cnt--) {
3612 if (cnt) {
3613 wrt_reg_dword(®->iobase_window, 0x0003);
3614 udelay(10);
3615 } else
3616 rval = QLA_FUNCTION_TIMEOUT;
3617 }
3618 if (rval != QLA_SUCCESS)
3619 goto done;
3620
3621 next_test:
3622 if (rd_reg_dword(®->iobase_c8) & BIT_3)
3623 ql_log(ql_log_info, vha, 0x504c,
3624 "Additional code -- 0x55AA.\n");
3625
3626 done:
3627 wrt_reg_dword(®->iobase_window, 0x0000);
3628 rd_reg_dword(®->iobase_window);
3629 }
3630
3631 /**
3632 * qla24xx_intr_handler() - Process interrupts for the ISP23xx and ISP24xx.
3633 * @irq: interrupt number
3634 * @dev_id: SCSI driver HA context
3635 *
3636 * Called by system whenever the host adapter generates an interrupt.
3637 *
3638 * Returns handled flag.
3639 */
3640 irqreturn_t
qla24xx_intr_handler(int irq,void * dev_id)3641 qla24xx_intr_handler(int irq, void *dev_id)
3642 {
3643 scsi_qla_host_t *vha;
3644 struct qla_hw_data *ha;
3645 struct device_reg_24xx __iomem *reg;
3646 int status;
3647 unsigned long iter;
3648 uint32_t stat;
3649 uint32_t hccr;
3650 uint16_t mb[8];
3651 struct rsp_que *rsp;
3652 unsigned long flags;
3653 bool process_atio = false;
3654
3655 rsp = (struct rsp_que *) dev_id;
3656 if (!rsp) {
3657 ql_log(ql_log_info, NULL, 0x5059,
3658 "%s: NULL response queue pointer.\n", __func__);
3659 return IRQ_NONE;
3660 }
3661
3662 ha = rsp->hw;
3663 reg = &ha->iobase->isp24;
3664 status = 0;
3665
3666 if (unlikely(pci_channel_offline(ha->pdev)))
3667 return IRQ_HANDLED;
3668
3669 spin_lock_irqsave(&ha->hardware_lock, flags);
3670 vha = pci_get_drvdata(ha->pdev);
3671 for (iter = 50; iter--; ) {
3672 stat = rd_reg_dword(®->host_status);
3673 if (qla2x00_check_reg32_for_disconnect(vha, stat))
3674 break;
3675 if (stat & HSRX_RISC_PAUSED) {
3676 if (unlikely(pci_channel_offline(ha->pdev)))
3677 break;
3678
3679 hccr = rd_reg_dword(®->hccr);
3680
3681 ql_log(ql_log_warn, vha, 0x504b,
3682 "RISC paused -- HCCR=%x, Dumping firmware.\n",
3683 hccr);
3684
3685 qla2xxx_check_risc_status(vha);
3686
3687 ha->isp_ops->fw_dump(vha);
3688 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
3689 break;
3690 } else if ((stat & HSRX_RISC_INT) == 0)
3691 break;
3692
3693 switch (stat & 0xff) {
3694 case INTR_ROM_MB_SUCCESS:
3695 case INTR_ROM_MB_FAILED:
3696 case INTR_MB_SUCCESS:
3697 case INTR_MB_FAILED:
3698 qla24xx_mbx_completion(vha, MSW(stat));
3699 status |= MBX_INTERRUPT;
3700
3701 break;
3702 case INTR_ASYNC_EVENT:
3703 mb[0] = MSW(stat);
3704 mb[1] = rd_reg_word(®->mailbox1);
3705 mb[2] = rd_reg_word(®->mailbox2);
3706 mb[3] = rd_reg_word(®->mailbox3);
3707 qla2x00_async_event(vha, rsp, mb);
3708 break;
3709 case INTR_RSP_QUE_UPDATE:
3710 case INTR_RSP_QUE_UPDATE_83XX:
3711 qla24xx_process_response_queue(vha, rsp);
3712 break;
3713 case INTR_ATIO_QUE_UPDATE_27XX:
3714 case INTR_ATIO_QUE_UPDATE:
3715 process_atio = true;
3716 break;
3717 case INTR_ATIO_RSP_QUE_UPDATE:
3718 process_atio = true;
3719 qla24xx_process_response_queue(vha, rsp);
3720 break;
3721 default:
3722 ql_dbg(ql_dbg_async, vha, 0x504f,
3723 "Unrecognized interrupt type (%d).\n", stat * 0xff);
3724 break;
3725 }
3726 wrt_reg_dword(®->hccr, HCCRX_CLR_RISC_INT);
3727 rd_reg_dword_relaxed(®->hccr);
3728 if (unlikely(IS_QLA83XX(ha) && (ha->pdev->revision == 1)))
3729 ndelay(3500);
3730 }
3731 qla2x00_handle_mbx_completion(ha, status);
3732 spin_unlock_irqrestore(&ha->hardware_lock, flags);
3733
3734 if (process_atio) {
3735 spin_lock_irqsave(&ha->tgt.atio_lock, flags);
3736 qlt_24xx_process_atio_queue(vha, 0);
3737 spin_unlock_irqrestore(&ha->tgt.atio_lock, flags);
3738 }
3739
3740 return IRQ_HANDLED;
3741 }
3742
3743 static irqreturn_t
qla24xx_msix_rsp_q(int irq,void * dev_id)3744 qla24xx_msix_rsp_q(int irq, void *dev_id)
3745 {
3746 struct qla_hw_data *ha;
3747 struct rsp_que *rsp;
3748 struct device_reg_24xx __iomem *reg;
3749 struct scsi_qla_host *vha;
3750 unsigned long flags;
3751
3752 rsp = (struct rsp_que *) dev_id;
3753 if (!rsp) {
3754 ql_log(ql_log_info, NULL, 0x505a,
3755 "%s: NULL response queue pointer.\n", __func__);
3756 return IRQ_NONE;
3757 }
3758 ha = rsp->hw;
3759 reg = &ha->iobase->isp24;
3760
3761 spin_lock_irqsave(&ha->hardware_lock, flags);
3762
3763 vha = pci_get_drvdata(ha->pdev);
3764 qla24xx_process_response_queue(vha, rsp);
3765 if (!ha->flags.disable_msix_handshake) {
3766 wrt_reg_dword(®->hccr, HCCRX_CLR_RISC_INT);
3767 rd_reg_dword_relaxed(®->hccr);
3768 }
3769 spin_unlock_irqrestore(&ha->hardware_lock, flags);
3770
3771 return IRQ_HANDLED;
3772 }
3773
3774 static irqreturn_t
qla24xx_msix_default(int irq,void * dev_id)3775 qla24xx_msix_default(int irq, void *dev_id)
3776 {
3777 scsi_qla_host_t *vha;
3778 struct qla_hw_data *ha;
3779 struct rsp_que *rsp;
3780 struct device_reg_24xx __iomem *reg;
3781 int status;
3782 uint32_t stat;
3783 uint32_t hccr;
3784 uint16_t mb[8];
3785 unsigned long flags;
3786 bool process_atio = false;
3787
3788 rsp = (struct rsp_que *) dev_id;
3789 if (!rsp) {
3790 ql_log(ql_log_info, NULL, 0x505c,
3791 "%s: NULL response queue pointer.\n", __func__);
3792 return IRQ_NONE;
3793 }
3794 ha = rsp->hw;
3795 reg = &ha->iobase->isp24;
3796 status = 0;
3797
3798 spin_lock_irqsave(&ha->hardware_lock, flags);
3799 vha = pci_get_drvdata(ha->pdev);
3800 do {
3801 stat = rd_reg_dword(®->host_status);
3802 if (qla2x00_check_reg32_for_disconnect(vha, stat))
3803 break;
3804 if (stat & HSRX_RISC_PAUSED) {
3805 if (unlikely(pci_channel_offline(ha->pdev)))
3806 break;
3807
3808 hccr = rd_reg_dword(®->hccr);
3809
3810 ql_log(ql_log_info, vha, 0x5050,
3811 "RISC paused -- HCCR=%x, Dumping firmware.\n",
3812 hccr);
3813
3814 qla2xxx_check_risc_status(vha);
3815
3816 ha->isp_ops->fw_dump(vha);
3817 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
3818 break;
3819 } else if ((stat & HSRX_RISC_INT) == 0)
3820 break;
3821
3822 switch (stat & 0xff) {
3823 case INTR_ROM_MB_SUCCESS:
3824 case INTR_ROM_MB_FAILED:
3825 case INTR_MB_SUCCESS:
3826 case INTR_MB_FAILED:
3827 qla24xx_mbx_completion(vha, MSW(stat));
3828 status |= MBX_INTERRUPT;
3829
3830 break;
3831 case INTR_ASYNC_EVENT:
3832 mb[0] = MSW(stat);
3833 mb[1] = rd_reg_word(®->mailbox1);
3834 mb[2] = rd_reg_word(®->mailbox2);
3835 mb[3] = rd_reg_word(®->mailbox3);
3836 qla2x00_async_event(vha, rsp, mb);
3837 break;
3838 case INTR_RSP_QUE_UPDATE:
3839 case INTR_RSP_QUE_UPDATE_83XX:
3840 qla24xx_process_response_queue(vha, rsp);
3841 break;
3842 case INTR_ATIO_QUE_UPDATE_27XX:
3843 case INTR_ATIO_QUE_UPDATE:
3844 process_atio = true;
3845 break;
3846 case INTR_ATIO_RSP_QUE_UPDATE:
3847 process_atio = true;
3848 qla24xx_process_response_queue(vha, rsp);
3849 break;
3850 default:
3851 ql_dbg(ql_dbg_async, vha, 0x5051,
3852 "Unrecognized interrupt type (%d).\n", stat & 0xff);
3853 break;
3854 }
3855 wrt_reg_dword(®->hccr, HCCRX_CLR_RISC_INT);
3856 } while (0);
3857 qla2x00_handle_mbx_completion(ha, status);
3858 spin_unlock_irqrestore(&ha->hardware_lock, flags);
3859
3860 if (process_atio) {
3861 spin_lock_irqsave(&ha->tgt.atio_lock, flags);
3862 qlt_24xx_process_atio_queue(vha, 0);
3863 spin_unlock_irqrestore(&ha->tgt.atio_lock, flags);
3864 }
3865
3866 return IRQ_HANDLED;
3867 }
3868
3869 irqreturn_t
qla2xxx_msix_rsp_q(int irq,void * dev_id)3870 qla2xxx_msix_rsp_q(int irq, void *dev_id)
3871 {
3872 struct qla_hw_data *ha;
3873 struct qla_qpair *qpair;
3874
3875 qpair = dev_id;
3876 if (!qpair) {
3877 ql_log(ql_log_info, NULL, 0x505b,
3878 "%s: NULL response queue pointer.\n", __func__);
3879 return IRQ_NONE;
3880 }
3881 ha = qpair->hw;
3882
3883 queue_work_on(smp_processor_id(), ha->wq, &qpair->q_work);
3884
3885 return IRQ_HANDLED;
3886 }
3887
3888 irqreturn_t
qla2xxx_msix_rsp_q_hs(int irq,void * dev_id)3889 qla2xxx_msix_rsp_q_hs(int irq, void *dev_id)
3890 {
3891 struct qla_hw_data *ha;
3892 struct qla_qpair *qpair;
3893 struct device_reg_24xx __iomem *reg;
3894 unsigned long flags;
3895
3896 qpair = dev_id;
3897 if (!qpair) {
3898 ql_log(ql_log_info, NULL, 0x505b,
3899 "%s: NULL response queue pointer.\n", __func__);
3900 return IRQ_NONE;
3901 }
3902 ha = qpair->hw;
3903
3904 reg = &ha->iobase->isp24;
3905 spin_lock_irqsave(&ha->hardware_lock, flags);
3906 wrt_reg_dword(®->hccr, HCCRX_CLR_RISC_INT);
3907 spin_unlock_irqrestore(&ha->hardware_lock, flags);
3908
3909 queue_work_on(smp_processor_id(), ha->wq, &qpair->q_work);
3910
3911 return IRQ_HANDLED;
3912 }
3913
3914 /* Interrupt handling helpers. */
3915
3916 struct qla_init_msix_entry {
3917 const char *name;
3918 irq_handler_t handler;
3919 };
3920
3921 static const struct qla_init_msix_entry msix_entries[] = {
3922 { "default", qla24xx_msix_default },
3923 { "rsp_q", qla24xx_msix_rsp_q },
3924 { "atio_q", qla83xx_msix_atio_q },
3925 { "qpair_multiq", qla2xxx_msix_rsp_q },
3926 { "qpair_multiq_hs", qla2xxx_msix_rsp_q_hs },
3927 };
3928
3929 static const struct qla_init_msix_entry qla82xx_msix_entries[] = {
3930 { "qla2xxx (default)", qla82xx_msix_default },
3931 { "qla2xxx (rsp_q)", qla82xx_msix_rsp_q },
3932 };
3933
3934 static int
qla24xx_enable_msix(struct qla_hw_data * ha,struct rsp_que * rsp)3935 qla24xx_enable_msix(struct qla_hw_data *ha, struct rsp_que *rsp)
3936 {
3937 int i, ret;
3938 struct qla_msix_entry *qentry;
3939 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev);
3940 int min_vecs = QLA_BASE_VECTORS;
3941 struct irq_affinity desc = {
3942 .pre_vectors = QLA_BASE_VECTORS,
3943 };
3944
3945 if (QLA_TGT_MODE_ENABLED() && (ql2xenablemsix != 0) &&
3946 IS_ATIO_MSIX_CAPABLE(ha)) {
3947 desc.pre_vectors++;
3948 min_vecs++;
3949 }
3950
3951 if (USER_CTRL_IRQ(ha) || !ha->mqiobase) {
3952 /* user wants to control IRQ setting for target mode */
3953 ret = pci_alloc_irq_vectors(ha->pdev, min_vecs,
3954 ha->msix_count, PCI_IRQ_MSIX);
3955 } else
3956 ret = pci_alloc_irq_vectors_affinity(ha->pdev, min_vecs,
3957 ha->msix_count, PCI_IRQ_MSIX | PCI_IRQ_AFFINITY,
3958 &desc);
3959
3960 if (ret < 0) {
3961 ql_log(ql_log_fatal, vha, 0x00c7,
3962 "MSI-X: Failed to enable support, "
3963 "giving up -- %d/%d.\n",
3964 ha->msix_count, ret);
3965 goto msix_out;
3966 } else if (ret < ha->msix_count) {
3967 ql_log(ql_log_info, vha, 0x00c6,
3968 "MSI-X: Using %d vectors\n", ret);
3969 ha->msix_count = ret;
3970 /* Recalculate queue values */
3971 if (ha->mqiobase && (ql2xmqsupport || ql2xnvmeenable)) {
3972 ha->max_req_queues = ha->msix_count - 1;
3973
3974 /* ATIOQ needs 1 vector. That's 1 less QPair */
3975 if (QLA_TGT_MODE_ENABLED())
3976 ha->max_req_queues--;
3977
3978 ha->max_rsp_queues = ha->max_req_queues;
3979
3980 ha->max_qpairs = ha->max_req_queues - 1;
3981 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0190,
3982 "Adjusted Max no of queues pairs: %d.\n", ha->max_qpairs);
3983 }
3984 }
3985 vha->irq_offset = desc.pre_vectors;
3986 ha->msix_entries = kcalloc(ha->msix_count,
3987 sizeof(struct qla_msix_entry),
3988 GFP_KERNEL);
3989 if (!ha->msix_entries) {
3990 ql_log(ql_log_fatal, vha, 0x00c8,
3991 "Failed to allocate memory for ha->msix_entries.\n");
3992 ret = -ENOMEM;
3993 goto free_irqs;
3994 }
3995 ha->flags.msix_enabled = 1;
3996
3997 for (i = 0; i < ha->msix_count; i++) {
3998 qentry = &ha->msix_entries[i];
3999 qentry->vector = pci_irq_vector(ha->pdev, i);
4000 qentry->entry = i;
4001 qentry->have_irq = 0;
4002 qentry->in_use = 0;
4003 qentry->handle = NULL;
4004 }
4005
4006 /* Enable MSI-X vectors for the base queue */
4007 for (i = 0; i < QLA_BASE_VECTORS; i++) {
4008 qentry = &ha->msix_entries[i];
4009 qentry->handle = rsp;
4010 rsp->msix = qentry;
4011 scnprintf(qentry->name, sizeof(qentry->name),
4012 "qla2xxx%lu_%s", vha->host_no, msix_entries[i].name);
4013 if (IS_P3P_TYPE(ha))
4014 ret = request_irq(qentry->vector,
4015 qla82xx_msix_entries[i].handler,
4016 0, qla82xx_msix_entries[i].name, rsp);
4017 else
4018 ret = request_irq(qentry->vector,
4019 msix_entries[i].handler,
4020 0, qentry->name, rsp);
4021 if (ret)
4022 goto msix_register_fail;
4023 qentry->have_irq = 1;
4024 qentry->in_use = 1;
4025 }
4026
4027 /*
4028 * If target mode is enable, also request the vector for the ATIO
4029 * queue.
4030 */
4031 if (QLA_TGT_MODE_ENABLED() && (ql2xenablemsix != 0) &&
4032 IS_ATIO_MSIX_CAPABLE(ha)) {
4033 qentry = &ha->msix_entries[QLA_ATIO_VECTOR];
4034 rsp->msix = qentry;
4035 qentry->handle = rsp;
4036 scnprintf(qentry->name, sizeof(qentry->name),
4037 "qla2xxx%lu_%s", vha->host_no,
4038 msix_entries[QLA_ATIO_VECTOR].name);
4039 qentry->in_use = 1;
4040 ret = request_irq(qentry->vector,
4041 msix_entries[QLA_ATIO_VECTOR].handler,
4042 0, qentry->name, rsp);
4043 qentry->have_irq = 1;
4044 }
4045
4046 msix_register_fail:
4047 if (ret) {
4048 ql_log(ql_log_fatal, vha, 0x00cb,
4049 "MSI-X: unable to register handler -- %x/%d.\n",
4050 qentry->vector, ret);
4051 qla2x00_free_irqs(vha);
4052 ha->mqenable = 0;
4053 goto msix_out;
4054 }
4055
4056 /* Enable MSI-X vector for response queue update for queue 0 */
4057 if (IS_MQUE_CAPABLE(ha) &&
4058 (ha->msixbase && ha->mqiobase && ha->max_qpairs))
4059 ha->mqenable = 1;
4060 else
4061 ha->mqenable = 0;
4062
4063 ql_dbg(ql_dbg_multiq, vha, 0xc005,
4064 "mqiobase=%p, max_rsp_queues=%d, max_req_queues=%d.\n",
4065 ha->mqiobase, ha->max_rsp_queues, ha->max_req_queues);
4066 ql_dbg(ql_dbg_init, vha, 0x0055,
4067 "mqiobase=%p, max_rsp_queues=%d, max_req_queues=%d.\n",
4068 ha->mqiobase, ha->max_rsp_queues, ha->max_req_queues);
4069
4070 msix_out:
4071 return ret;
4072
4073 free_irqs:
4074 pci_free_irq_vectors(ha->pdev);
4075 goto msix_out;
4076 }
4077
4078 int
qla2x00_request_irqs(struct qla_hw_data * ha,struct rsp_que * rsp)4079 qla2x00_request_irqs(struct qla_hw_data *ha, struct rsp_que *rsp)
4080 {
4081 int ret = QLA_FUNCTION_FAILED;
4082 device_reg_t *reg = ha->iobase;
4083 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev);
4084
4085 /* If possible, enable MSI-X. */
4086 if (ql2xenablemsix == 0 || (!IS_QLA2432(ha) && !IS_QLA2532(ha) &&
4087 !IS_QLA8432(ha) && !IS_CNA_CAPABLE(ha) && !IS_QLA2031(ha) &&
4088 !IS_QLAFX00(ha) && !IS_QLA27XX(ha) && !IS_QLA28XX(ha)))
4089 goto skip_msi;
4090
4091 if (ql2xenablemsix == 2)
4092 goto skip_msix;
4093
4094 if (ha->pdev->subsystem_vendor == PCI_VENDOR_ID_HP &&
4095 (ha->pdev->subsystem_device == 0x7040 ||
4096 ha->pdev->subsystem_device == 0x7041 ||
4097 ha->pdev->subsystem_device == 0x1705)) {
4098 ql_log(ql_log_warn, vha, 0x0034,
4099 "MSI-X: Unsupported ISP 2432 SSVID/SSDID (0x%X,0x%X).\n",
4100 ha->pdev->subsystem_vendor,
4101 ha->pdev->subsystem_device);
4102 goto skip_msi;
4103 }
4104
4105 if (IS_QLA2432(ha) && (ha->pdev->revision < QLA_MSIX_CHIP_REV_24XX)) {
4106 ql_log(ql_log_warn, vha, 0x0035,
4107 "MSI-X; Unsupported ISP2432 (0x%X, 0x%X).\n",
4108 ha->pdev->revision, QLA_MSIX_CHIP_REV_24XX);
4109 goto skip_msix;
4110 }
4111
4112 ret = qla24xx_enable_msix(ha, rsp);
4113 if (!ret) {
4114 ql_dbg(ql_dbg_init, vha, 0x0036,
4115 "MSI-X: Enabled (0x%X, 0x%X).\n",
4116 ha->chip_revision, ha->fw_attributes);
4117 goto clear_risc_ints;
4118 }
4119
4120 skip_msix:
4121
4122 ql_log(ql_log_info, vha, 0x0037,
4123 "Falling back-to MSI mode -- ret=%d.\n", ret);
4124
4125 if (!IS_QLA24XX(ha) && !IS_QLA2532(ha) && !IS_QLA8432(ha) &&
4126 !IS_QLA8001(ha) && !IS_P3P_TYPE(ha) && !IS_QLAFX00(ha) &&
4127 !IS_QLA27XX(ha) && !IS_QLA28XX(ha))
4128 goto skip_msi;
4129
4130 ret = pci_alloc_irq_vectors(ha->pdev, 1, 1, PCI_IRQ_MSI);
4131 if (ret > 0) {
4132 ql_dbg(ql_dbg_init, vha, 0x0038,
4133 "MSI: Enabled.\n");
4134 ha->flags.msi_enabled = 1;
4135 } else
4136 ql_log(ql_log_warn, vha, 0x0039,
4137 "Falling back-to INTa mode -- ret=%d.\n", ret);
4138 skip_msi:
4139
4140 /* Skip INTx on ISP82xx. */
4141 if (!ha->flags.msi_enabled && IS_QLA82XX(ha))
4142 return QLA_FUNCTION_FAILED;
4143
4144 ret = request_irq(ha->pdev->irq, ha->isp_ops->intr_handler,
4145 ha->flags.msi_enabled ? 0 : IRQF_SHARED,
4146 QLA2XXX_DRIVER_NAME, rsp);
4147 if (ret) {
4148 ql_log(ql_log_warn, vha, 0x003a,
4149 "Failed to reserve interrupt %d already in use.\n",
4150 ha->pdev->irq);
4151 goto fail;
4152 } else if (!ha->flags.msi_enabled) {
4153 ql_dbg(ql_dbg_init, vha, 0x0125,
4154 "INTa mode: Enabled.\n");
4155 ha->flags.mr_intr_valid = 1;
4156 /* Set max_qpair to 0, as MSI-X and MSI in not enabled */
4157 ha->max_qpairs = 0;
4158 }
4159
4160 clear_risc_ints:
4161 if (IS_FWI2_CAPABLE(ha) || IS_QLAFX00(ha))
4162 goto fail;
4163
4164 spin_lock_irq(&ha->hardware_lock);
4165 wrt_reg_word(®->isp.semaphore, 0);
4166 spin_unlock_irq(&ha->hardware_lock);
4167
4168 fail:
4169 return ret;
4170 }
4171
4172 void
qla2x00_free_irqs(scsi_qla_host_t * vha)4173 qla2x00_free_irqs(scsi_qla_host_t *vha)
4174 {
4175 struct qla_hw_data *ha = vha->hw;
4176 struct rsp_que *rsp;
4177 struct qla_msix_entry *qentry;
4178 int i;
4179
4180 /*
4181 * We need to check that ha->rsp_q_map is valid in case we are called
4182 * from a probe failure context.
4183 */
4184 if (!ha->rsp_q_map || !ha->rsp_q_map[0])
4185 goto free_irqs;
4186 rsp = ha->rsp_q_map[0];
4187
4188 if (ha->flags.msix_enabled) {
4189 for (i = 0; i < ha->msix_count; i++) {
4190 qentry = &ha->msix_entries[i];
4191 if (qentry->have_irq) {
4192 irq_set_affinity_notifier(qentry->vector, NULL);
4193 free_irq(pci_irq_vector(ha->pdev, i), qentry->handle);
4194 }
4195 }
4196 kfree(ha->msix_entries);
4197 ha->msix_entries = NULL;
4198 ha->flags.msix_enabled = 0;
4199 ql_dbg(ql_dbg_init, vha, 0x0042,
4200 "Disabled MSI-X.\n");
4201 } else {
4202 free_irq(pci_irq_vector(ha->pdev, 0), rsp);
4203 }
4204
4205 free_irqs:
4206 pci_free_irq_vectors(ha->pdev);
4207 }
4208
qla25xx_request_irq(struct qla_hw_data * ha,struct qla_qpair * qpair,struct qla_msix_entry * msix,int vector_type)4209 int qla25xx_request_irq(struct qla_hw_data *ha, struct qla_qpair *qpair,
4210 struct qla_msix_entry *msix, int vector_type)
4211 {
4212 const struct qla_init_msix_entry *intr = &msix_entries[vector_type];
4213 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev);
4214 int ret;
4215
4216 scnprintf(msix->name, sizeof(msix->name),
4217 "qla2xxx%lu_qpair%d", vha->host_no, qpair->id);
4218 ret = request_irq(msix->vector, intr->handler, 0, msix->name, qpair);
4219 if (ret) {
4220 ql_log(ql_log_fatal, vha, 0x00e6,
4221 "MSI-X: Unable to register handler -- %x/%d.\n",
4222 msix->vector, ret);
4223 return ret;
4224 }
4225 msix->have_irq = 1;
4226 msix->handle = qpair;
4227 return ret;
4228 }
4229