1 /****************************************************************************** 2 * Copyright (c) 2022 Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK") 3 * All rights reserved. 4 * 5 * Licensed under the Apache License, Version 2.0 (the "License"); 6 * you may not use this file except in compliance with the License. 7 * You may obtain a copy of the License at 8 * 9 * http://www.apache.org/licenses/LICENSE-2.0 10 * 11 * Unless required by applicable law or agreed to in writing, software 12 * distributed under the License is distributed on an "AS IS" BASIS, 13 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 14 * See the License for the specific language governing permissions and 15 * limitations under the License. 16 * 17 *****************************************************************************/ 18 #ifndef INTERRUPT_REG_H 19 #define INTERRUPT_REG_H 20 #include "../sys.h" 21 22 /******************************* interrupt registers: ******************************/ 23 #define reg_irq_feature (*(volatile unsigned long *)(0 + (0xe4000000))) 24 25 #define reg_irq_pending(i) (*(volatile unsigned long *)(0 + (0xe4001000 + (((i) > 31) ? 4 : 0)))) 26 27 #define reg_irq_src0 (*(volatile unsigned long *)(0 + (0xe4002000))) 28 #define reg_irq_src1 (*(volatile unsigned long *)(0 + (0xe4002004))) 29 30 #define reg_irq_src(i) (*(volatile unsigned long *)(0 + (0xe4002000 + (((i) > 31) ? 4 : 0)))) 31 32 #define reg_irq_threshold (*(volatile unsigned long *)(0 + (0xe4200000))) 33 #define reg_irq_done (*(volatile unsigned long *)(0 + (0xe4200004))) 34 35 #define reg_irq_src_priority(i) (*(volatile unsigned long *)(0 + 0xe4000000 + ((i) << 2))) 36 37 #endif 38