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1 /*
2  * Copyright (C) 2021 HiSilicon (Shanghai) Technologies CO., LIMITED.
3  *
4  * This program is free software; you can redistribute it and/or
5  * modify it under the terms of the GNU General Public License
6  * as published by the Free Software Foundation; either version 2
7  * of the License, or (at your option) any later version.
8  *
9  * This program is distributed in the hope that it will be useful,
10  * but WITHOUT ANY WARRANTY; without even the implied warranty of
11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
12  * GNU General Public License for more details.
13  *
14  * You should have received a copy of the GNU General Public License
15  * along with this program; if not, write to the Free Software
16  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
17  */
18 
19 #ifndef __DRV_SYMC_H__
20 #define __DRV_SYMC_H__
21 
22 #include "hi_types.h"
23 #include "drv_cipher_kapi.h"
24 #include "drv_osal_lib.h"
25 
26 /* symmetric cipher max key size in words */
27 #define SYMC_KEY_MAX_SIZE_IN_WORD      8
28 
29 /* symmetric cipher max iv size in word */
30 #define SYMC_IV_MAX_SIZE_IN_WORD       4
31 
32 /* symmetric sm1 sk size in words */
33 #define SYMC_SM1_SK_SIZE_IN_WORD       4
34 
35 /* DES BLOCK size */
36 #define DES_BLOCK_SIZE                 8
37 
38 /* Numbers of nodes list */
39 #define SYMC_MAX_LIST_NUM              16
40 
41 /* Length of CCM N */
42 #define SYMC_CCM_N_LEN                 16
43 
44 /* Length of CCM A head */
45 #define SYMC_CCM_A_HEAD_LEN            16
46 
47 /* Length of GCM CLEN */
48 #define SYMC_GCM_CLEN_LEN              16
49 
50 /* Small length of CCM A  */
51 #define SYMC_CCM_A_SMALL_LEN           (0x10000 - 0x100)
52 
53 /* If 2^16 - 2^8 <= a < 2^32, then a  is encoded as 0xff || 0xfe || a[0..31], i.e., six octets. */
54 #define SYMC_AAD_PAD_VAL_FF            0xFF
55 #define SYMC_AAD_PAD_VAL_FE            0xFE
56 
57 /* AES KEY size 128bit */
58 #define AES_KEY_128BIT                 16
59 
60 /* AES KEY size 192bit */
61 #define AES_KEY_192BIT                 24
62 
63 /* AES KEY size 256bit */
64 #define AES_KEY_256BIT                 32
65 
66 /* DES KEY size 128bit */
67 #define DES_KEY_SIZE                   8
68 
69 /* TDES KEY size 128bit */
70 #define TDES_KEY_128BIT                16
71 
72 /* TDES KEY size 192bit */
73 #define TDES_KEY_192BIT                24
74 
75 /* DES block size */
76 #define DES_BLOCK_SIZE                 8
77 
78 /* SM1 KEY size */
79 #define SM1_AK_EK_SIZE                 32
80 #define SM1_SK_SIZE                    16
81 
82 /* SM4 KEY size */
83 #define SM4_KEY_SIZE                   16
84 
85 /* symmetric cipher width */
86 typedef enum {
87     SYMC_DAT_WIDTH_128 = 0,
88     SYMC_DAT_WIDTH_8,
89     SYMC_DAT_WIDTH_1,
90     SYMC_DAT_WIDTH_64 = 3,
91     SYMC_DAT_WIDTH_COUNT,
92 } symc_width;
93 
94 /* symmetric cipher algorithm */
95 typedef enum {
96     SYMC_ALG_DES,         /* Data Encryption Standard  */
97     SYMC_ALG_TDES,        /* Triple Data Encryption Standard  */
98     SYMC_ALG_AES,         /* Advanced Encryption Standard  */
99     SYMC_ALG_SM4,         /* SM4 Algorithm  */
100     SYMC_ALG_SM1,         /* SM1 Algorithm  */
101     SYMC_ALG_NULL_CIPHER, /* null cipher, dma copy  */
102     SYMC_ALG_COUNT,
103 } symc_alg;
104 
105 /* symmetric cipher key length */
106 typedef enum {
107     SYMC_KEY_DEFAULT = 0,       /* Default, aes-128, 3des-192, sm1-256, sm4-128 */
108     SYMC_KEY_AES_192BIT,        /* AES 192 bit key */
109     SYMC_KEY_AES_256BIT,        /* AES 256 bit key */
110     SYMC_KEY_TDES_2KEY,         /* 3DES 128 bit key */
111     SYMC_KEY_LEN_COUNT,
112 } symc_klen;
113 
114 /* symmetric cipher mode */
115 typedef enum {
116     SYMC_MODE_ECB = 0, /* Electronic Codebook Mode */
117     SYMC_MODE_CBC,     /* Cipher Block Chaining */
118     SYMC_MODE_CFB,     /* Cipher Feedback Mode */
119     SYMC_MODE_OFB,     /* Output Feedback Mode */
120     SYMC_MODE_CTR,     /* Counter Mode */
121     SYMC_MODE_CCM,     /* Counter with Cipher Block Chaining-Message Authentication Code */
122     SYMC_MODE_GCM,     /* Galois/Counter Mode */
123     SYMC_MODE_CTS,     /* CTS Mode */
124     SYMC_MODE_COUNT,
125 } symc_mode;
126 
127 /* locational of buffer under symmetric cipher */
128 typedef enum {
129     SYMC_NODE_USAGE_NORMAL      = 0x00, /* The normal buffer, don't update the iv */
130     SYMC_NODE_USAGE_FIRST       = 0x01, /* The first buffer, the usage of iv is expired */
131     SYMC_NODE_USAGE_LAST        = 0x02, /* The last buffer, must update the iv */
132     SYMC_NODE_USAGE_ODD_KEY     = 0x40, /* Use the odd key to encrypt or decrypt this buffer */
133     SYMC_NODE_USAGE_EVEN_KEY    = 0x00, /* Use the even key to encrypt or decrypt this buffer */
134     SYMC_NODE_USAGE_IN_GCM_A    = 0x00, /* The buffer of GCM A */
135     SYMC_NODE_USAGE_IN_GCM_P    = 0x08, /* The buffer of GCM P */
136     SYMC_NODE_USAGE_IN_GCM_LEN  = 0x10, /* The buffer of GCM LEN */
137     SYMC_NODE_USAGE_IN_CCM_N    = 0x00, /* The buffer of CCM N */
138     SYMC_NODE_USAGE_IN_CCM_A    = 0x08, /* The buffer of CCM A */
139     SYMC_NODE_USAGE_IN_CCM_P    = 0x10, /* The buffer of CCM P */
140     SYMC_NODE_USAGE_CCM_LAST    = 0x20, /* The buffer of CCM LAST */
141 } symc_node_usage;
142 
143 /* symc error code */
144 typedef enum {
145     HI_SYMC_ERR_ALG_INVALID = HI_BASE_ERR_BASE_SYMC, /* invalid algorithm */
146     HI_SYMC_ERR_MODE_INVALID,       /* invalid mode */
147     HI_SYMC_ERR_LEN_INVALID,        /* data length invalid */
148     HI_SYMC_ERR_IV_LEN_INVALID,     /* IV length invalid */
149     HI_SYMC_ERR_TAG_LEN_INVALID,    /* TAG length invalid */
150     HI_SYMC_ERR_KEY_LEN_INVALID,    /* key length invalid */
151     HI_SYMC_ERR_KEY_INVALID,        /* key invalid */
152     HI_SYMC_ERR_ID_INVALID,         /* channel id invalid */
153     HI_SYMC_ERR_SMMU_INVALID,       /* SMMU invalid */
154     HI_SYMC_ERR_TIME_OUT,           /* encrypt/decrypt timeout */
155     HI_SYMC_ERR_BUSY,               /* busy */
156 } symc_error_code;
157 
158 typedef struct {
159     hi_u32 id;
160     char *open;
161     char *alg;
162     char *mode;
163     hi_u32 klen;
164     char *ksrc;
165     hi_u8 decrypt;
166     hi_u32 inlen;
167     hi_u32 inaddr;
168     hi_u32 outlen;
169     hi_u32 outaddr;
170     hi_u8 intswitch;
171     hi_u8 inten;
172     hi_u8 inraw;
173     hi_u8 outen;
174     hi_u8 outraw;
175     hi_u32 outintcnt;
176     char  iv[AES_IV_SIZE * MUL_VAL_2 + BOUND_VAL_1];
177 } symc_chn_status;
178 
179 /* symc capacity, 0-nonsupport, 1-support */
180 typedef struct {
181     hi_u32 aes_ecb     : 1;    /* Support AES ECB  */
182     hi_u32 aes_cbc     : 1;    /* Support AES CBC  */
183     hi_u32 aes_cfb     : 1;    /* Support AES CFB  */
184     hi_u32 aes_ofb     : 1;    /* Support AES OFB  */
185     hi_u32 aes_ctr     : 1;    /* Support AES CTR  */
186     hi_u32 aes_ccm     : 1;    /* Support AES CCM  */
187     hi_u32 aes_gcm     : 1;    /* Support AES GCM  */
188     hi_u32 aes_cts     : 1;    /* Support AES CTS  */
189     hi_u32 tdes_ecb    : 1;    /* Support TDES ECB */
190     hi_u32 tdes_cbc    : 1;    /* Support TDES CBC */
191     hi_u32 tdes_cfb    : 1;    /* Support TDES CFB */
192     hi_u32 tdes_ofb    : 1;    /* Support TDES OFB */
193     hi_u32 tdes_ctr    : 1;    /* Support TDES CTR */
194     hi_u32 des_ecb     : 1;    /* Support DES ECB */
195     hi_u32 des_cbc     : 1;    /* Support DES CBC */
196     hi_u32 des_cfb     : 1;    /* Support DES CFB */
197     hi_u32 des_ofb     : 1;    /* Support DES OFB */
198     hi_u32 des_ctr     : 1;    /* Support DES CTR */
199     hi_u32 sm1_ecb     : 1;    /* Support SM1 ECB  */
200     hi_u32 sm1_cbc     : 1;    /* Support SM1 CBC  */
201     hi_u32 sm1_cfb     : 1;    /* Support SM1 CFB  */
202     hi_u32 sm1_ofb     : 1;    /* Support SM1 OFB  */
203     hi_u32 sm1_ctr     : 1;    /* Support SM1 CTR  */
204     hi_u32 sm4_ecb     : 1;    /* Support SM4 ECB  */
205     hi_u32 sm4_cbc     : 1;    /* Support SM4 CBC  */
206     hi_u32 sm4_cfb     : 1;    /* Support SM4 CFB  */
207     hi_u32 sm4_ofb     : 1;    /* Support SM4 OFB  */
208     hi_u32 sm4_ctr     : 1;    /* Support SM4 CTR  */
209     hi_u32 dma         : 1;    /* Support DMA  */
210 } symc_capacity;
211 
212 typedef struct {
213     compat_addr *in;
214     compat_addr *out;
215     hi_u32 *len;
216     symc_node_usage *usage;
217     hi_u32 num;
218 } symc_multi_pack;
219 
220 /*
221  * \brief          symc context structure
222  *
223  * \note           if the aes key derived from klad, the context must
224  *                 attached with a independent hard key channel,
225  *                 otherwise the context can attached with a fixed common channel.
226  */
227 typedef struct {
228     hi_u32 even_key[SYMC_KEY_SIZE / WORD_WIDTH];    /* SYMC even round keys, default */
229     hi_u32 odd_key[SYMC_KEY_SIZE / WORD_WIDTH];     /* SYMC odd round keys, default */
230     hi_u32 sk[SYMC_SM1_SK_SIZE / WORD_WIDTH];       /* sm1 sk */
231     hi_u32 iv[AES_IV_SIZE / WORD_WIDTH];            /* symc IV */
232     hi_u32 tag[AEAD_TAG_SIZE / WORD_WIDTH];         /* aead tag */
233     hi_u32 ivlen;                                   /* symc IV length */
234     hi_u32 iv_usage;                                /* symc IV usage */
235 
236     hi_u32 hard_chn;             /* hard channel number */
237     hi_u32 hard_key;             /* Key derived from klad or CPU */
238 
239     symc_alg alg;                /* Symmetric cipher algorithm */
240     symc_width width;            /* Symmetric cipher width */
241     hi_u32 klen;                 /* Symmetric cipher key length */
242 
243     compat_addr aad;             /* Associated Data */
244     hi_u32 alen;                 /* Associated Data length */
245     hi_u32 tlen;                 /* Tag length */
246 
247     symc_mode mode;              /* Symmetric cipher mode */
248 
249     hi_u32 sm1_round;            /* SM1 round number */
250     hi_u32 enclen;               /* encrypt length */
251 
252     hi_u32 block_size;           /* Block size */
253 
254     hi_u32 cur_nodes;            /* current nodes id  */
255     hi_u32 total_nodes;          /* total number of nodes */
256 
257     compat_addr *input_list;     /* input node list */
258     compat_addr *output_list;    /* output node list */
259     hi_u32 *length_list;         /* length of node list */
260     symc_node_usage *usage_list; /* usage of node list */
261     hi_bool tdes2dma;            /* 3des with invalid key turns to dma */
262 } cryp_symc_context;
263 
264 typedef hi_s32 (*callback_symc_isr)(hi_void *ctx);
265 typedef hi_void (*callback_symc_destroy)(hi_void);
266 
267 /*
268  * brief  Initialize the symc module.
269  * retval     On success, HI_SUCCESS is returned.  On error, HI_FAILURE is returned.
270  */
271 hi_s32 drv_symc_init(hi_void);
272 
273 /*
274  * brief  Deinitialize the symc module.
275  * retval     On success, HI_SUCCESS is returned.  On error, HI_FAILURE is returned.
276  */
277 hi_s32 drv_symc_deinit(hi_void);
278 
279 /*
280  * brief  suspend the symc module.
281  * retval     On success, HI_SUCCESS is returned.  On error, HI_FAILURE is returned.
282  */
283 hi_void drv_symc_suspend(hi_void);
284 
285 /*
286  * brief  resume the symc module.
287  * retval     On success, HI_SUCCESS is returned.  On error, HI_FAILURE is returned.
288  */
289 hi_s32 drv_symc_resume(hi_void);
290 
291 /*
292  * brief  allocate a hard symc channel.
293  * param[out]  chn_num The channel number.
294  * retval     On success, HI_SUCCESS is returned.  On error, HI_FAILURE is returned.
295  */
296 hi_s32 drv_symc_alloc_chn(hi_u32 *chn_num);
297 
298 /*
299  * brief  free a hard symc channel.
300  * param[in]  chn_num The channel number.
301  * retval     On success, HI_SUCCESS is returned.  On error, HI_FAILURE is returned.
302  */
303 hi_void drv_symc_free_chn(hi_u32 chn_num);
304 
305 /*
306  * brief  set the iv to the symc module.
307  * param[in]  chn_num The channel number.
308  * retval     NA.
309  */
310 hi_s32 drv_symc_reset(hi_u32 chn_num);
311 
312 /*
313  * brief  symc get error code.
314  * param[in]  chn_num The channel number.
315  * retval     NA.
316  */
317 hi_void drv_symc_get_err_code(hi_u32 chn_num);
318 
319 /*
320  * brief  check the length of nodes list.
321  * param[in]  alg The symmetric cipher algorithm.
322  * param[in]  mode The symmetric cipher mode.
323  * param[in]  block_size The block size.
324  * param[in]  pack pack data info.
325  * retval     On success, HI_SUCCESS is returned.  On error, HI_FAILURE is returned.
326  * retval     On success, HI_SUCCESS is returned.  On error, HI_FAILURE is returned.
327  */
328 hi_s32 drv_symc_node_check(symc_alg alg, symc_mode mode, symc_klen klen, hi_u32 block_size, symc_multi_pack *pack);
329 
330 /*
331  * brief  set work params.
332  * param[in]  ctx cryp symc context info.
333  * param[in]  decrypt Decrypt or encrypt.
334  * param[in]  klen The key length.
335  * retval     On success, HI_SUCCESS is returned.  On error, HI_FAILURE is returned.
336  */
337 hi_s32 drv_symc_cfg(cryp_symc_context *ctx, hi_u32 decrypt, symc_klen klen);
338 
339 /*
340  * brief  set the iv to the symc module.
341  * param[in]  chn_num The channel number.
342  * param[in]  iv The IV data, hardware use the valid bytes according to the alg.
343  * param[in]  flag The IV flag, should be HI_CIPHER_IV_CHG_ONE_PACK or HI_CIPHER_IV_CHG_ALL_PACK.
344  * retval     NA.
345  */
346 hi_s32 drv_symc_set_iv(hi_u32 chn_num, const hi_u32 iv[SYMC_IV_MAX_SIZE_IN_WORD], hi_u32 ivlen, hi_u32 flag);
347 
348 /*
349  * brief  get the iv to the symc module.
350  * param[in]  chn_num The channel number.
351  * param[out] iv The IV data, the length is 16.
352  * retval     NA.
353  */
354 hi_void drv_symc_get_iv(hi_u32 chn_num, hi_u32 iv[SYMC_IV_MAX_SIZE_IN_WORD]);
355 
356 /*
357  * brief  set the key to the symc module.
358  * param[in]  chn_num The channel number.
359  * param[in]  key The key data, hardware use the valid bytes according to the alg.
360  * param[in]  odd This id odd key or not .
361  * retval     NA.
362  */
363 hi_void drv_symc_set_key(hi_u32 chn_num, const hi_u32 key[SYMC_KEY_MAX_SIZE_IN_WORD], hi_u32 key_len, hi_u32 odd);
364 
365 /*
366  * brief  set the sm1 sk to the symc module.
367  * param[in]  chn_num The channel number.
368  * param[in]  key The sk data, the length is 16.
369  * retval     NA.
370  */
371 hi_void drv_symc_set_sm1_sk(hi_u32 chn_num, const hi_u32 key[SYMC_SM1_SK_SIZE_IN_WORD], hi_u32 key_len);
372 
373 /*
374  * brief  add a in buffer to the nodes list.
375  * param[in]  chn_num The channel number.
376  * param[in]  buf_phy The MMZ/SMMU address of in buffer.
377  * param[in]  buf_size The MMZ/SMMU size of in buffer.
378  * param[in]  local The locational of in buffer under a symmetric cipher.
379  * retval     On success, HI_SUCCESS is returned.  On error, HI_FAILURE is returned.
380  */
381 hi_s32 drv_symc_add_inbuf(hi_u32 chn_num, compat_addr buf_phy, hi_u32 buf_size, symc_node_usage usage);
382 
383 /*
384  * brief  add a out buffer to the nodes list.
385  * param[in]  chn_num The channel number.
386  * param[in]  buf_phy The MMZ/SMMU address of out buffer.
387  * param[in]  buf_size The MMZ/SMMU size of out buffer.
388  * param[in]  local The locational of in buffer under a symmetric cipher.
389  * retval     On success, HI_SUCCESS is returned.  On error, HI_FAILURE is returned.
390  */
391 hi_s32 drv_symc_add_outbuf(hi_u32 chn_num, compat_addr buf_phy, hi_u32 buf_size, symc_node_usage usage);
392 
393 /*
394  * brief  add a buffer usage to the nodes list.
395  * param[in]  chn_num The channel number.
396  * param[in]  in in or out.
397  * param[in]  usage usage.
398  * retval     On success, HI_SUCCESS is returned.  On error, HI_FAILURE is returned.
399  */
400 hi_void drv_symc_add_buf_usage(hi_u32 chn_num, hi_u32 in, symc_node_usage usage);
401 
402 /*
403  * brief  add N of CCM to the nodes list.
404  * param[in]  chn_num The channel number.
405  * param[in]  nonce The buffer of n, the size is 16.
406  * param[in]  nonce_len The buffer of n, the size is 16.
407  * retval     On success, HI_SUCCESS is returned.  On error, HI_FAILURE is returned.
408  */
409 hi_s32 drv_aead_ccm_add_n(hi_u32 chn_num, hi_u8 *nonce, hi_u32 nonce_len);
410 
411 /*
412  * brief  add A of CCM to the nodes list.
413  * param[in]  chn_num The channel number.
414  * param[in]  buf_phy The MMZ/SMMU address of A.
415  * param[in]  buf_size The MMZ/SMMU size of A.
416  * retval     On success, HI_SUCCESS is returned.  On error, HI_FAILURE is returned.
417  */
418 hi_s32 drv_aead_ccm_add_a(hi_u32 chn_num, compat_addr buf_phy, hi_u32 buf_size);
419 
420 /*
421  * brief  add A of GCM to the nodes list.
422  * param[in]  chn_num The channel number.
423  * param[in]  buf_phy The MMZ/SMMU address of A.
424  * param[in]  buf_size The MMZ/SMMU size of A.
425  * retval     On success, HI_SUCCESS is returned.  On error, HI_FAILURE is returned.
426  */
427 hi_s32 drv_aead_gcm_add_a(hi_u32 chn_num, compat_addr buf_phy, hi_u32 buf_size);
428 
429 /*
430  * brief  add length field of GCM to the nodes list.
431  * param[in]  chn_num The channel number.
432  * param[in]  buf_phy The MMZ/SMMU address of length field, the size is 16.
433  * retval     On success, HI_SUCCESS is returned.  On error, HI_FAILURE is returned.
434  */
435 hi_s32 drv_aead_gcm_add_clen(hi_u32 chn_num, hi_u8 *clen, hi_u32 clen_len);
436 
437 /*
438  * brief  get ccm/gcm tag.
439  * param[in]   chn_num The channel number.
440  * param[out]  tag The tag value.
441  * param[in]   tag_buf_len length in byte.
442  * retval     On received interception, HI_TRUE is returned  otherwise HI_FALSE is returned.
443  */
444 hi_s32 drv_aead_get_tag(hi_u32 chn_num, hi_u32 *tag, hi_u32 tag_buf_len);
445 
446 /*
447  * brief  start symmetric cipher calculation.
448  * param[in]  chn_num The channel number.
449  * retval     On success, HI_SUCCESS is returned.  On error, HI_FAILURE is returned.
450  */
451 hi_s32 drv_symc_start(hi_u32 chn_num);
452 
453 /*
454  * brief  wait running finished.
455  * param[in]  chn_num The channel number.
456  * retval     On received interception, HI_TRUE is returned  otherwise HI_FALSE is returned.
457  */
458 hi_s32 drv_symc_wait_done(hi_u32 chn_num, hi_u32 timeout);
459 
460 /*
461  * brief  set isr callback function.
462  * param[in]  chn_num The channel number.
463  * retval     On finished, HI_TRUE is returned otherwise HI_FALSE is returned.
464  */
465 hi_s32 drv_symc_set_isr_callback(hi_u32 chn_num, callback_symc_isr callback, hi_void *tx);
466 
467 /*
468  * brief  proc status.
469  * param[in]  status The  proc status.
470  * retval     On received interception, HI_TRUE is returned  otherwise HI_FALSE is returned.
471  */
472 hi_s32 drv_symc_proc_status(symc_chn_status *status);
473 
474 /*
475  * brief  get the symc capacity.
476  * param[out] capacity The symc capacity.
477  * retval     NA.
478  */
479 hi_void drv_symc_get_capacity(symc_capacity *capacity);
480 
481 /*
482  * brief  check drv symc is secure or not.
483  * retval     NA.
484  */
485 hi_u32 drv_symc_is_secure(hi_void);
486 
487 #endif /* End of __DRV_SYMC_H__ */
488