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/device/board/unionman/unionpi_tiger/kernel/drivers/rtl88x2cs/include/byteorder/
Dlittle_endian.h28 #define __constant_htonl(x) ___constant_swab32((x)) argument
29 #define __constant_ntohl(x) ___constant_swab32((x)) argument
30 #define __constant_htons(x) ___constant_swab16((x)) argument
31 #define __constant_ntohs(x) ___constant_swab16((x)) argument
32 #define __constant_cpu_to_le64(x) ((__u64)(x)) argument
33 #define __constant_le64_to_cpu(x) ((__u64)(x)) argument
34 #define __constant_cpu_to_le32(x) ((__u32)(x)) argument
35 #define __constant_le32_to_cpu(x) ((__u32)(x)) argument
36 #define __constant_cpu_to_le16(x) ((__u16)(x)) argument
37 #define __constant_le16_to_cpu(x) ((__u16)(x)) argument
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Dbig_endian.h27 #define __constant_htonl(x) ((__u32)(x)) argument
28 #define __constant_ntohl(x) ((__u32)(x)) argument
29 #define __constant_htons(x) ((__u16)(x)) argument
30 #define __constant_ntohs(x) ((__u16)(x)) argument
31 #define __constant_cpu_to_le64(x) ___constant_swab64((x)) argument
32 #define __constant_le64_to_cpu(x) ___constant_swab64((x)) argument
33 #define __constant_cpu_to_le32(x) ___constant_swab32((x)) argument
34 #define __constant_le32_to_cpu(x) ___constant_swab32((x)) argument
35 #define __constant_cpu_to_le16(x) ___constant_swab16((x)) argument
36 #define __constant_le16_to_cpu(x) ___constant_swab16((x)) argument
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/device/soc/hisilicon/hi3861v100/sdk_liteos/platform/os/Huawei_LiteOS/components/lib/libc/musl/include/
Dtgmath.h16 #define __IS_FP(x) (sizeof((x)+1ULL) == sizeof((x)+1.0f)) argument
17 #define __IS_CX(x) (__IS_FP(x) && sizeof(x) == sizeof((x)+I)) argument
18 #define __IS_REAL(x) (__IS_FP(x) && 2*sizeof(x) == sizeof((x)+I)) argument
20 #define __FLT(x) (__IS_REAL(x) && sizeof(x) == sizeof(float)) argument
21 #define __LDBL(x) (__IS_REAL(x) && sizeof(x) == sizeof(long double) && sizeof(long double) != sizeo… argument
23 #define __FLTCX(x) (__IS_CX(x) && sizeof(x) == sizeof(float complex)) argument
24 #define __DBLCX(x) (__IS_CX(x) && sizeof(x) == sizeof(double complex)) argument
25 #define __LDBLCX(x) (__IS_CX(x) && sizeof(x) == sizeof(long double complex) && sizeof(long double) … argument
50 #define __RETCAST(x) ( \ argument
53 #define __RETCAST_2(x, y) ( \ argument
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Dendian.h35 #define htobe16(x) __bswap16(x) argument
36 #define be16toh(x) __bswap16(x) argument
37 #define htobe32(x) __bswap32(x) argument
38 #define be32toh(x) __bswap32(x) argument
39 #define htobe64(x) __bswap64(x) argument
40 #define be64toh(x) __bswap64(x) argument
41 #define htole16(x) (uint16_t)(x) argument
42 #define le16toh(x) (uint16_t)(x) argument
43 #define htole32(x) (uint32_t)(x) argument
44 #define le32toh(x) (uint32_t)(x) argument
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/device/soc/hpmicro/sdk/hpm_sdk/soc/HPM6750/
Dhpm_csr_regs.h186 #define CSR_USTATUS_UPIE_SET(x) (((uint32_t)(x) << CSR_USTATUS_UPIE_SHIFT) & CSR_USTATUS_UPIE_MASK) argument
187 #define CSR_USTATUS_UPIE_GET(x) (((uint32_t)(x) & CSR_USTATUS_UPIE_MASK) >> CSR_USTATUS_UPIE_SHIFT) argument
198 #define CSR_USTATUS_UIE_SET(x) (((uint32_t)(x) << CSR_USTATUS_UIE_SHIFT) & CSR_USTATUS_UIE_MASK) argument
199 #define CSR_USTATUS_UIE_GET(x) (((uint32_t)(x) & CSR_USTATUS_UIE_MASK) >> CSR_USTATUS_UIE_SHIFT) argument
211 #define CSR_UIE_UEIE_SET(x) (((uint32_t)(x) << CSR_UIE_UEIE_SHIFT) & CSR_UIE_UEIE_MASK) argument
212 #define CSR_UIE_UEIE_GET(x) (((uint32_t)(x) & CSR_UIE_UEIE_MASK) >> CSR_UIE_UEIE_SHIFT) argument
223 #define CSR_UIE_UTIE_SET(x) (((uint32_t)(x) << CSR_UIE_UTIE_SHIFT) & CSR_UIE_UTIE_MASK) argument
224 #define CSR_UIE_UTIE_GET(x) (((uint32_t)(x) & CSR_UIE_UTIE_MASK) >> CSR_UIE_UTIE_SHIFT) argument
235 #define CSR_UIE_USIE_SET(x) (((uint32_t)(x) << CSR_UIE_USIE_SHIFT) & CSR_UIE_USIE_MASK) argument
236 #define CSR_UIE_USIE_GET(x) (((uint32_t)(x) & CSR_UIE_USIE_MASK) >> CSR_UIE_USIE_SHIFT) argument
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/device/soc/hpmicro/sdk/hpm_sdk/soc/HPM6360/
Dhpm_csr_regs.h186 #define CSR_USTATUS_UPIE_SET(x) (((uint32_t)(x) << CSR_USTATUS_UPIE_SHIFT) & CSR_USTATUS_UPIE_MASK) argument
187 #define CSR_USTATUS_UPIE_GET(x) (((uint32_t)(x) & CSR_USTATUS_UPIE_MASK) >> CSR_USTATUS_UPIE_SHIFT) argument
198 #define CSR_USTATUS_UIE_SET(x) (((uint32_t)(x) << CSR_USTATUS_UIE_SHIFT) & CSR_USTATUS_UIE_MASK) argument
199 #define CSR_USTATUS_UIE_GET(x) (((uint32_t)(x) & CSR_USTATUS_UIE_MASK) >> CSR_USTATUS_UIE_SHIFT) argument
211 #define CSR_UIE_UEIE_SET(x) (((uint32_t)(x) << CSR_UIE_UEIE_SHIFT) & CSR_UIE_UEIE_MASK) argument
212 #define CSR_UIE_UEIE_GET(x) (((uint32_t)(x) & CSR_UIE_UEIE_MASK) >> CSR_UIE_UEIE_SHIFT) argument
223 #define CSR_UIE_UTIE_SET(x) (((uint32_t)(x) << CSR_UIE_UTIE_SHIFT) & CSR_UIE_UTIE_MASK) argument
224 #define CSR_UIE_UTIE_GET(x) (((uint32_t)(x) & CSR_UIE_UTIE_MASK) >> CSR_UIE_UTIE_SHIFT) argument
235 #define CSR_UIE_USIE_SET(x) (((uint32_t)(x) << CSR_UIE_USIE_SHIFT) & CSR_UIE_USIE_MASK) argument
236 #define CSR_UIE_USIE_GET(x) (((uint32_t)(x) & CSR_UIE_USIE_MASK) >> CSR_UIE_USIE_SHIFT) argument
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/device/board/unionman/unionpi_tiger/kernel/drivers/rtl88x2cs/hal/halmac/
Dhalmac_bit2.h50 #define BIT_LLTE_RWM(x) (((x) & BIT_MASK_LLTE_RWM) << BIT_SHIFT_LLTE_RWM) argument
52 #define BIT_CLEAR_LLTE_RWM(x) ((x) & (~BITS_LLTE_RWM)) argument
53 #define BIT_GET_LLTE_RWM(x) (((x) >> BIT_SHIFT_LLTE_RWM) & BIT_MASK_LLTE_RWM) argument
54 #define BIT_SET_LLTE_RWM(x, v) (BIT_CLEAR_LLTE_RWM(x) | BIT_LLTE_RWM(v)) argument
70 #define BIT_GTAB_ID(x) (((x) & BIT_MASK_GTAB_ID) << BIT_SHIFT_GTAB_ID) argument
72 #define BIT_CLEAR_GTAB_ID(x) ((x) & (~BITS_GTAB_ID)) argument
73 #define BIT_GET_GTAB_ID(x) (((x) >> BIT_SHIFT_GTAB_ID) & BIT_MASK_GTAB_ID) argument
74 #define BIT_SET_GTAB_ID(x, v) (BIT_CLEAR_GTAB_ID(x) | BIT_GTAB_ID(v)) argument
101 #define BIT_MBIDCAM_ADDR(x) \ argument
104 #define BIT_CLEAR_MBIDCAM_ADDR(x) ((x) & (~BITS_MBIDCAM_ADDR)) argument
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Dhalmac_bit_8822c.h114 #define BIT_VPDIDX_8822C(x) \ argument
117 #define BIT_CLEAR_VPDIDX_8822C(x) ((x) & (~BITS_VPDIDX_8822C)) argument
118 #define BIT_GET_VPDIDX_8822C(x) \ argument
120 #define BIT_SET_VPDIDX_8822C(x, v) \ argument
125 #define BIT_EEM1_0_8822C(x) \ argument
128 #define BIT_CLEAR_EEM1_0_8822C(x) ((x) & (~BITS_EEM1_0_8822C)) argument
129 #define BIT_GET_EEM1_0_8822C(x) \ argument
131 #define BIT_SET_EEM1_0_8822C(x, v) \ argument
145 #define BIT_VPD_DATA_8822C(x) \ argument
149 #define BIT_CLEAR_VPD_DATA_8822C(x) ((x) & (~BITS_VPD_DATA_8822C)) argument
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/device/soc/hpmicro/sdk/hpm_sdk/soc/ip/
Dhpm_sdxc_regs.h111 #define SDXC_SDMASA_BLOCKCNT_SDMASA_SET(x) (((uint32_t)(x) << SDXC_SDMASA_BLOCKCNT_SDMASA_SHIFT) & … argument
112 #define SDXC_SDMASA_BLOCKCNT_SDMASA_GET(x) (((uint32_t)(x) & SDXC_SDMASA_BLOCKCNT_SDMASA_MASK) >> S… argument
131 #define SDXC_BLK_ATTR_BLOCK_CNT_SET(x) (((uint32_t)(x) << SDXC_BLK_ATTR_BLOCK_CNT_SHIFT) & SDXC_BLK… argument
132 #define SDXC_BLK_ATTR_BLOCK_CNT_GET(x) (((uint32_t)(x) & SDXC_BLK_ATTR_BLOCK_CNT_MASK) >> SDXC_BLK_… argument
152 #define SDXC_BLK_ATTR_SDMA_BUF_BDARY_SET(x) (((uint32_t)(x) << SDXC_BLK_ATTR_SDMA_BUF_BDARY_SHIFT) … argument
153 #define SDXC_BLK_ATTR_SDMA_BUF_BDARY_GET(x) (((uint32_t)(x) & SDXC_BLK_ATTR_SDMA_BUF_BDARY_MASK) >>… argument
173 #define SDXC_BLK_ATTR_XFER_BLOCK_SIZE_SET(x) (((uint32_t)(x) << SDXC_BLK_ATTR_XFER_BLOCK_SIZE_SHIFT… argument
174 #define SDXC_BLK_ATTR_XFER_BLOCK_SIZE_GET(x) (((uint32_t)(x) & SDXC_BLK_ATTR_XFER_BLOCK_SIZE_MASK) … argument
185 #define SDXC_CMD_ARG_ARGUMNET_SET(x) (((uint32_t)(x) << SDXC_CMD_ARG_ARGUMNET_SHIFT) & SDXC_CMD_ARG… argument
186 #define SDXC_CMD_ARG_ARGUMNET_GET(x) (((uint32_t)(x) & SDXC_CMD_ARG_ARGUMNET_MASK) >> SDXC_CMD_ARG_… argument
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Dhpm_usb_regs.h74 #define USB_GPTIMER0LD_GPTLD_SET(x) (((uint32_t)(x) << USB_GPTIMER0LD_GPTLD_SHIFT) & USB_GPTIMER0LD… argument
75 #define USB_GPTIMER0LD_GPTLD_GET(x) (((uint32_t)(x) & USB_GPTIMER0LD_GPTLD_MASK) >> USB_GPTIMER0LD_… argument
89 #define USB_GPTIMER0CTRL_GPTRUN_SET(x) (((uint32_t)(x) << USB_GPTIMER0CTRL_GPTRUN_SHIFT) & USB_GPTI… argument
90 #define USB_GPTIMER0CTRL_GPTRUN_GET(x) (((uint32_t)(x) & USB_GPTIMER0CTRL_GPTRUN_MASK) >> USB_GPTIM… argument
102 #define USB_GPTIMER0CTRL_GPTRST_SET(x) (((uint32_t)(x) << USB_GPTIMER0CTRL_GPTRST_SHIFT) & USB_GPTI… argument
103 #define USB_GPTIMER0CTRL_GPTRST_GET(x) (((uint32_t)(x) & USB_GPTIMER0CTRL_GPTRST_MASK) >> USB_GPTIM… argument
119 #define USB_GPTIMER0CTRL_GPTMODE_SET(x) (((uint32_t)(x) << USB_GPTIMER0CTRL_GPTMODE_SHIFT) & USB_GP… argument
120 #define USB_GPTIMER0CTRL_GPTMODE_GET(x) (((uint32_t)(x) & USB_GPTIMER0CTRL_GPTMODE_MASK) >> USB_GPT… argument
131 #define USB_GPTIMER0CTRL_GPTCNT_GET(x) (((uint32_t)(x) & USB_GPTIMER0CTRL_GPTCNT_MASK) >> USB_GPTIM… argument
146 #define USB_GPTIMER1LD_GPTLD_SET(x) (((uint32_t)(x) << USB_GPTIMER1LD_GPTLD_SHIFT) & USB_GPTIMER1LD… argument
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Dhpm_enet_regs.h297 #define ENET_MACCFG_SARC_SET(x) (((uint32_t)(x) << ENET_MACCFG_SARC_SHIFT) & ENET_MACCFG_SARC_MASK) argument
298 #define ENET_MACCFG_SARC_GET(x) (((uint32_t)(x) & ENET_MACCFG_SARC_MASK) >> ENET_MACCFG_SARC_SHIFT) argument
308 #define ENET_MACCFG_TWOKPE_SET(x) (((uint32_t)(x) << ENET_MACCFG_TWOKPE_SHIFT) & ENET_MACCFG_TWOKPE… argument
309 #define ENET_MACCFG_TWOKPE_GET(x) (((uint32_t)(x) & ENET_MACCFG_TWOKPE_MASK) >> ENET_MACCFG_TWOKPE_… argument
319 #define ENET_MACCFG_SFTERR_SET(x) (((uint32_t)(x) << ENET_MACCFG_SFTERR_SHIFT) & ENET_MACCFG_SFTERR… argument
320 #define ENET_MACCFG_SFTERR_GET(x) (((uint32_t)(x) & ENET_MACCFG_SFTERR_MASK) >> ENET_MACCFG_SFTERR_… argument
330 #define ENET_MACCFG_CST_SET(x) (((uint32_t)(x) << ENET_MACCFG_CST_SHIFT) & ENET_MACCFG_CST_MASK) argument
331 #define ENET_MACCFG_CST_GET(x) (((uint32_t)(x) & ENET_MACCFG_CST_MASK) >> ENET_MACCFG_CST_SHIFT) argument
341 #define ENET_MACCFG_TC_SET(x) (((uint32_t)(x) << ENET_MACCFG_TC_SHIFT) & ENET_MACCFG_TC_MASK) argument
342 #define ENET_MACCFG_TC_GET(x) (((uint32_t)(x) & ENET_MACCFG_TC_MASK) >> ENET_MACCFG_TC_SHIFT) argument
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Dhpm_jpeg_regs.h58 #define JPEG_INDMA_MISC_ARQOS_SET(x) (((uint32_t)(x) << JPEG_INDMA_MISC_ARQOS_SHIFT) & JPEG_INDMA_M… argument
59 #define JPEG_INDMA_MISC_ARQOS_GET(x) (((uint32_t)(x) & JPEG_INDMA_MISC_ARQOS_MASK) >> JPEG_INDMA_MI… argument
70 #define JPEG_INDMA_MISC_MAX_OT_SET(x) (((uint32_t)(x) << JPEG_INDMA_MISC_MAX_OT_SHIFT) & JPEG_INDMA… argument
71 #define JPEG_INDMA_MISC_MAX_OT_GET(x) (((uint32_t)(x) & JPEG_INDMA_MISC_MAX_OT_MASK) >> JPEG_INDMA_… argument
80 #define JPEG_INDMA_MISC_INB13_SWAP_SET(x) (((uint32_t)(x) << JPEG_INDMA_MISC_INB13_SWAP_SHIFT) & JP… argument
81 #define JPEG_INDMA_MISC_INB13_SWAP_GET(x) (((uint32_t)(x) & JPEG_INDMA_MISC_INB13_SWAP_MASK) >> JPE… argument
94 #define JPEG_INDMA_MISC_PACK_DIR_SET(x) (((uint32_t)(x) << JPEG_INDMA_MISC_PACK_DIR_SHIFT) & JPEG_I… argument
95 #define JPEG_INDMA_MISC_PACK_DIR_GET(x) (((uint32_t)(x) & JPEG_INDMA_MISC_PACK_DIR_MASK) >> JPEG_IN… argument
104 #define JPEG_INDMA_MISC_INDMA_RENEW_SET(x) (((uint32_t)(x) << JPEG_INDMA_MISC_INDMA_RENEW_SHIFT) & … argument
105 #define JPEG_INDMA_MISC_INDMA_RENEW_GET(x) (((uint32_t)(x) & JPEG_INDMA_MISC_INDMA_RENEW_MASK) >> J… argument
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Dhpm_dac_regs.h39 #define DAC_CFG0_SW_DAC_DATA_SET(x) (((uint32_t)(x) << DAC_CFG0_SW_DAC_DATA_SHIFT) & DAC_CFG0_SW_DA… argument
40 #define DAC_CFG0_SW_DAC_DATA_GET(x) (((uint32_t)(x) & DAC_CFG0_SW_DAC_DATA_MASK) >> DAC_CFG0_SW_DAC… argument
50 #define DAC_CFG0_DMA_AHB_EN_SET(x) (((uint32_t)(x) << DAC_CFG0_DMA_AHB_EN_SHIFT) & DAC_CFG0_DMA_AHB… argument
51 #define DAC_CFG0_DMA_AHB_EN_GET(x) (((uint32_t)(x) & DAC_CFG0_DMA_AHB_EN_MASK) >> DAC_CFG0_DMA_AHB_… argument
63 #define DAC_CFG0_SYNC_MODE_SET(x) (((uint32_t)(x) << DAC_CFG0_SYNC_MODE_SHIFT) & DAC_CFG0_SYNC_MODE… argument
64 #define DAC_CFG0_SYNC_MODE_GET(x) (((uint32_t)(x) & DAC_CFG0_SYNC_MODE_MASK) >> DAC_CFG0_SYNC_MODE_… argument
74 #define DAC_CFG0_TRIG_MODE_SET(x) (((uint32_t)(x) << DAC_CFG0_TRIG_MODE_SHIFT) & DAC_CFG0_TRIG_MODE… argument
75 #define DAC_CFG0_TRIG_MODE_GET(x) (((uint32_t)(x) & DAC_CFG0_TRIG_MODE_MASK) >> DAC_CFG0_TRIG_MODE_… argument
84 #define DAC_CFG0_HW_TRIG_EN_SET(x) (((uint32_t)(x) << DAC_CFG0_HW_TRIG_EN_SHIFT) & DAC_CFG0_HW_TRIG… argument
85 #define DAC_CFG0_HW_TRIG_EN_GET(x) (((uint32_t)(x) & DAC_CFG0_HW_TRIG_EN_MASK) >> DAC_CFG0_HW_TRIG_… argument
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Dhpm_spi_regs.h46 #define SPI_TRANSFMT_ADDRLEN_SET(x) (((uint32_t)(x) << SPI_TRANSFMT_ADDRLEN_SHIFT) & SPI_TRANSFMT_A… argument
47 #define SPI_TRANSFMT_ADDRLEN_GET(x) (((uint32_t)(x) & SPI_TRANSFMT_ADDRLEN_MASK) >> SPI_TRANSFMT_AD… argument
57 #define SPI_TRANSFMT_DATALEN_SET(x) (((uint32_t)(x) << SPI_TRANSFMT_DATALEN_SHIFT) & SPI_TRANSFMT_D… argument
58 #define SPI_TRANSFMT_DATALEN_GET(x) (((uint32_t)(x) & SPI_TRANSFMT_DATALEN_MASK) >> SPI_TRANSFMT_DA… argument
69 #define SPI_TRANSFMT_DATAMERGE_SET(x) (((uint32_t)(x) << SPI_TRANSFMT_DATAMERGE_SHIFT) & SPI_TRANSF… argument
70 #define SPI_TRANSFMT_DATAMERGE_GET(x) (((uint32_t)(x) & SPI_TRANSFMT_DATAMERGE_MASK) >> SPI_TRANSFM… argument
81 #define SPI_TRANSFMT_MOSIBIDIR_SET(x) (((uint32_t)(x) << SPI_TRANSFMT_MOSIBIDIR_SHIFT) & SPI_TRANSF… argument
82 #define SPI_TRANSFMT_MOSIBIDIR_GET(x) (((uint32_t)(x) & SPI_TRANSFMT_MOSIBIDIR_MASK) >> SPI_TRANSFM… argument
93 #define SPI_TRANSFMT_LSB_SET(x) (((uint32_t)(x) << SPI_TRANSFMT_LSB_SHIFT) & SPI_TRANSFMT_LSB_MASK) argument
94 #define SPI_TRANSFMT_LSB_GET(x) (((uint32_t)(x) & SPI_TRANSFMT_LSB_MASK) >> SPI_TRANSFMT_LSB_SHIFT) argument
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Dhpm_can_regs.h49 #define CAN_RBUF_RBUF_SET(x) (((uint32_t)(x) << CAN_RBUF_RBUF_SHIFT) & CAN_RBUF_RBUF_MASK) argument
50 #define CAN_RBUF_RBUF_GET(x) (((uint32_t)(x) & CAN_RBUF_RBUF_MASK) >> CAN_RBUF_RBUF_SHIFT) argument
60 #define CAN_TBUF_TBUF_SET(x) (((uint32_t)(x) << CAN_TBUF_TBUF_SHIFT) & CAN_TBUF_TBUF_MASK) argument
61 #define CAN_TBUF_TBUF_GET(x) (((uint32_t)(x) & CAN_TBUF_TBUF_MASK) >> CAN_TBUF_TBUF_SHIFT) argument
71 #define CAN_TTS_TTS_WRD0_GET(x) (((uint32_t)(x) & CAN_TTS_TTS_WRD0_MASK) >> CAN_TTS_TTS_WRD0_SHIFT) argument
83 #define CAN_CMD_STA_CMD_CTRL_SACK_SET(x) (((uint32_t)(x) << CAN_CMD_STA_CMD_CTRL_SACK_SHIFT) & CAN_… argument
84 #define CAN_CMD_STA_CMD_CTRL_SACK_GET(x) (((uint32_t)(x) & CAN_CMD_STA_CMD_CTRL_SACK_MASK) >> CAN_C… argument
96 #define CAN_CMD_STA_CMD_CTRL_ROM_SET(x) (((uint32_t)(x) << CAN_CMD_STA_CMD_CTRL_ROM_SHIFT) & CAN_CM… argument
97 #define CAN_CMD_STA_CMD_CTRL_ROM_GET(x) (((uint32_t)(x) & CAN_CMD_STA_CMD_CTRL_ROM_MASK) >> CAN_CMD… argument
109 #define CAN_CMD_STA_CMD_CTRL_ROV_GET(x) (((uint32_t)(x) & CAN_CMD_STA_CMD_CTRL_ROV_MASK) >> CAN_CMD… argument
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Dhpm_pcfg_regs.h51 #define PCFG_BANDGAP_VBG_TRIMMED_SET(x) (((uint32_t)(x) << PCFG_BANDGAP_VBG_TRIMMED_SHIFT) & PCFG_B… argument
52 #define PCFG_BANDGAP_VBG_TRIMMED_GET(x) (((uint32_t)(x) & PCFG_BANDGAP_VBG_TRIMMED_MASK) >> PCFG_BA… argument
63 #define PCFG_BANDGAP_LOWPOWER_MODE_SET(x) (((uint32_t)(x) << PCFG_BANDGAP_LOWPOWER_MODE_SHIFT) & PC… argument
64 #define PCFG_BANDGAP_LOWPOWER_MODE_GET(x) (((uint32_t)(x) & PCFG_BANDGAP_LOWPOWER_MODE_MASK) >> PCF… argument
75 #define PCFG_BANDGAP_POWER_SAVE_SET(x) (((uint32_t)(x) << PCFG_BANDGAP_POWER_SAVE_SHIFT) & PCFG_BAN… argument
76 #define PCFG_BANDGAP_POWER_SAVE_GET(x) (((uint32_t)(x) & PCFG_BANDGAP_POWER_SAVE_MASK) >> PCFG_BAND… argument
85 #define PCFG_BANDGAP_VBG_1P0_TRIM_SET(x) (((uint32_t)(x) << PCFG_BANDGAP_VBG_1P0_TRIM_SHIFT) & PCFG… argument
86 #define PCFG_BANDGAP_VBG_1P0_TRIM_GET(x) (((uint32_t)(x) & PCFG_BANDGAP_VBG_1P0_TRIM_MASK) >> PCFG_… argument
95 #define PCFG_BANDGAP_VBG_P65_TRIM_SET(x) (((uint32_t)(x) << PCFG_BANDGAP_VBG_P65_TRIM_SHIFT) & PCFG… argument
96 #define PCFG_BANDGAP_VBG_P65_TRIM_GET(x) (((uint32_t)(x) & PCFG_BANDGAP_VBG_P65_TRIM_MASK) >> PCFG_… argument
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Dhpm_pdma_regs.h58 #define PDMA_CTRL_ARQOS_SET(x) (((uint32_t)(x) << PDMA_CTRL_ARQOS_SHIFT) & PDMA_CTRL_ARQOS_MASK) argument
59 #define PDMA_CTRL_ARQOS_GET(x) (((uint32_t)(x) & PDMA_CTRL_ARQOS_MASK) >> PDMA_CTRL_ARQOS_SHIFT) argument
68 #define PDMA_CTRL_AWQOS_SET(x) (((uint32_t)(x) << PDMA_CTRL_AWQOS_SHIFT) & PDMA_CTRL_AWQOS_MASK) argument
69 #define PDMA_CTRL_AWQOS_GET(x) (((uint32_t)(x) & PDMA_CTRL_AWQOS_MASK) >> PDMA_CTRL_AWQOS_SHIFT) argument
82 #define PDMA_CTRL_PACK_DIR_SET(x) (((uint32_t)(x) << PDMA_CTRL_PACK_DIR_SHIFT) & PDMA_CTRL_PACK_DIR… argument
83 #define PDMA_CTRL_PACK_DIR_GET(x) (((uint32_t)(x) & PDMA_CTRL_PACK_DIR_MASK) >> PDMA_CTRL_PACK_DIR_… argument
92 #define PDMA_CTRL_AXIERR_IRQ_EN_SET(x) (((uint32_t)(x) << PDMA_CTRL_AXIERR_IRQ_EN_SHIFT) & PDMA_CTR… argument
93 #define PDMA_CTRL_AXIERR_IRQ_EN_GET(x) (((uint32_t)(x) & PDMA_CTRL_AXIERR_IRQ_EN_MASK) >> PDMA_CTRL… argument
102 #define PDMA_CTRL_PDMA_DONE_IRQ_EN_SET(x) (((uint32_t)(x) << PDMA_CTRL_PDMA_DONE_IRQ_EN_SHIFT) & PD… argument
103 #define PDMA_CTRL_PDMA_DONE_IRQ_EN_GET(x) (((uint32_t)(x) & PDMA_CTRL_PDMA_DONE_IRQ_EN_MASK) >> PDM… argument
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Dhpm_lcdc_regs.h51 #define LCDC_CTRL_SW_RST_SET(x) (((uint32_t)(x) << LCDC_CTRL_SW_RST_SHIFT) & LCDC_CTRL_SW_RST_MASK) argument
52 #define LCDC_CTRL_SW_RST_GET(x) (((uint32_t)(x) & LCDC_CTRL_SW_RST_MASK) >> LCDC_CTRL_SW_RST_SHIFT) argument
72 #define LCDC_CTRL_DISP_ON_SET(x) (((uint32_t)(x) << LCDC_CTRL_DISP_ON_SHIFT) & LCDC_CTRL_DISP_ON_MA… argument
73 #define LCDC_CTRL_DISP_ON_GET(x) (((uint32_t)(x) & LCDC_CTRL_DISP_ON_MASK) >> LCDC_CTRL_DISP_ON_SHI… argument
88 #define LCDC_CTRL_LINE_PATTERN_SET(x) (((uint32_t)(x) << LCDC_CTRL_LINE_PATTERN_SHIFT) & LCDC_CTRL_… argument
89 #define LCDC_CTRL_LINE_PATTERN_GET(x) (((uint32_t)(x) & LCDC_CTRL_LINE_PATTERN_MASK) >> LCDC_CTRL_L… argument
102 #define LCDC_CTRL_DISP_MODE_SET(x) (((uint32_t)(x) << LCDC_CTRL_DISP_MODE_SHIFT) & LCDC_CTRL_DISP_M… argument
103 #define LCDC_CTRL_DISP_MODE_GET(x) (((uint32_t)(x) & LCDC_CTRL_DISP_MODE_MASK) >> LCDC_CTRL_DISP_MO… argument
112 #define LCDC_CTRL_BGDCL4CLR_SET(x) (((uint32_t)(x) << LCDC_CTRL_BGDCL4CLR_SHIFT) & LCDC_CTRL_BGDCL4… argument
113 #define LCDC_CTRL_BGDCL4CLR_GET(x) (((uint32_t)(x) & LCDC_CTRL_BGDCL4CLR_MASK) >> LCDC_CTRL_BGDCL4C… argument
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Dhpm_qei_regs.h43 #define QEI_CR_READ_SET(x) (((uint32_t)(x) << QEI_CR_READ_SHIFT) & QEI_CR_READ_MASK) argument
44 #define QEI_CR_READ_GET(x) (((uint32_t)(x) & QEI_CR_READ_MASK) >> QEI_CR_READ_SHIFT) argument
53 #define QEI_CR_HRSTSPD_SET(x) (((uint32_t)(x) << QEI_CR_HRSTSPD_SHIFT) & QEI_CR_HRSTSPD_MASK) argument
54 #define QEI_CR_HRSTSPD_GET(x) (((uint32_t)(x) & QEI_CR_HRSTSPD_MASK) >> QEI_CR_HRSTSPD_SHIFT) argument
63 #define QEI_CR_HRSTPH_SET(x) (((uint32_t)(x) << QEI_CR_HRSTPH_SHIFT) & QEI_CR_HRSTPH_MASK) argument
64 #define QEI_CR_HRSTPH_GET(x) (((uint32_t)(x) & QEI_CR_HRSTPH_MASK) >> QEI_CR_HRSTPH_SHIFT) argument
73 #define QEI_CR_HRSTZ_SET(x) (((uint32_t)(x) << QEI_CR_HRSTZ_SHIFT) & QEI_CR_HRSTZ_MASK) argument
74 #define QEI_CR_HRSTZ_GET(x) (((uint32_t)(x) & QEI_CR_HRSTZ_MASK) >> QEI_CR_HRSTZ_SHIFT) argument
83 #define QEI_CR_PAUSESPD_SET(x) (((uint32_t)(x) << QEI_CR_PAUSESPD_SHIFT) & QEI_CR_PAUSESPD_MASK) argument
84 #define QEI_CR_PAUSESPD_GET(x) (((uint32_t)(x) & QEI_CR_PAUSESPD_MASK) >> QEI_CR_PAUSESPD_SHIFT) argument
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Dhpm_pdm_regs.h37 #define PDM_CTRL_SFTRST_SET(x) (((uint32_t)(x) << PDM_CTRL_SFTRST_SHIFT) & PDM_CTRL_SFTRST_MASK) argument
38 #define PDM_CTRL_SFTRST_GET(x) (((uint32_t)(x) & PDM_CTRL_SFTRST_MASK) >> PDM_CTRL_SFTRST_SHIFT) argument
47 #define PDM_CTRL_SOF_FEDGE_SET(x) (((uint32_t)(x) << PDM_CTRL_SOF_FEDGE_SHIFT) & PDM_CTRL_SOF_FEDGE… argument
48 #define PDM_CTRL_SOF_FEDGE_GET(x) (((uint32_t)(x) & PDM_CTRL_SOF_FEDGE_MASK) >> PDM_CTRL_SOF_FEDGE_… argument
57 #define PDM_CTRL_USE_COEF_RAM_SET(x) (((uint32_t)(x) << PDM_CTRL_USE_COEF_RAM_SHIFT) & PDM_CTRL_USE… argument
58 #define PDM_CTRL_USE_COEF_RAM_GET(x) (((uint32_t)(x) & PDM_CTRL_USE_COEF_RAM_MASK) >> PDM_CTRL_USE_… argument
67 #define PDM_CTRL_FILT_CRX_ERR_IE_SET(x) (((uint32_t)(x) << PDM_CTRL_FILT_CRX_ERR_IE_SHIFT) & PDM_CT… argument
68 #define PDM_CTRL_FILT_CRX_ERR_IE_GET(x) (((uint32_t)(x) & PDM_CTRL_FILT_CRX_ERR_IE_MASK) >> PDM_CTR… argument
77 #define PDM_CTRL_OFIFO_OVFL_ERR_IE_SET(x) (((uint32_t)(x) << PDM_CTRL_OFIFO_OVFL_ERR_IE_SHIFT) & PD… argument
78 #define PDM_CTRL_OFIFO_OVFL_ERR_IE_GET(x) (((uint32_t)(x) & PDM_CTRL_OFIFO_OVFL_ERR_IE_MASK) >> PDM… argument
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Dhpm_dram_regs.h52 #define DRAM_CTRL_BTO_SET(x) (((uint32_t)(x) << DRAM_CTRL_BTO_SHIFT) & DRAM_CTRL_BTO_MASK) argument
53 #define DRAM_CTRL_BTO_GET(x) (((uint32_t)(x) & DRAM_CTRL_BTO_MASK) >> DRAM_CTRL_BTO_SHIFT) argument
65 #define DRAM_CTRL_CTO_SET(x) (((uint32_t)(x) << DRAM_CTRL_CTO_SHIFT) & DRAM_CTRL_CTO_MASK) argument
66 #define DRAM_CTRL_CTO_GET(x) (((uint32_t)(x) & DRAM_CTRL_CTO_MASK) >> DRAM_CTRL_CTO_SHIFT) argument
77 #define DRAM_CTRL_DQS_SET(x) (((uint32_t)(x) << DRAM_CTRL_DQS_SHIFT) & DRAM_CTRL_DQS_MASK) argument
78 #define DRAM_CTRL_DQS_GET(x) (((uint32_t)(x) & DRAM_CTRL_DQS_MASK) >> DRAM_CTRL_DQS_SHIFT) argument
89 #define DRAM_CTRL_DIS_SET(x) (((uint32_t)(x) << DRAM_CTRL_DIS_SHIFT) & DRAM_CTRL_DIS_MASK) argument
90 #define DRAM_CTRL_DIS_GET(x) (((uint32_t)(x) & DRAM_CTRL_DIS_MASK) >> DRAM_CTRL_DIS_SHIFT) argument
100 #define DRAM_CTRL_RST_SET(x) (((uint32_t)(x) << DRAM_CTRL_RST_SHIFT) & DRAM_CTRL_RST_MASK) argument
101 #define DRAM_CTRL_RST_GET(x) (((uint32_t)(x) & DRAM_CTRL_RST_MASK) >> DRAM_CTRL_RST_SHIFT) argument
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Dhpm_sdp_regs.h39 #define SDP_SDPCR_SFTRST_SET(x) (((uint32_t)(x) << SDP_SDPCR_SFTRST_SHIFT) & SDP_SDPCR_SFTRST_MASK) argument
40 #define SDP_SDPCR_SFTRST_GET(x) (((uint32_t)(x) & SDP_SDPCR_SFTRST_MASK) >> SDP_SDPCR_SFTRST_SHIFT) argument
50 #define SDP_SDPCR_CLKGAT_SET(x) (((uint32_t)(x) << SDP_SDPCR_CLKGAT_SHIFT) & SDP_SDPCR_CLKGAT_MASK) argument
51 #define SDP_SDPCR_CLKGAT_GET(x) (((uint32_t)(x) & SDP_SDPCR_CLKGAT_MASK) >> SDP_SDPCR_CLKGAT_SHIFT) argument
62 #define SDP_SDPCR_CIPDIS_GET(x) (((uint32_t)(x) & SDP_SDPCR_CIPDIS_MASK) >> SDP_SDPCR_CIPDIS_SHIFT) argument
73 #define SDP_SDPCR_HASDIS_GET(x) (((uint32_t)(x) & SDP_SDPCR_HASDIS_MASK) >> SDP_SDPCR_HASDIS_SHIFT) argument
84 #define SDP_SDPCR_CIPHEN_SET(x) (((uint32_t)(x) << SDP_SDPCR_CIPHEN_SHIFT) & SDP_SDPCR_CIPHEN_MASK) argument
85 #define SDP_SDPCR_CIPHEN_GET(x) (((uint32_t)(x) & SDP_SDPCR_CIPHEN_MASK) >> SDP_SDPCR_CIPHEN_SHIFT) argument
96 #define SDP_SDPCR_HASHEN_SET(x) (((uint32_t)(x) << SDP_SDPCR_HASHEN_SHIFT) & SDP_SDPCR_HASHEN_MASK) argument
97 #define SDP_SDPCR_HASHEN_GET(x) (((uint32_t)(x) & SDP_SDPCR_HASHEN_MASK) >> SDP_SDPCR_HASHEN_SHIFT) argument
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Dhpm_gptmr_regs.h42 #define GPTMR_CHANNEL_CR_CNTUPT_SET(x) (((uint32_t)(x) << GPTMR_CHANNEL_CR_CNTUPT_SHIFT) & GPTMR_CH… argument
43 #define GPTMR_CHANNEL_CR_CNTUPT_GET(x) (((uint32_t)(x) & GPTMR_CHANNEL_CR_CNTUPT_MASK) >> GPTMR_CHA… argument
52 #define GPTMR_CHANNEL_CR_CNTRST_SET(x) (((uint32_t)(x) << GPTMR_CHANNEL_CR_CNTRST_SHIFT) & GPTMR_CH… argument
53 #define GPTMR_CHANNEL_CR_CNTRST_GET(x) (((uint32_t)(x) & GPTMR_CHANNEL_CR_CNTRST_MASK) >> GPTMR_CHA… argument
63 #define GPTMR_CHANNEL_CR_SYNCFLW_SET(x) (((uint32_t)(x) << GPTMR_CHANNEL_CR_SYNCFLW_SHIFT) & GPTMR_… argument
64 #define GPTMR_CHANNEL_CR_SYNCFLW_GET(x) (((uint32_t)(x) & GPTMR_CHANNEL_CR_SYNCFLW_MASK) >> GPTMR_C… argument
73 #define GPTMR_CHANNEL_CR_SYNCIFEN_SET(x) (((uint32_t)(x) << GPTMR_CHANNEL_CR_SYNCIFEN_SHIFT) & GPTM… argument
74 #define GPTMR_CHANNEL_CR_SYNCIFEN_GET(x) (((uint32_t)(x) & GPTMR_CHANNEL_CR_SYNCIFEN_MASK) >> GPTMR… argument
83 #define GPTMR_CHANNEL_CR_SYNCIREN_SET(x) (((uint32_t)(x) << GPTMR_CHANNEL_CR_SYNCIREN_SHIFT) & GPTM… argument
84 #define GPTMR_CHANNEL_CR_SYNCIREN_GET(x) (((uint32_t)(x) & GPTMR_CHANNEL_CR_SYNCIREN_MASK) >> GPTMR… argument
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Dhpm_i2c_regs.h38 #define I2C_CFG_FIFOSIZE_GET(x) (((uint32_t)(x) & I2C_CFG_FIFOSIZE_MASK) >> I2C_CFG_FIFOSIZE_SHIFT) argument
50 #define I2C_INTEN_CMPL_SET(x) (((uint32_t)(x) << I2C_INTEN_CMPL_SHIFT) & I2C_INTEN_CMPL_MASK) argument
51 #define I2C_INTEN_CMPL_GET(x) (((uint32_t)(x) & I2C_INTEN_CMPL_MASK) >> I2C_INTEN_CMPL_SHIFT) argument
62 #define I2C_INTEN_BYTERECV_SET(x) (((uint32_t)(x) << I2C_INTEN_BYTERECV_SHIFT) & I2C_INTEN_BYTERECV… argument
63 #define I2C_INTEN_BYTERECV_GET(x) (((uint32_t)(x) & I2C_INTEN_BYTERECV_MASK) >> I2C_INTEN_BYTERECV_… argument
73 #define I2C_INTEN_BYTETRANS_SET(x) (((uint32_t)(x) << I2C_INTEN_BYTETRANS_SHIFT) & I2C_INTEN_BYTETR… argument
74 #define I2C_INTEN_BYTETRANS_GET(x) (((uint32_t)(x) & I2C_INTEN_BYTETRANS_MASK) >> I2C_INTEN_BYTETRA… argument
84 #define I2C_INTEN_START_SET(x) (((uint32_t)(x) << I2C_INTEN_START_SHIFT) & I2C_INTEN_START_MASK) argument
85 #define I2C_INTEN_START_GET(x) (((uint32_t)(x) & I2C_INTEN_START_MASK) >> I2C_INTEN_START_SHIFT) argument
95 #define I2C_INTEN_STOP_SET(x) (((uint32_t)(x) << I2C_INTEN_STOP_SHIFT) & I2C_INTEN_STOP_MASK) argument
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Dhpm_vad_regs.h37 #define VAD_CTRL_CAPT_DLY_SET(x) (((uint32_t)(x) << VAD_CTRL_CAPT_DLY_SHIFT) & VAD_CTRL_CAPT_DLY_MA… argument
38 #define VAD_CTRL_CAPT_DLY_GET(x) (((uint32_t)(x) & VAD_CTRL_CAPT_DLY_MASK) >> VAD_CTRL_CAPT_DLY_SHI… argument
51 #define VAD_CTRL_PDM_CLK_HFDIV_SET(x) (((uint32_t)(x) << VAD_CTRL_PDM_CLK_HFDIV_SHIFT) & VAD_CTRL_P… argument
52 #define VAD_CTRL_PDM_CLK_HFDIV_GET(x) (((uint32_t)(x) & VAD_CTRL_PDM_CLK_HFDIV_MASK) >> VAD_CTRL_PD… argument
61 #define VAD_CTRL_VAD_IE_SET(x) (((uint32_t)(x) << VAD_CTRL_VAD_IE_SHIFT) & VAD_CTRL_VAD_IE_MASK) argument
62 #define VAD_CTRL_VAD_IE_GET(x) (((uint32_t)(x) & VAD_CTRL_VAD_IE_MASK) >> VAD_CTRL_VAD_IE_SHIFT) argument
71 #define VAD_CTRL_OFIFO_AV_IE_SET(x) (((uint32_t)(x) << VAD_CTRL_OFIFO_AV_IE_SHIFT) & VAD_CTRL_OFIFO… argument
72 #define VAD_CTRL_OFIFO_AV_IE_GET(x) (((uint32_t)(x) & VAD_CTRL_OFIFO_AV_IE_MASK) >> VAD_CTRL_OFIFO_… argument
81 #define VAD_CTRL_MEMBUF_EMPTY_IE_SET(x) (((uint32_t)(x) << VAD_CTRL_MEMBUF_EMPTY_IE_SHIFT) & VAD_CT… argument
82 #define VAD_CTRL_MEMBUF_EMPTY_IE_GET(x) (((uint32_t)(x) & VAD_CTRL_MEMBUF_EMPTY_IE_MASK) >> VAD_CTR… argument
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