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/kernel/linux/linux-5.10/drivers/gpu/drm/nouveau/nvkm/engine/gr/
Dctxgp107.c37 .bundle_size = 0x3000,
38 .bundle_min_gpm_fifo_depth = 0x180,
39 .bundle_token_limit = 0x300,
41 .pagepool_size = 0x20000,
43 .attrib_nr_max = 0x15de,
44 .attrib_nr = 0x540,
45 .alpha_nr_max = 0xc00,
46 .alpha_nr = 0x800,
47 .gfxp_nr = 0xe94,
/kernel/linux/linux-5.10/arch/arm/boot/dts/
Ddra72x.dtsi27 target-module@5b000 { /* 0x4845b000, ap 59 46.0 */
29 reg = <0x5b000 0x4>,
30 <0x5b010 0x4>;
36 clocks = <&cam_clkctrl DRA7_CAM_VIP2_CLKCTRL 0>;
40 ranges = <0x0 0x5b000 0x1000>;
42 cal: cal@0 {
44 reg = <0x0000 0x400>,
45 <0x0800 0x40>,
46 <0x0900 0x40>;
51 ti,camerrx-control = <&scm_conf 0xE94>;
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/media/
Dti,cal.yaml28 # for DRA72 controllers pre ES2.0
80 const: 0
82 port@0:
88 const: 0
89 description: CSI2 Port #0
139 - port@0
156 reg = <0x4845B000 0x400>,
157 <0x4845B800 0x40>,
158 <0x4845B900 0x40>;
163 ti,camerrx-control = <&scm_conf 0xE94>;
[all …]
/kernel/linux/linux-5.10/drivers/gpu/drm/via/
Dvia_dmablit.h87 #define VIA_PCI_DMA_MAR0 0xE40 /* Memory Address Register of Channel 0 */
88 #define VIA_PCI_DMA_DAR0 0xE44 /* Device Address Register of Channel 0 */
89 #define VIA_PCI_DMA_BCR0 0xE48 /* Byte Count Register of Channel 0 */
90 #define VIA_PCI_DMA_DPR0 0xE4C /* Descriptor Pointer Register of Channel 0 */
92 #define VIA_PCI_DMA_MAR1 0xE50 /* Memory Address Register of Channel 1 */
93 #define VIA_PCI_DMA_DAR1 0xE54 /* Device Address Register of Channel 1 */
94 #define VIA_PCI_DMA_BCR1 0xE58 /* Byte Count Register of Channel 1 */
95 #define VIA_PCI_DMA_DPR1 0xE5C /* Descriptor Pointer Register of Channel 1 */
97 #define VIA_PCI_DMA_MAR2 0xE60 /* Memory Address Register of Channel 2 */
98 #define VIA_PCI_DMA_DAR2 0xE64 /* Device Address Register of Channel 2 */
[all …]
/kernel/linux/linux-5.10/drivers/staging/rtl8188eu/include/
Dhal8188e_phy_reg.h11 /* BB-PHY register PMAC 0x100 PHY 0x800 - 0xEFF */
13 /* 2. 0x800/0x900/0xA00/0xC00/0xD00/0xE00 */
14 /* 3. RF register 0x00-2E */
19 /* 3. Page8(0x800) */
20 #define rFPGA0_RFMOD 0x800 /* RF mode & CCK TxSC RF BW Setting */
21 #define rFPGA0_TxGainStage 0x80c /* Set TX PWR init gain? */
23 #define rFPGA0_XA_HSSIParameter1 0x820 /* RF 3 wire register */
24 #define rFPGA0_XA_HSSIParameter2 0x824
25 #define rFPGA0_XB_HSSIParameter1 0x828
26 #define rFPGA0_XB_HSSIParameter2 0x82c
[all …]
/kernel/linux/linux-5.10/drivers/dma/
Dste_dma40_ll.h10 #define D40_DREG_PCBASE 0x400
35 #define D40_SREG_CFG_PHY_EVTL_POS 0
40 #define D40_SREG_ELEM_PHY_EIDX_POS 0
42 #define D40_SREG_ELEM_PHY_ECNT_MASK (0xFFFF << D40_SREG_ELEM_PHY_ECNT_POS)
45 #define D40_SREG_LNK_PHY_TCP_POS 0
52 #define D40_SREG_LNK_PHYS_LNK_MASK 0xFFFFFFF8UL
60 #define D40_SREG_ELEM_LOG_TCP_POS 0
62 #define D40_SREG_ELEM_LOG_LIDX_MASK (0xFF << D40_SREG_ELEM_LOG_LIDX_POS)
66 #define D40_EVENTLINE_MASK(i) (0x3 << D40_EVENTLINE_POS(i))
72 #define D40_MEM_LCSP0_SPTR_POS 0
[all …]
/kernel/linux/linux-5.10/drivers/net/wireless/realtek/rtlwifi/rtl8192de/
Dphy.c29 0, 0x2f, 0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37, 0x38, 0x39, 0x0
41 0x0B, 0x48, 0x49, 0x4B, 0x03, 0x04, 0x0E
62 {0xE43BE, 0xFC638, 0x77C0A, 0xDE471, 0xd7110, 0x8EB04},
63 {0xE43BE, 0xFC078, 0xF7C1A, 0xE0C71, 0xD7550, 0xAEB04},
64 {0xE43BF, 0xFF038, 0xF7C0A, 0xDE471, 0xE5550, 0xAEB04},
65 {0xE43BF, 0xFF079, 0xF7C1A, 0xDE471, 0xE5550, 0xAEB04},
66 {0xE43BF, 0xFF038, 0xF7C1A, 0xDE471, 0xd7550, 0xAEB04}
70 {0x643BC, 0xFC038, 0x77C1A, 0x41289, 0x01840},
71 {0x643BC, 0xFC038, 0x07C1A, 0x41289, 0x01840},
72 {0x243BC, 0xFC438, 0x07C1A, 0x4128B, 0x0FC41}
[all …]
Ddm.c16 0x7f8001fe, /* 0, +6.0dB */
17 0x788001e2, /* 1, +5.5dB */
18 0x71c001c7, /* 2, +5.0dB */
19 0x6b8001ae, /* 3, +4.5dB */
20 0x65400195, /* 4, +4.0dB */
21 0x5fc0017f, /* 5, +3.5dB */
22 0x5a400169, /* 6, +3.0dB */
23 0x55400155, /* 7, +2.5dB */
24 0x50800142, /* 8, +2.0dB */
25 0x4c000130, /* 9, +1.5dB */
[all …]
/kernel/linux/linux-5.10/drivers/net/wireless/realtek/rtlwifi/rtl8192c/
Dphy_common.c24 "BBR MASK=0x%x Addr[0x%x]=0x%x\n", in rtl92c_phy_query_bb_reg()
59 return 0; in _rtl92c_phy_fw_rf_serial_read()
79 u8 rfpi_enable = 0; in _rtl92c_phy_rf_serial_read()
82 offset &= 0x3f; in _rtl92c_phy_rf_serial_read()
86 return 0xFFFFFFFF; in _rtl92c_phy_rf_serial_read()
115 rtl_dbg(rtlpriv, COMP_RF, DBG_TRACE, "RFR-%d Addr[0x%x]=0x%x\n", in _rtl92c_phy_rf_serial_read()
136 offset &= 0x3f; in _rtl92c_phy_rf_serial_write()
138 data_and_addr = ((newoffset << 20) | (data & 0x000fffff)) & 0x0fffffff; in _rtl92c_phy_rf_serial_write()
140 rtl_dbg(rtlpriv, COMP_RF, DBG_TRACE, "RFW-%d Addr[0x%x]=0x%x\n", in _rtl92c_phy_rf_serial_write()
156 rtl_set_bbreg(hw, RFPGA0_TXINFO, 0x3, 0x2); in _rtl92c_phy_bb_config_1t()
[all …]
/kernel/linux/linux-5.10/drivers/net/wireless/realtek/rtlwifi/rtl8723ae/
Dphy.c38 u32 original_value = 0, readback_value, bitshift; in rtl8723e_phy_query_rf_reg()
70 u32 original_value = 0, bitshift; in rtl8723e_phy_set_rf_reg()
117 rtl_set_bbreg(hw, RFPGA0_TXINFO, 0x3, 0x2); in _rtl8723e_phy_bb_config_1t()
118 rtl_set_bbreg(hw, RFPGA1_TXINFO, 0x300033, 0x200022); in _rtl8723e_phy_bb_config_1t()
119 rtl_set_bbreg(hw, RCCK0_AFESETTING, MASKBYTE3, 0x45); in _rtl8723e_phy_bb_config_1t()
120 rtl_set_bbreg(hw, ROFDM0_TRXPATHENABLE, MASKBYTE0, 0x23); in _rtl8723e_phy_bb_config_1t()
121 rtl_set_bbreg(hw, ROFDM0_AGCPARAMETER1, 0x30, 0x1); in _rtl8723e_phy_bb_config_1t()
122 rtl_set_bbreg(hw, 0xe74, 0x0c000000, 0x2); in _rtl8723e_phy_bb_config_1t()
123 rtl_set_bbreg(hw, 0xe78, 0x0c000000, 0x2); in _rtl8723e_phy_bb_config_1t()
124 rtl_set_bbreg(hw, 0xe7c, 0x0c000000, 0x2); in _rtl8723e_phy_bb_config_1t()
[all …]
/kernel/linux/linux-5.10/drivers/staging/rtl8723bs/hal/
DHalPhyRf_8723B.c18 /* MACRO definition for pRFCalibrateInfo->TxIQC_8723B[0] */
20 #define IDX_0xC94 0
23 #define IDX_0xC14 0
25 #define KEY 0
29 #define PATH_S1 0 /* RF_PATH_A */
30 #define IDX_0xC9C 0
33 #define IDX_0xC1C 0
43 0, 0, 0, 2, 2, 3, 3, 4, 4, 4, 4, 5, 5, 6, 6,
47 0, 0, 0, 0, 1, 1, 2, 2, 3, 3, 4, 4, 4, 4, 4,
64 s32 ele_A = 0, ele_D, ele_C = 0, value32; in setIqkMatrix_8723B()
[all …]
/kernel/linux/linux-5.10/drivers/net/wireless/realtek/rtlwifi/rtl8723be/
Dphy.c91 rtl_write_byte(rtlpriv, 0x04CA, 0x0B); in rtl8723be_phy_mac_config()
106 regval | BIT(13) | BIT(0) | BIT(1)); in rtl8723be_phy_bb_config()
112 tmp = rtl_read_dword(rtlpriv, 0x4c); in rtl8723be_phy_bb_config()
113 rtl_write_dword(rtlpriv, 0x4c, tmp | BIT(23)); in rtl8723be_phy_bb_config()
115 rtl_write_byte(rtlpriv, REG_AFE_XTAL_CTRL + 1, 0x80); in rtl8723be_phy_bb_config()
120 crystalcap = crystalcap & 0x3F; in rtl8723be_phy_bb_config()
121 rtl_set_bbreg(hw, REG_MAC_PHY_CTRL, 0xFFF000, in rtl8723be_phy_bb_config()
140 u32 intf = (rtlhal->interface == INTF_USB ? BIT(1) : BIT(0)); in _rtl8723be_check_positive()
142 u8 board_type = ((rtlhal->board_type & BIT(4)) >> 4) << 0 | /* _GLNA */ in _rtl8723be_check_positive()
150 0 << 20 | /* interface 2/2 */ in _rtl8723be_check_positive()
[all …]
Dreg.h7 #define TXPKT_BUF_SELECT 0x69
8 #define RXPKT_BUF_SELECT 0xA5
9 #define DISABLE_TRXPKT_BUF_ACCESS 0x0
11 #define REG_SYS_ISO_CTRL 0x0000
12 #define REG_SYS_FUNC_EN 0x0002
13 #define REG_APS_FSMCO 0x0004
14 #define REG_SYS_CLKR 0x0008
15 #define REG_9346CR 0x000A
16 #define REG_EE_VPD 0x000C
17 #define REG_AFE_MISC 0x0010
[all …]
/kernel/linux/linux-5.10/drivers/hwtracing/coresight/
Dcoresight-stm.c35 #define STMDMASTARTR 0xc04
36 #define STMDMASTOPR 0xc08
37 #define STMDMASTATR 0xc0c
38 #define STMDMACTLR 0xc10
39 #define STMDMAIDR 0xcfc
40 #define STMHEER 0xd00
41 #define STMHETER 0xd20
42 #define STMHEBSR 0xd60
43 #define STMHEMCR 0xd64
44 #define STMHEMASTR 0xdf4
[all …]
/kernel/linux/linux-5.10/drivers/staging/rtl8723bs/include/
DHal8192CPhyReg.h41 /* BB-PHY register PMAC 0x100 PHY 0x800 - 0xEFF */
43 /* 2. 0x800/0x900/0xA00/0xC00/0xD00/0xE00 */
44 /* 3. RF register 0x00-2E */
52 /* 1. Page1(0x100) */
54 #define rPMAC_Reset 0x100
55 #define rPMAC_TxStart 0x104
56 #define rPMAC_TxLegacySIG 0x108
57 #define rPMAC_TxHTSIG1 0x10c
58 #define rPMAC_TxHTSIG2 0x110
59 #define rPMAC_PHYDebug 0x114
[all …]
/kernel/linux/linux-5.10/drivers/net/wireless/realtek/rtlwifi/rtl8188ee/
Dphy.c58 "BBR MASK=0x%x Addr[0x%x]=0x%x\n", bitmask, in rtl88e_phy_query_bb_reg()
154 u8 rfpi_enable = 0; in _rtl88e_phy_rf_serial_read()
157 offset &= 0xff; in _rtl88e_phy_rf_serial_read()
161 return 0xFFFFFFFF; in _rtl88e_phy_rf_serial_read()
188 "RFR-%d Addr[0x%x]=0x%x\n", in _rtl88e_phy_rf_serial_read()
207 offset &= 0xff; in _rtl88e_phy_rf_serial_write()
209 data_and_addr = ((newoffset << 20) | (data & 0x000fffff)) & 0x0fffffff; in _rtl88e_phy_rf_serial_write()
212 "RFW-%d Addr[0x%x]=0x%x\n", in _rtl88e_phy_rf_serial_write()
221 rtl_write_byte(rtlpriv, 0x04CA, 0x0B); in rtl88e_phy_mac_config()
235 regval | BIT(13) | BIT(0) | BIT(1)); in rtl88e_phy_bb_config()
[all …]
Dreg.h7 #define TXPKT_BUF_SELECT 0x69
8 #define RXPKT_BUF_SELECT 0xA5
9 #define DISABLE_TRXPKT_BUF_ACCESS 0x0
11 #define REG_SYS_ISO_CTRL 0x0000
12 #define REG_SYS_FUNC_EN 0x0002
13 #define REG_APS_FSMCO 0x0004
14 #define REG_SYS_CLKR 0x0008
15 #define REG_9346CR 0x000A
16 #define REG_EE_VPD 0x000C
17 #define REG_AFE_MISC 0x0010
[all …]
/kernel/linux/linux-5.10/drivers/net/wireless/realtek/rtlwifi/rtl8192ee/
Dreg.h7 #define TXPKT_BUF_SELECT 0x69
8 #define RXPKT_BUF_SELECT 0xA5
9 #define DISABLE_TRXPKT_BUF_ACCESS 0x0
11 #define REG_SYS_ISO_CTRL 0x0000
12 #define REG_SYS_FUNC_EN 0x0002
13 #define REG_APS_FSMCO 0x0004
14 #define REG_SYS_CLKR 0x0008
15 #define REG_9346CR 0x000A
16 #define REG_EE_VPD 0x000C
17 #define REG_SYS_SWR_CTRL1 0x0010
[all …]
Dphy.c53 "BBR MASK=0x%x Addr[0x%x]=0x%x\n", in rtl92ee_phy_query_bb_reg()
143 u8 rfpi_enable = 0; in _rtl92ee_phy_rf_serial_read()
146 offset &= 0xff; in _rtl92ee_phy_rf_serial_read()
150 return 0xFFFFFFFF; in _rtl92ee_phy_rf_serial_read()
176 "RFR-%d Addr[0x%x]=0x%x\n", in _rtl92ee_phy_rf_serial_read()
195 offset &= 0xff; in _rtl92ee_phy_rf_serial_write()
197 data_and_addr = ((newoffset << 20) | (data & 0x000fffff)) & 0x0fffffff; in _rtl92ee_phy_rf_serial_write()
200 "RFW-%d Addr[0x%x]=0x%x\n", rfpath, in _rtl92ee_phy_rf_serial_write()
227 regval | BIT(13) | BIT(0) | BIT(1)); in rtl92ee_phy_bb_config()
234 rtl_write_byte(rtlpriv, REG_AFE_XTAL_CTRL + 1, 0x80); in rtl92ee_phy_bb_config()
[all …]
/kernel/linux/linux-5.10/drivers/net/wireless/realtek/rtlwifi/rtl8821ae/
Dreg.h7 #define TXPKT_BUF_SELECT 0x69
8 #define RXPKT_BUF_SELECT 0xA5
9 #define DISABLE_TRXPKT_BUF_ACCESS 0x0
11 #define REG_SYS_ISO_CTRL 0x0000
12 #define REG_SYS_FUNC_EN 0x0002
13 #define REG_APS_FSMCO 0x0004
14 #define REG_SYS_CLKR 0x0008
15 #define REG_9346CR 0x000A
16 #define REG_EE_VPD 0x000C
17 #define REG_AFE_MISC 0x0010
[all …]
Dtable.c7 0x800, 0x8020D010,
8 0x804, 0x080112E0,
9 0x808, 0x0E028233,
10 0x80C, 0x12131113,
11 0x810, 0x20101263,
12 0x814, 0x020C3D10,
13 0x818, 0x03A00385,
14 0x820, 0x00000000,
15 0x824, 0x00030FE0,
16 0x828, 0x00000000,
[all …]
/kernel/linux/linux-5.10/drivers/net/wireless/realtek/rtw88/
Drtw8822b.c41 efuse->lna_type_2g = map->lna_type_2g[0]; in rtw8822b_read_efuse()
42 efuse->lna_type_5g = map->lna_type_5g[0]; in rtw8822b_read_efuse()
44 efuse->country_code[0] = map->country_code[0]; in rtw8822b_read_efuse()
47 efuse->regd = map->rf_board_option & 0x7; in rtw8822b_read_efuse()
51 for (i = 0; i < 4; i++) in rtw8822b_read_efuse()
63 return 0; in rtw8822b_read_efuse()
69 rtw_write32_mask(rtwdev, 0x64, BIT(29) | BIT(28), 0x3); in rtw8822b_phy_rfe_init()
70 rtw_write32_mask(rtwdev, 0x4c, BIT(26) | BIT(25), 0x0); in rtw8822b_phy_rfe_init()
71 rtw_write32_mask(rtwdev, 0x40, BIT(2), 0x1); in rtw8822b_phy_rfe_init()
74 rtw_write32_mask(rtwdev, 0x1990, 0x3f, 0x30); in rtw8822b_phy_rfe_init()
[all …]
Drtw8723d.c19 [DESC_RATE1M] = { .addr = 0xe08, .mask = 0x0000ff00 },
20 [DESC_RATE2M] = { .addr = 0x86c, .mask = 0x0000ff00 },
21 [DESC_RATE5_5M] = { .addr = 0x86c, .mask = 0x00ff0000 },
22 [DESC_RATE11M] = { .addr = 0x86c, .mask = 0xff000000 },
23 [DESC_RATE6M] = { .addr = 0xe00, .mask = 0x000000ff },
24 [DESC_RATE9M] = { .addr = 0xe00, .mask = 0x0000ff00 },
25 [DESC_RATE12M] = { .addr = 0xe00, .mask = 0x00ff0000 },
26 [DESC_RATE18M] = { .addr = 0xe00, .mask = 0xff000000 },
27 [DESC_RATE24M] = { .addr = 0xe04, .mask = 0x000000ff },
28 [DESC_RATE36M] = { .addr = 0xe04, .mask = 0x0000ff00 },
[all …]
Drtw8821c_table.c10 0x010, 0x00000043,
11 0x025, 0x0000001D,
12 0x026, 0x000000CE,
13 0x04F, 0x00000001,
14 0x029, 0x000000F9,
15 0x420, 0x00000080,
16 0x421, 0x0000000F,
17 0x428, 0x0000000A,
18 0x429, 0x00000010,
19 0x430, 0x00000000,
[all …]
Drtw8822b_table.c10 0x029, 0x000000F9,
11 0x420, 0x00000080,
12 0x421, 0x0000001F,
13 0x428, 0x0000000A,
14 0x429, 0x00000010,
15 0x430, 0x00000000,
16 0x431, 0x00000000,
17 0x432, 0x00000000,
18 0x433, 0x00000001,
19 0x434, 0x00000004,
[all …]