| /kernel/linux/linux-5.10/sound/soc/ux500/ |
| D | ux500_msp_i2s.c | 141 writel(temp_reg, msp->registers + MSP_TCF); in set_prot_desc_tx()
169 writel(temp_reg, msp->registers + MSP_RCF); in set_prot_desc_rx()
206 temp_reg = readl(msp->registers + MSP_GCR) & ~TX_CLK_POL_RISING; in configure_protocol()
208 writel(temp_reg, msp->registers + MSP_GCR); in configure_protocol()
209 temp_reg = readl(msp->registers + MSP_GCR) & ~RX_CLK_POL_RISING; in configure_protocol()
211 writel(temp_reg, msp->registers + MSP_GCR); in configure_protocol()
225 reg_val_GCR = readl(msp->registers + MSP_GCR); in setup_bitclk()
226 writel(reg_val_GCR & ~SRG_ENABLE, msp->registers + MSP_GCR); in setup_bitclk()
258 writel(temp_reg, msp->registers + MSP_SRG); in setup_bitclk()
264 reg_val_GCR = readl(msp->registers + MSP_GCR); in setup_bitclk()
[all …]
|
| /kernel/linux/linux-5.10/Documentation/trace/coresight/ |
| D | coresight-etm4x-reference.rst | 17 ETMv4 registers that they effect. Note the register names are given without
23 :Trace Registers: {CONFIGR + others}
27 other registers to enable the features requested.
40 :Trace Registers: All
50 :Trace Registers: PRGCTLR, All hardware regs.
63 :Trace Registers: None.
75 :Trace Registers: None.
88 :Trace Registers: ACVR[idx, idx+1], VIIECTLR
111 :Trace Registers: ACVR[idx]
124 :Trace Registers: ACVR[idx], VISSCTLR
[all …]
|
| /kernel/linux/linux-5.10/drivers/video/fbdev/i810/ |
| D | i810_regs.h | 25 * All GC registers are memory-mapped. In addition, the VGA and extended VGA registers
32 /* Instruction and Interrupt Control Registers (01000h 02FFFh) */
60 /* Memory Control Registers (03000h 03FFFh) */
66 /* Span Cursor Registers (04000h 04FFFh) */
69 /* I/O Control Registers (05000h 05FFFh) */
75 /* Clock Control and Power Management Registers (06000h 06FFFh) */
86 /* Overlay Registers (30000h 03FFFFh) */
146 /* LCD/TV-Out and HW DVD Registers (60000h 6FFFFh) */
158 /* Display and Cursor Control Registers (70000h 7FFFFh) */
172 /* VGA Registers */
[all …]
|
| /kernel/linux/linux-5.10/sound/soc/codecs/ |
| D | tlv320aic3x.h | 44 /* ADC PGA Gain control registers */
47 /* MIC3 control registers */
50 /* Line1 Input control registers */
55 /* Line2 Input control registers */
61 /* AGC Control Registers A, B, C */
69 /* DAC Power and Left High Power Output control registers */
72 /* Right High Power Output control registers */
76 /* DAC Output Switching control registers */
78 /* High Power Output Driver Pop Reduction registers */
80 /* DAC Digital control registers */
[all …]
|
| /kernel/linux/linux-5.10/drivers/scsi/smartpqi/ |
| D | smartpqi_sis.c | 90 status = readl(&ctrl_info->registers->sis_firmware_status); in sis_wait_for_ctrl_ready_with_timeout()
96 &ctrl_info->registers->sis_mailbox[7])); in sis_wait_for_ctrl_ready_with_timeout()
131 status = readl(&ctrl_info->registers->sis_firmware_status); in sis_is_firmware_running()
141 readl(&ctrl_info->registers->sis_mailbox[7])); in sis_is_firmware_running()
148 return readl(&ctrl_info->registers->sis_firmware_status) & in sis_is_kernel_up()
160 struct pqi_ctrl_registers __iomem *registers; in sis_send_sync_cmd() local
166 registers = ctrl_info->registers; in sis_send_sync_cmd()
169 writel(cmd, ®isters->sis_mailbox[0]); in sis_send_sync_cmd()
176 writel(params->mailbox[i], ®isters->sis_mailbox[i]); in sis_send_sync_cmd()
180 ®isters->sis_ctrl_to_host_doorbell_clear); in sis_send_sync_cmd()
[all …]
|
| /kernel/linux/linux-5.10/drivers/media/usb/cpia2/ |
| D | cpia2_core.c | 247 cmd.buffer.registers[0].index = CPIA2_VC_ST_CTRL; in cpia2_do_command()
248 cmd.buffer.registers[0].value = CPIA2_VC_ST_CTRL_SRC_VC | in cpia2_do_command()
250 cmd.buffer.registers[1].index = CPIA2_VC_ST_CTRL; in cpia2_do_command()
251 cmd.buffer.registers[1].value = CPIA2_VC_ST_CTRL_SRC_VC | in cpia2_do_command()
260 cmd.buffer.registers[0].index = in cpia2_do_command()
262 cmd.buffer.registers[1].index = in cpia2_do_command()
264 cmd.buffer.registers[0].value = CPIA2_SYSTEM_CONTROL_CLEAR_ERR; in cpia2_do_command()
265 cmd.buffer.registers[1].value = in cpia2_do_command()
380 cmd.buffer.registers[0].index = CPIA2_VC_VC_TARGET_KB; in cpia2_do_command()
381 cmd.buffer.registers[0].value = param; in cpia2_do_command()
[all …]
|
| /kernel/linux/linux-5.10/arch/xtensa/variants/csp/include/variant/ |
| D | tie-asm.h | 58 * (not including zero-overhead loop registers).
62 * at1..at4 Four temporary address registers (first XCHAL_NCP_NUM_ATMPS
63 * registers are clobbered, the remaining are unused).
70 * select Select what category(ies) of registers to store, as a bitmask
71 * (see XTHAL_SAS_xxx constants). Defaults to all registers.
72 * alloc Select what category(ies) of registers to allocate; if any
74 * the corresponding registers is skipped without doing any store.
78 // Optional global registers used by default by the compiler:
88 // Optional caller-saved registers used by default by the compiler:
100 // Optional caller-saved registers not used by default by the compiler:
[all …]
|
| /kernel/linux/linux-5.10/arch/xtensa/variants/de212/include/variant/ |
| D | tie-asm.h | 58 * (not including zero-overhead loop registers).
62 * at1..at4 Four temporary address registers (first XCHAL_NCP_NUM_ATMPS
63 * registers are clobbered, the remaining are unused).
70 * select Select what category(ies) of registers to store, as a bitmask
71 * (see XTHAL_SAS_xxx constants). Defaults to all registers.
72 * alloc Select what category(ies) of registers to allocate; if any
74 * the corresponding registers is skipped without doing any store.
78 // Optional caller-saved registers used by default by the compiler:
90 // Optional caller-saved registers not used by default by the compiler:
112 * (not including zero-overhead loop registers).
[all …]
|
| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/powerpc/nintendo/ |
| D | wii.txt | 31 - reg : should contain the VI registers location and length
42 - reg : should contain the PI registers location and length
64 - reg : should contain the DSP registers location and length
76 - reg : should contain the SI registers location and length
87 - reg : should contain the AI registers location and length
97 - reg : should contain the EXI registers location and length
107 - reg : should contain the OHCI registers location and length
117 - reg : should contain the EHCI registers location and length
127 - reg : should contain the SDHCI registers location and length
136 - reg : should contain the IPC registers location and length
[all …]
|
| /kernel/linux/linux-5.10/arch/mips/include/uapi/asm/ |
| D | kvm.h | 51 * registers. The id field is broken down as follows:
57 * Register set = 0: GP registers from kvm_regs (see definitions below).
59 * Register set = 1: CP0 registers.
62 * COP0 register set = 0: Main CP0 registers.
69 * Register set = 2: KVM specific registers (see definitions below).
71 * Register set = 3: FPU / MSA registers (see definitions below).
73 * Other sets registers may be added in the future. Each set would
84 * KVM_REG_MIPS_GP - General purpose registers from kvm_regs.
126 * KVM_REG_MIPS_CP0 - Coprocessor 0 registers.
135 * KVM_REG_MIPS_KVM - KVM specific control registers.
[all …]
|
| /kernel/liteos_a/arch/arm/include/ |
| D | gic_common.h | 63 …ine GICD_IGROUPR(n) (GICD_OFFSET + 0x080 + (n) * 4) /* Interrupt Group Registers */
64 …ICD_ISENABLER(n) (GICD_OFFSET + 0x100 + (n) * 4) /* Interrupt Set-Enable Registers */
65 …D_ICENABLER(n) (GICD_OFFSET + 0x180 + (n) * 4) /* Interrupt Clear-Enable Registers */
66 …CD_ISPENDR(n) (GICD_OFFSET + 0x200 + (n) * 4) /* Interrupt Set-Pending Registers */
67 …_ICPENDR(n) (GICD_OFFSET + 0x280 + (n) * 4) /* Interrupt Clear-Pending Registers */
68 …ACTIVER(n) (GICD_OFFSET + 0x300 + (n) * 4) /* GICv2 Interrupt Set-Active Registers */
69 …D_ICACTIVER(n) (GICD_OFFSET + 0x380 + (n) * 4) /* Interrupt Clear-Active Registers */
70 … GICD_IPRIORITYR(n) (GICD_OFFSET + 0x400 + (n) * 4) /* Interrupt Priority Registers */
71 …RGETSR(n) (GICD_OFFSET + 0x800 + (n) * 4) /* Interrupt Processor Targets Registers */
72 …_ICFGR(n) (GICD_OFFSET + 0xc00 + (n) * 4) /* Interrupt Configuration Registers */
[all …]
|
| /kernel/linux/linux-5.10/drivers/media/radio/si470x/ |
| D | radio-si470x-common.c | 185 radio->registers[SYSCONFIG2] &= ~SYSCONFIG2_BAND; in si470x_set_band()
186 radio->registers[SYSCONFIG2] |= radio->band << 6; in si470x_set_band()
203 if ((radio->registers[POWERCFG] & (POWERCFG_ENABLE|POWERCFG_DMUTE)) in si470x_set_chan()
209 radio->registers[CHANNEL] &= ~CHANNEL_CHAN; in si470x_set_chan()
210 radio->registers[CHANNEL] |= CHANNEL_TUNE | chan; in si470x_set_chan()
222 if ((radio->registers[STATUSRSSI] & STATUSRSSI_STC) == 0) in si470x_set_chan()
229 radio->registers[CHANNEL] &= ~CHANNEL_TUNE; in si470x_set_chan()
242 switch ((radio->registers[SYSCONFIG2] & SYSCONFIG2_SPACE) >> 4) { in si470x_get_step()
265 chan = radio->registers[READCHAN] & READCHAN_READCHAN; in si470x_get_freq()
327 radio->registers[POWERCFG] |= POWERCFG_SEEK; in si470x_set_seek()
[all …]
|
| /kernel/linux/linux-5.10/arch/xtensa/variants/dc233c/include/variant/ |
| D | tie-asm.h | 59 * (not including zero-overhead loop registers).
63 * at1..at4 Four temporary address registers (first XCHAL_NCP_NUM_ATMPS
64 * registers are clobbered, the remaining are unused).
71 * select Select what category(ies) of registers to store, as a bitmask
72 * (see XTHAL_SAS_xxx constants). Defaults to all registers.
73 * alloc Select what category(ies) of registers to allocate; if any
75 * the corresponding registers is skipped without doing any store.
89 // Optional caller-saved registers used by default by the compiler:
101 // Optional caller-saved registers not used by default by the compiler:
123 * (not including zero-overhead loop registers).
[all …]
|
| /kernel/linux/linux-5.10/tools/testing/selftests/powerpc/tm/ |
| D | tm-signal-context-chk-vsx.c | 16 * speculative nature of the 'live' registers and may infer the wrong
33 #define NV_VSX_REGS 12 /* Number of VSX registers to check. */
41 /* Test only 12 vsx registers from vsr20 to vsr31 */
66 * FP registers and VMX registers overlap the VSX registers. in signal_usr1()
68 * FP registers (f0-31) overlap the most significant 64 bits of VSX in signal_usr1()
69 * registers vsr0-31, whilst VMX registers vr0-31, being 128-bit like in signal_usr1()
70 * the VSX registers, overlap fully the other half of VSX registers, in signal_usr1()
74 * appeared first on the architecture), VMX registers vr0-31 (so VSX in signal_usr1()
81 * registers, but only the least significant 64 bits of vsr0-31. The in signal_usr1()
83 * registers, is kept in fp_regs. in signal_usr1()
[all …]
|
| /kernel/linux/linux-5.10/arch/xtensa/variants/test_kc705_be/include/variant/ |
| D | tie-asm.h | 58 * (not including zero-overhead loop registers).
62 * at1..at4 Four temporary address registers (first XCHAL_NCP_NUM_ATMPS
63 * registers are clobbered, the remaining are unused).
70 * select Select what category(ies) of registers to store, as a bitmask
71 * (see XTHAL_SAS_xxx constants). Defaults to all registers.
72 * alloc Select what category(ies) of registers to allocate; if any
74 * the corresponding registers is skipped without doing any store.
78 // Optional global registers used by default by the compiler:
88 // Optional caller-saved registers used by default by the compiler:
100 // Optional caller-saved registers not used by default by the compiler:
[all …]
|
| /kernel/linux/linux-5.10/tools/arch/mips/include/uapi/asm/ |
| D | kvm.h | 47 * registers. The id field is broken down as follows:
53 * Register set = 0: GP registers from kvm_regs (see definitions below).
55 * Register set = 1: CP0 registers.
60 * Register set = 2: KVM specific registers (see definitions below).
62 * Register set = 3: FPU / MSA registers (see definitions below).
64 * Other sets registers may be added in the future. Each set would
75 * KVM_REG_MIPS_GP - General purpose registers from kvm_regs.
117 * KVM_REG_MIPS_KVM - KVM specific control registers.
136 * disable). Any reads and writes of Count related registers while
152 * KVM_REG_MIPS_FPU - Floating Point and MIPS SIMD Architecture (MSA) registers.
[all …]
|
| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/i2c/ |
| D | mellanox,i2c-mlxbf.txt | 7 - reg : address offset and length of the device registers. The
8 registers consist of the following set of resources:
9 1) Smbus block registers.
10 2) Cause master registers.
11 3) Cause slave registers.
12 4) Cause coalesce registers (if compatible isn't set
19 - clock-frequency : bus frequency used to configure timing registers;
|
| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/arm/ |
| D | atmel-sysregs.txt | 1 Atmel system registers
5 - reg : Should contain registers location and length
9 - reg: Should contain registers location and length
15 - reg: Should contain registers location and length
21 - reg: Should contain registers location and length
32 - reg: Should contain registers location and length
49 - reg: Should contain registers location and length
63 - reg: Should contain registers location and length
95 - reg: should contain registers location and length
151 Special Function Registers (SFR)
[all …]
|
| /kernel/linux/linux-5.10/include/uapi/linux/ |
| D | elf.h | 388 #define NT_PPC_VMX 0x100 /* PowerPC Altivec/VMX registers */
389 #define NT_PPC_SPE 0x101 /* PowerPC SPE/EVR registers */
390 #define NT_PPC_VSX 0x102 /* PowerPC VSX registers */
394 #define NT_PPC_EBB 0x106 /* Event Based Branch Registers */
395 #define NT_PPC_PMU 0x107 /* Performance Monitor Registers */
396 #define NT_PPC_TM_CGPR 0x108 /* TM checkpointed GPR Registers */
397 #define NT_PPC_TM_CFPR 0x109 /* TM checkpointed FPR Registers */
398 #define NT_PPC_TM_CVMX 0x10a /* TM checkpointed VMX Registers */
399 #define NT_PPC_TM_CVSX 0x10b /* TM checkpointed VSX Registers */
400 #define NT_PPC_TM_SPR 0x10c /* TM Special Purpose Registers */
[all …]
|
| /kernel/linux/linux-5.10/drivers/media/usb/gspca/ |
| D | se401.h | 34 /* Hyundai hv7131b registers
36 /* Mode registers: */
40 /* Frame registers: */
49 /* Timing registers: */
58 /* Adjust Registers: */
65 /* Offset Registers: */
69 /* REset level statistics registers: */
75 /* se401 registers */
|
| /kernel/linux/linux-5.10/drivers/char/agp/ |
| D | intel-agp.h | 8 /* Intel registers */
15 /* Intel i830 registers */
34 /* Intel 855GM/852GM registers */
50 /* Intel i845 registers */
54 /* Intel i860 registers */
58 /* Intel i810 registers */
104 /* Intel i820 registers */
108 /* Intel i840 registers */
112 /* Intel i850 registers */
116 /* intel 915G registers */
[all …]
|
| /kernel/liteos_m/arch/risc-v/nuclei/gcc/ |
| D | los_exc.S | 53 * This macro save ABI defined caller saved registers in the stack.
58 /* Save caller registers */
90 * \brief Macro for restore caller registers
92 * This macro restore ABI defined caller saved registers from stack.
97 /* Restore caller registers */
161 * ABI defined caller save register and some CSR registers
169 /* Save the caller saving registers (context) */
171 /* Save the necessary CSR registers */
187 /* Restore the necessary CSR registers */
189 /* Restore the caller saving registers (context) */
[all …]
|
| /kernel/linux/linux-5.10/drivers/media/platform/s5p-g2d/ |
| D | g2d-regs.h | 9 /* General Registers */
18 /* Command Registers */
22 /* Parameter Setting Registers (Rotate & Direction) */
27 /* Parameter Setting Registers (Src) */
38 /* Parameter Setting Registers (Dest) */
46 /* Parameter Setting Registers (Pattern) */
53 /* Parameter Setting Registers (Mask) */
57 /* Parameter Setting Registers (Clipping Window) */
62 /* Parameter Setting Registers (ROP & Alpha Setting) */
67 /* Parameter Setting Registers (Color) */
[all …]
|
| /kernel/linux/linux-5.10/arch/mips/include/asm/sibyte/ |
| D | bcm1480_scd.h | 51 * System control/debug registers
157 * Mailbox Registers (Table 17)
158 * Registers: SCD_MBOX_{0,1}_CPU_x
164 * See bcm1480_int.h for interrupt mapper registers.
169 * Watchdog Timer Initial Count Registers (Table 23)
170 * Registers: SCD_WDOG_INIT_CNT_x
179 * Watchdog Timer Configuration Registers (Table 25)
180 * Registers: SCD_WDOG_CFG_x
202 * General Timer Initial Count Registers (Table 26)
203 * Registers: SCD_TIMER_INIT_x
[all …]
|
| /kernel/linux/linux-5.10/drivers/ntb/hw/idt/ |
| D | ntb_hw_idt.h | 78 * NT-function Configuration Space registers
82 * 2) Additionally the registers should be accessed either
107 /* IDT Proprietary NT-port-specific registers */
108 /* NT-function main control registers */
121 /* Doorbel registers */
127 /* Message registers */
147 /* BAR-setup registers */
173 /* NT mapping table registers */
180 /* Memory Windows Lookup table registers */
186 /* NT Endpoint Uncorrectable/Correctable Errors Emulation registers (DWORD) */
[all …]
|