1 /* 2 * Copyright © 2022 Imagination Technologies Ltd. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a copy 5 * of this software and associated documentation files (the "Software"), to deal 6 * in the Software without restriction, including without limitation the rights 7 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 8 * copies of the Software, and to permit persons to whom the Software is 9 * furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice (including the next 12 * paragraph) shall be included in all copies or substantial portions of the 13 * Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE 18 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 21 * SOFTWARE. 22 */ 23 24 #ifndef PVR_HW_PASS_H 25 #define PVR_HW_PASS_H 26 27 #include <stdbool.h> 28 #include <stdint.h> 29 30 struct pvr_device; 31 struct pvr_render_pass; 32 33 enum pvr_renderpass_surface_initop { 34 RENDERPASS_SURFACE_INITOP_CLEAR, 35 RENDERPASS_SURFACE_INITOP_LOAD, 36 RENDERPASS_SURFACE_INITOP_NOP, 37 }; 38 39 struct pvr_renderpass_hwsetup_subpass { 40 /* If >=0 then copy the depth into this pixel output for all fragment 41 * programs in the subpass. 42 */ 43 int32_t z_replicate; 44 45 /* The operation to perform on the depth at the start of the subpass. Loads 46 * are deferred to subpasses when depth has been replicated 47 */ 48 enum pvr_renderpass_surface_initop depth_initop; 49 50 /* If true then clear the stencil at the start of the subpass. */ 51 bool stencil_clear; 52 53 /* Driver Id from the input pvr_render_subpass structure. */ 54 uint32_t driver_id; 55 56 /* For each color attachment to the subpass: the operation to perform at 57 * the start of the subpass. 58 */ 59 enum pvr_renderpass_surface_initop *color_initops; 60 61 void *client_data; 62 }; 63 64 struct pvr_renderpass_colorinit { 65 /* Source surface for the operation. */ 66 uint32_t driver_id; 67 68 /* Type of operation: either clear or load. */ 69 enum pvr_renderpass_surface_initop op; 70 }; 71 72 /* FIXME: Adding these USC enums and structures here for now to avoid adding 73 * usc.h header. Needs to be moved to compiler specific header. 74 */ 75 /* Specifies the location of render target writes. */ 76 enum usc_mrt_resource_type { 77 USC_MRT_RESOURCE_TYPE_INVALID = 0, /* explicitly treat 0 as invalid */ 78 USC_MRT_RESOURCE_TYPE_OUTPUT_REGISTER, 79 USC_MRT_RESOURCE_TYPE_MEMORY, 80 }; 81 82 struct usc_mrt_resource { 83 /* Resource type allocated for render target. */ 84 enum usc_mrt_resource_type type; 85 86 union { 87 /* If type == USC_MRT_RESOURCE_TYPE_OUTPUT_REGISTER. */ 88 struct { 89 /* The output register to use. */ 90 uint32_t out_reg; 91 92 /* The offset in bytes into the output register. */ 93 uint32_t offset; 94 } reg; 95 96 /* If type == USC_MRT_RESOURCE_TYPE_MEMORY. */ 97 struct { 98 /* The number of the tile buffer to use. */ 99 uint32_t tile_buffer; 100 101 /* The offset in dwords within the tile buffer. */ 102 uint32_t offset_in_dwords; 103 } mem; 104 } u; 105 }; 106 107 struct usc_mrt_setup { 108 /* Number of render targets present. */ 109 uint32_t render_targets_count; 110 111 /* Array of MRT resources allocated for each render target. The number of 112 * elements is determined by usc_mrt_setup::render_targets_count. 113 */ 114 struct usc_mrt_resource *mrt_resources; 115 }; 116 117 enum pvr_resolve_type { 118 PVR_RESOLVE_TYPE_INVALID = 0, /* explicitly treat 0 as invalid */ 119 PVR_RESOLVE_TYPE_PBE, 120 PVR_RESOLVE_TYPE_TRANSFER, 121 }; 122 123 struct pvr_renderpass_hwsetup_eot_surface { 124 /* MRT index to store from. Also used to index into 125 * usc_mrt_setup::mrt_resources. 126 */ 127 uint32_t mrt_index; 128 129 /* Index of pvr_render_pass_info::attachments to store into. */ 130 uint32_t attachment_index; 131 132 /* True if the surface should be resolved. */ 133 bool need_resolve; 134 135 /* How the surface should be resolved at the end of a render. Only valid if 136 * pvr_renderpass_hwsetup_eot_surface::need_resolve is set to true. 137 */ 138 enum pvr_resolve_type resolve_type; 139 140 /* Index of pvr_render_pass_info::attachments to resolve from. Only valid if 141 * pvr_renderpass_hwsetup_eot_surface::need_resolve is set to true. 142 */ 143 uint32_t src_attachment_index; 144 }; 145 146 struct pvr_renderpass_hwsetup_render { 147 /* Number of pixel output registers to allocate for this render. */ 148 uint32_t output_regs_count; 149 150 /* Number of tile buffers to allocate for this render. */ 151 uint32_t tile_buffers_count; 152 153 /* Number of subpasses in this render. */ 154 uint32_t subpass_count; 155 156 /* Description of each subpass. */ 157 struct pvr_renderpass_hwsetup_subpass *subpasses; 158 159 /* The sample count of every color attachment (or depth attachment if 160 * z-only) in this render 161 */ 162 uint32_t sample_count; 163 164 /* Driver Id for the surface to use for depth/stencil load/store in this 165 * render. 166 */ 167 int32_t ds_surface_id; 168 169 /* Operation on the on-chip depth at the start of the render. 170 * Either load from 'ds_surface_id', clear using 'ds_surface_id' or leave 171 * uninitialized. 172 */ 173 enum pvr_renderpass_surface_initop depth_init; 174 175 /* Operation on the on-chip stencil at the start of the render. */ 176 enum pvr_renderpass_surface_initop stencil_init; 177 178 /* For each operation: the destination in the on-chip color storage. */ 179 struct usc_mrt_setup init_setup; 180 181 /* Count of operations on on-chip color storage at the start of the render. 182 */ 183 uint32_t color_init_count; 184 185 /* How to initialize render targets at the start of the render. */ 186 struct pvr_renderpass_colorinit *color_init; 187 188 /* Describes the location of the source data for each stored surface. */ 189 struct usc_mrt_setup eot_setup; 190 191 struct pvr_renderpass_hwsetup_eot_surface *eot_surfaces; 192 uint32_t eot_surface_count; 193 194 void *client_data; 195 }; 196 197 struct pvr_renderpass_hw_map { 198 uint32_t render; 199 uint32_t subpass; 200 }; 201 202 struct pvr_renderpass_hwsetup { 203 /* Number of renders. */ 204 uint32_t render_count; 205 206 /* Description of each render. */ 207 struct pvr_renderpass_hwsetup_render *renders; 208 209 /* Maps indices from pvr_render_pass::subpasses to the 210 * pvr_renderpass_hwsetup_render/pvr_renderpass_hwsetup_subpass relative to 211 * that render where the subpass is scheduled. 212 */ 213 struct pvr_renderpass_hw_map *subpass_map; 214 }; 215 216 struct pvr_renderpass_hwsetup * 217 pvr_create_renderpass_hwsetup(struct pvr_device *device, 218 struct pvr_render_pass *pass, 219 bool disable_merge); 220 void pvr_destroy_renderpass_hwsetup(struct pvr_device *device, 221 struct pvr_renderpass_hwsetup *hw_setup); 222 223 #endif /* PVR_HW_PASS_H */ 224