1 /* 2 * Copyright © 2022 Imagination Technologies Ltd. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a copy 5 * of this software and associated documentation files (the "Software"), to deal 6 * in the Software without restriction, including without limitation the rights 7 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 8 * copies of the Software, and to permit persons to whom the Software is 9 * furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice (including the next 12 * paragraph) shall be included in all copies or substantial portions of the 13 * Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE 18 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 21 * SOFTWARE. 22 */ 23 24 #ifndef PVR_SRV_BO_H 25 #define PVR_SRV_BO_H 26 27 #include <stdint.h> 28 29 #include "pvr_private.h" 30 #include "pvr_srv.h" 31 #include "pvr_types.h" 32 #include "pvr_winsys.h" 33 #include "util/macros.h" 34 35 /******************************************* 36 MemAlloc flags 37 *******************************************/ 38 39 /* TODO: remove unused and redundant flags */ 40 #define PVR_SRV_MEMALLOCFLAG_DEVICE_FLAGS_OFFSET 26U 41 #define PVR_SRV_MEMALLOCFLAG_DEVICE_FLAGS_MASK \ 42 (0x3ULL << PVR_SRV_MEMALLOCFLAG_DEVICE_FLAGS_OFFSET) 43 #define PVR_SRV_MEMALLOCFLAG_CPU_CACHE_CLEAN BITFIELD_BIT(19U) 44 #define PVR_SRV_MEMALLOCFLAG_KERNEL_CPU_MAPPABLE BITFIELD_BIT(14U) 45 #define PVR_SRV_MEMALLOCFLAG_ZERO_ON_ALLOC BITFIELD_BIT(31U) 46 #define PVR_SRV_MEMALLOCFLAG_SVM_ALLOC BITFIELD_BIT(17U) 47 #define PVR_SRV_MEMALLOCFLAG_POISON_ON_ALLOC BITFIELD_BIT(30U) 48 #define PVR_SRV_MEMALLOCFLAG_POISON_ON_FREE BITFIELD_BIT(29U) 49 #define PVR_SRV_MEMALLOCFLAG_GPU_READABLE BITFIELD_BIT(0U) 50 #define PVR_SRV_MEMALLOCFLAG_GPU_WRITEABLE BITFIELD_BIT(1U) 51 #define PVR_SRV_MEMALLOCFLAG_GPU_CACHE_MODE_MASK (7ULL << 8U) 52 #define PVR_SRV_MEMALLOCFLAGS_GPU_MMUFLAGSMASK \ 53 (PVR_SRV_MEMALLOCFLAG_GPU_READABLE | PVR_SRV_MEMALLOCFLAG_GPU_WRITEABLE | \ 54 PVR_SRV_MEMALLOCFLAG_GPU_CACHE_MODE_MASK) 55 #define PVR_SRV_MEMALLOCFLAG_CPU_READABLE BITFIELD_BIT(4U) 56 #define PVR_SRV_MEMALLOCFLAG_CPU_WRITEABLE BITFIELD_BIT(5U) 57 #define PVR_SRV_MEMALLOCFLAG_CPU_CACHE_MODE_MASK (7ULL << 11U) 58 #define PVR_SRV_MEMALLOCFLAG_CPU_CACHE_INCOHERENT (3ULL << 11U) 59 #define PVR_SRV_MEMALLOCFLAGS_CPU_MMUFLAGSMASK \ 60 (PVR_SRV_MEMALLOCFLAG_CPU_READABLE | PVR_SRV_MEMALLOCFLAG_CPU_WRITEABLE | \ 61 PVR_SRV_MEMALLOCFLAG_CPU_CACHE_MODE_MASK) 62 #define PVR_SRV_MEMALLOCFLAG_NO_OSPAGES_ON_ALLOC BITFIELD_BIT(15U) 63 #define PVR_SRV_MEMALLOCFLAG_SPARSE_NO_DUMMY_BACKING BITFIELD_BIT(18U) 64 #define PVR_SRV_MEMALLOCFLAG_SPARSE_ZERO_BACKING BITFIELD_BIT(20U) 65 #define PVR_SRV_MEMALLOCFLAG_FW_ALLOC_OSID_MASK (7ULL << 23U) 66 #define PVR_SRV_MEMALLOCFLAG_VAL_SECURE_BUFFER BITFIELD64_BIT(34U) 67 #define PVR_SRV_MEMALLOCFLAG_VAL_SHARED_BUFFER BITFIELD64_BIT(35U) 68 #define PVR_SRV_PHYS_HEAP_HINT_SHIFT (60U) 69 #define PVR_SRV_PHYS_HEAP_HINT_MASK (0xFULL << PVR_SRV_PHYS_HEAP_HINT_SHIFT) 70 #define PVR_SRV_MEMALLOCFLAG_GPU_UNCACHED BITFIELD_BIT(8U) 71 #define PVR_SRV_MEMALLOCFLAG_GPU_CACHE_INCOHERENT (3ULL << 8U) 72 #define PVR_SRV_MEMALLOCFLAG_CPU_UNCACHED_WC (0ULL << 11U) 73 #define PVR_SRV_MEMALLOCFLAG_GPU_READ_PERMITTED BITFIELD_BIT(2U) 74 #define PVR_SRV_MEMALLOCFLAG_GPU_WRITE_PERMITTED BITFIELD_BIT(3U) 75 #define PVR_SRV_MEMALLOCFLAG_CPU_READ_PERMITTED BITFIELD_BIT(6U) 76 #define PVR_SRV_MEMALLOCFLAG_CPU_WRITE_PERMITTED BITFIELD_BIT(7U) 77 78 #define PVR_SRV_MEMALLOCFLAGS_PMRFLAGSMASK \ 79 (PVR_SRV_MEMALLOCFLAG_DEVICE_FLAGS_MASK | \ 80 PVR_SRV_MEMALLOCFLAG_CPU_CACHE_CLEAN | \ 81 PVR_SRV_MEMALLOCFLAG_KERNEL_CPU_MAPPABLE | \ 82 PVR_SRV_MEMALLOCFLAG_ZERO_ON_ALLOC | PVR_SRV_MEMALLOCFLAG_SVM_ALLOC | \ 83 PVR_SRV_MEMALLOCFLAG_POISON_ON_ALLOC | \ 84 PVR_SRV_MEMALLOCFLAG_POISON_ON_FREE | \ 85 PVR_SRV_MEMALLOCFLAGS_GPU_MMUFLAGSMASK | \ 86 PVR_SRV_MEMALLOCFLAGS_CPU_MMUFLAGSMASK | \ 87 PVR_SRV_MEMALLOCFLAG_NO_OSPAGES_ON_ALLOC | \ 88 PVR_SRV_MEMALLOCFLAG_SPARSE_NO_DUMMY_BACKING | \ 89 PVR_SRV_MEMALLOCFLAG_SPARSE_ZERO_BACKING | \ 90 PVR_SRV_MEMALLOCFLAG_FW_ALLOC_OSID_MASK | \ 91 PVR_SRV_MEMALLOCFLAG_VAL_SECURE_BUFFER | \ 92 PVR_SRV_MEMALLOCFLAG_VAL_SHARED_BUFFER | PVR_SRV_PHYS_HEAP_HINT_MASK) 93 94 #define PVR_SRV_MEMALLOCFLAGS_PHYSICAL_MASK \ 95 (PVR_SRV_MEMALLOCFLAGS_CPU_MMUFLAGSMASK | \ 96 PVR_SRV_MEMALLOCFLAG_GPU_CACHE_MODE_MASK | \ 97 PVR_SRV_MEMALLOCFLAG_CPU_READ_PERMITTED | \ 98 PVR_SRV_MEMALLOCFLAG_CPU_WRITE_PERMITTED | \ 99 PVR_SRV_MEMALLOCFLAG_CPU_CACHE_CLEAN | \ 100 PVR_SRV_MEMALLOCFLAG_ZERO_ON_ALLOC | \ 101 PVR_SRV_MEMALLOCFLAG_POISON_ON_ALLOC | \ 102 PVR_SRV_MEMALLOCFLAG_POISON_ON_FREE | PVR_SRV_PHYS_HEAP_HINT_MASK) 103 104 #define PVR_SRV_MEMALLOCFLAGS_VIRTUAL_MASK \ 105 (PVR_SRV_MEMALLOCFLAGS_GPU_MMUFLAGSMASK | \ 106 PVR_SRV_MEMALLOCFLAG_GPU_READ_PERMITTED | \ 107 PVR_SRV_MEMALLOCFLAG_GPU_WRITE_PERMITTED) 108 109 /* Device specific MMU flags. */ 110 /*!< Memory that only the PM and Firmware can access */ 111 #define PM_FW_PROTECT BITFIELD_BIT(0U) 112 113 /* Helper macro for setting device specific MMU flags. */ 114 #define PVR_SRV_MEMALLOCFLAG_DEVICE_FLAG(n) \ 115 (((n) << PVR_SRV_MEMALLOCFLAG_DEVICE_FLAGS_OFFSET) & \ 116 PVR_SRV_MEMALLOCFLAG_DEVICE_FLAGS_MASK) 117 118 /******************************************* 119 struct definitions 120 *******************************************/ 121 122 struct pvr_srv_winsys_bo { 123 struct pvr_winsys_bo base; 124 uint32_t ref_count; 125 void *pmr; 126 127 bool is_display_buffer; 128 uint32_t handle; 129 uint64_t flags; 130 }; 131 132 struct pvr_srv_winsys_vma { 133 struct pvr_winsys_vma base; 134 void *reservation; 135 136 /* Required when mapping whole PMR, used for display buffers mapping. */ 137 void *mapping; 138 }; 139 140 /******************************************* 141 function prototypes 142 *******************************************/ 143 144 VkResult pvr_srv_winsys_buffer_create(struct pvr_winsys *ws, 145 uint64_t size, 146 uint64_t alignment, 147 enum pvr_winsys_bo_type type, 148 uint32_t ws_flags, 149 struct pvr_winsys_bo **const bo_out); 150 VkResult 151 pvr_srv_winsys_buffer_create_from_fd(struct pvr_winsys *ws, 152 int fd, 153 struct pvr_winsys_bo **const bo_out); 154 void pvr_srv_winsys_buffer_destroy(struct pvr_winsys_bo *bo); 155 156 VkResult pvr_srv_winsys_buffer_get_fd(struct pvr_winsys_bo *bo, 157 int *const fd_out); 158 159 void *pvr_srv_winsys_buffer_map(struct pvr_winsys_bo *bo); 160 void pvr_srv_winsys_buffer_unmap(struct pvr_winsys_bo *bo); 161 162 struct pvr_winsys_vma * 163 pvr_srv_heap_alloc_reserved(struct pvr_winsys_heap *heap, 164 const pvr_dev_addr_t reserved_dev_addr, 165 uint64_t size, 166 uint64_t alignment); 167 struct pvr_winsys_vma *pvr_srv_winsys_heap_alloc(struct pvr_winsys_heap *heap, 168 uint64_t size, 169 uint64_t alignment); 170 void pvr_srv_winsys_heap_free(struct pvr_winsys_vma *vma); 171 172 pvr_dev_addr_t pvr_srv_winsys_vma_map(struct pvr_winsys_vma *vma, 173 struct pvr_winsys_bo *bo, 174 uint64_t offset, 175 uint64_t size); 176 void pvr_srv_winsys_vma_unmap(struct pvr_winsys_vma *vma); 177 178 /******************************************* 179 helper macros 180 *******************************************/ 181 182 #define to_pvr_srv_winsys_bo(bo) \ 183 container_of((bo), struct pvr_srv_winsys_bo, base) 184 #define to_pvr_srv_winsys_vma(vma) \ 185 container_of((vma), struct pvr_srv_winsys_vma, base) 186 187 #endif /* PVR_SRV_BO_H */ 188