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Searched refs:allTypes (Results 1 – 2 of 2) sorted by relevance

/base/hiviewdfx/hilog/test/unittest/common/
Dhilog_utils_test.cpp207 vector<uint16_t> allTypes {0, 1, 3, 4}; variable
208 EXPECT_TRUE(vec == allTypes);
/base/hiviewdfx/hilog/services/hilogd/
Dservice_controller.cpp668 vector<uint16_t> allTypes = GetAllLogTypes(); in HandleBufferSizeGetRqst() local
675 for (uint16_t t : allTypes) { in HandleBufferSizeGetRqst()
691 vector<uint16_t> allTypes = GetAllLogTypes(); in HandleBufferSizeSetRqst() local
698 for (uint16_t t : allTypes) { in HandleBufferSizeSetRqst()
761 vector<uint16_t> allTypes = GetAllLogTypes(); in HandleLogRemoveRqst() local
768 for (uint16_t t : allTypes) { in HandleLogRemoveRqst()