Searched refs:DR_REG_SENS_BASE (Results 1 – 2 of 2) sorted by relevance
19 #define SENS_SAR_READ_CTRL_REG (DR_REG_SENS_BASE + 0x0000)64 #define SENS_SAR_READ_STATUS1_REG (DR_REG_SENS_BASE + 0x0004)72 #define SENS_SAR_MEAS_WAIT1_REG (DR_REG_SENS_BASE + 0x0008)86 #define SENS_SAR_MEAS_WAIT2_REG (DR_REG_SENS_BASE + 0x000c)119 #define SENS_SAR_MEAS_CTRL_REG (DR_REG_SENS_BASE + 0x0010)163 #define SENS_SAR_READ_STATUS2_REG (DR_REG_SENS_BASE + 0x0014)171 #define SENS_ULP_CP_SLEEP_CYC0_REG (DR_REG_SENS_BASE + 0x0018)179 #define SENS_ULP_CP_SLEEP_CYC1_REG (DR_REG_SENS_BASE + 0x001c)187 #define SENS_ULP_CP_SLEEP_CYC2_REG (DR_REG_SENS_BASE + 0x0020)195 #define SENS_ULP_CP_SLEEP_CYC3_REG (DR_REG_SENS_BASE + 0x0024)[all …]
50 #define DR_REG_SENS_BASE 0x3ff48800 macro