Searched refs:GET_PERI_REG_MASK (Results 1 – 4 of 4) sorted by relevance
| /device/soc/esp/esp32/components/esp_hw_support/port/esp32/ |
| D | rtc_time.c | 93 while (!GET_PERI_REG_MASK(TIMG_RTCCALICFG_REG(0), TIMG_RTC_CALI_RDY) && in rtc_clk_cal_internal()
146 while (GET_PERI_REG_MASK(RTC_CNTL_TIME_UPDATE_REG, RTC_CNTL_TIME_VALID) == 0) { in rtc_time_get()
166 while (!GET_PERI_REG_MASK(TIMG_RTCCALICFG_REG(0), TIMG_RTC_CALI_RDY)) { in rtc_clk_wait_for_slow_cycle()
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| D | rtc_sleep.c | 197 if (!cfg.deep_slp && GET_PERI_REG_MASK(RTC_CNTL_CLK_CONF_REG, RTC_CNTL_DIG_CLK8M_EN_M)) { in rtc_sleep_init()
239 while (GET_PERI_REG_MASK(RTC_CNTL_INT_RAW_REG, in rtc_sleep_start()
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| D | rtc_clk.c | 247 return GET_PERI_REG_MASK(RTC_IO_XTAL_32K_PAD_REG, RTC_IO_XPD_XTAL_32K) != 0; in rtc_clk_32k_enabled()
270 return GET_PERI_REG_MASK(RTC_CNTL_CLK_CONF_REG, RTC_CNTL_ENB_CK8M) == 0; in rtc_clk_8m_enabled()
275 return GET_PERI_REG_MASK(RTC_CNTL_CLK_CONF_REG, RTC_CNTL_ENB_CK8M_DIV) == 0; in rtc_clk_8md256_enabled()
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| /device/soc/esp/esp32/components/soc/esp32/include/soc/ |
| D | soc.h | 196 #define GET_PERI_REG_MASK(reg, mask) ({ … macro
197 …ASSERT_IF_DPORT_REG((reg), GET_PERI_REG_MASK); …
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