Searched refs:PMU (Results 1 – 13 of 13) sorted by relevance
200 PMU->CTRL |= PMU_CTRL_ENABLE_Msk; in ARM_PMU_Enable()208 PMU->CTRL &= ~PMU_CTRL_ENABLE_Msk; in ARM_PMU_Disable()218 PMU->EVTYPER[num] = type; in ARM_PMU_Set_EVTYPER()226 PMU->CTRL |= PMU_CTRL_CYCCNT_RESET_Msk; in ARM_PMU_CYCCNT_Reset()234 PMU->CTRL |= PMU_CTRL_EVENTCNT_RESET_Msk; in ARM_PMU_EVCNTR_ALL_Reset()246 PMU->CNTENSET = mask; in ARM_PMU_CNTR_Enable()258 PMU->CNTENCLR = mask; in ARM_PMU_CNTR_Disable()267 return PMU->CCNTR; in ARM_PMU_Get_CCNTR()277 return PMU->EVCNTR[num]; in ARM_PMU_Get_EVCNTR()288 return PMU->OVSSET; in ARM_PMU_Get_CNTR_OVS()[all …]
3100 …#define PMU ((PMU_Type *) PMU_BASE ) /*!< PMU configuration struct… macro
3095 …#define PMU ((PMU_Type *) PMU_BASE ) /*!< PMU configuration struct… macro
39 NONE = 0, CPU_GPO = 1, PMU, enumerator
81 bool "Power up Mali PMU domains in parallel"85 This makes the Mali driver power up all PMU power domains in parallel, instead of
58 uint32_t PMU : 1; /*!< bit : 7 */ member964 vld1.b.PMU = 1; in wm_tipc_enable_pmu()981 vld1.b.PMU = 0; in wm_tipc_disable_pmu()
79 mode. The RK3288 PMU is dedicated for managing the power of the whole chip.
36 /* 0: restart PMU;416 /* 0: restart PMU;
38 /* 0: restart PMU;
69 tristate "WM831X PMU support"76 tristate "WM8350 PMU support"172 tristate "Apple PMU battery"
1244 #define PMU ((struct PMU_REG *) PMU_BASE) macro1273 #define IS_PMU_INSTANCE(instance) ((instance) == PMU)
53133 + /* The first 24 pins of the first bank are located in PMU */53168 + /* The first 24 pins of the first bank are located in PMU */53462 + /* The first 32 pins of the first bank are located in PMU */54973 - * part of the PMU register space57306 + pr_warn("PMU:\n");