Home
last modified time | relevance | path

Searched refs:REG_LD_AM (Results 1 – 2 of 2) sorted by relevance

/device/soc/hisilicon/common/platform/hieth-sf/src/
Dctrl.c70 val = FephyExpandedRead(ld, phyAccess->phyAddr, REG_LD_AM); in HiethFephyTrim()
72 FephyExpandedWrite(ld, phyAccess->phyAddr, REG_LD_AM, val); in HiethFephyTrim()
/device/soc/hisilicon/common/platform/hieth-sf/include/internal/
Dctrl.h253 #define REG_LD_AM 0x3050 macro