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Searched refs:VDPU1_REG_STREAM_RLC_BASE (Results 1 – 3 of 3) sorted by relevance

/device/soc/rockchip/rk3588/kernel/drivers/video/rockchip/mpp/
Dmpp_vdpu1.c80 #define VDPU1_REG_STREAM_RLC_BASE 0x030 macro
438 dec_get = mpp_read_relaxed(mpp, VDPU1_REG_STREAM_RLC_BASE); in vdpu_finish()
/device/board/isoftstone/yangfan/kernel/src/driv/video/rockchip/mpp/
Dmpp_vdpu1.c80 #define VDPU1_REG_STREAM_RLC_BASE 0x030 macro
438 dec_get = mpp_read_relaxed(mpp, VDPU1_REG_STREAM_RLC_BASE); in vdpu_finish()
/device/soc/rockchip/common/vendor/drivers/video/rockchip/mpp/
Dmpp_vdpu1.c80 #define VDPU1_REG_STREAM_RLC_BASE 0x030 macro
427 dec_get = mpp_read_relaxed(mpp, VDPU1_REG_STREAM_RLC_BASE); in vdpu_finish()