1 /* 2 * Copyright (c) 2021 Chipsea Technologies (Shenzhen) Corp., Ltd. All rights reserved. 3 * Licensed under the Apache License, Version 2.0 (the "License"); 4 * you may not use this file except in compliance with the License. 5 * You may obtain a copy of the License at 6 * 7 * http://www.apache.org/licenses/LICENSE-2.0 8 * 9 * Unless required by applicable law or agreed to in writing, software 10 * distributed under the License is distributed on an "AS IS" BASIS, 11 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 12 * See the License for the specific language governing permissions and 13 * limitations under the License. 14 */ 15 #ifndef _BT_COMMON_DEFINES_H 16 #define _BT_COMMON_DEFINES_H 17 18 /** 19 * BD Address format (values in bytes) 20 * | 3B | 1B | 2B | 21 * | LAP | UAP | NAP | 22 */ 23 #define BD_ADDR_LEN 6 24 #define BD_ADDR_LAP_POS 0 25 #define BD_ADDR_LAP_LEN 3 26 #define BD_ADDR_UAP_POS BD_ADDR_LAP_LEN 27 #define BD_ADDR_UAP_LEN 1 28 #define BD_ADDR_NAP_POS BD_ADDR_UAP_LEN 29 #define BD_ADDR_NAP_LEN 2 30 31 ///Length of fields in Bluetooth messages, in number of bytes 32 #define EVT_MASK_LEN 8 33 #define DEV_CLASS_LEN 3 34 #define ACO_LEN 12 35 #define SRES_LEN 0x04 36 #define ACCESS_ADDR_LEN 0x04 37 #define LE_PASSKEY_LEN 0x04 38 #define BD_NAME_SIZE 0xF8 // Was 0x20 for BLE HL 39 #define ADV_DATA_LEN 0x1F 40 #define EXT_ADV_DATA_MAX_LEN 229 // HCI:7.7.65.13 41 #define PER_ADV_DATA_MAX_LEN 247 // 248 // HCI:7.7.65.16 42 #define BLE_DATA_LEN 0x1B 43 #define SCAN_RSP_DATA_LEN 0x1F 44 #define CONNECT_REQ_DATA_LEN 0x16 45 #define LE_CHNL_MAP_LEN 0x05 46 #define CHNL_MAP_LEN 0x0A 47 #define KEY_LEN 0x10 48 #define PIN_CODE_MIN_LEN 0x01 49 #define PIN_CODE_MAX_LEN 0x10 50 #define PRIV_KEY_192_LEN 24 51 #define PUB_KEY_192_LEN 48 52 #define PRIV_KEY_256_LEN 32 53 #define PUB_KEY_256_LEN 64 54 #define CFM_LEN 0x10 55 #define ENC_DATA_LEN 0x10 56 #define RAND_VAL_LEN 0x10 57 #define RAND_NB_LEN 0x08 58 #define LE_FEATS_LEN 0x08 59 #define SUPP_CMDS_LEN 0x40 60 #define FEATS_LEN 0x08 61 #define NAME_VECT_SIZE 14 62 #define LMP_FEATS_LEN 0x08 63 #define LE_STATES_LEN 0x08 64 #define WHITE_LIST_LEN 0x0A 65 #define LE_FREQ_LEN 0x28 66 #define LE_DATA_FREQ_LEN 0x25 67 #define CRC_INIT_LEN 0x03 68 #define SESS_KEY_DIV_LEN 0x08 69 #define INIT_VECT_LEN 0x04 70 #define MIC_LEN 0x04 71 #define IV_LEN 0x08 72 #define SK_DIV_LEN 0x10 73 74 // Session Key Diversifier Master or slave 75 #define SKD_M_OFFSET 0x00 76 #define SKD_S_OFFSET 0x08 77 // Initialization Vector Master or slave 78 #define IV_M_OFFSET 0x00 79 #define IV_S_OFFSET 0x04 80 81 // BT 4.2 - Secure Connections 82 #define PUBLIC_KEY_P256_LEN 0x20 83 #define DHKEY_CHECK_LEN 0x10 84 85 #define DH_KEY_LEN 0x20 86 87 // BT 5.0 - Slot Availability Masks 88 89 #define SAM_SUBMAPS_LEN 12 90 #define SAM_TYPE0_SUBMAP_LEN 14 91 92 #define SAM_SLOT_NOT_AVAILABLE 0 93 #define SAM_SLOT_TX_AVAILABLE 1 94 #define SAM_SLOT_RX_AVAILABLE 2 95 #define SAM_SLOT_TX_RX_AVAILABLE 3 96 97 #define SAM_INDEX_MAX 3 98 #define SAM_DISABLED 0xFF 99 100 #define SAM_UPDATE_INVALIDATE_MAPS 0 101 #define SAM_UPDATE_IMMEDIATE 1 102 #define SAM_UPDATE_AT_SUBINTERVAL 2 103 104 #define T_SAM_SM_MIN 2 105 #define T_SAM_SM_MAX 56 106 107 #define SAM_SLOTS_SUBMAPPED 0 108 #define SAM_SLOTS_AVAILABLE 1 109 #define SAM_SLOTS_UNAVAILABLE 2 110 111 112 /// Maximum maskable event code 113 #define EVT_MASK_CODE_MAX EVT_MASK_LEN * 8 114 115 /// Default event mask 116 #define EVT_MASK_DEFAULT {0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x9F, 0x00, 0x20} 117 118 /// Advertising and Data Channel Indices (chapter 6.B.1.4.1) 119 #define DATA_CHANNEL_MIN 0 120 #define DATA_CHANNEL_MAX 36 121 #define DATA_CHANNEL_NB 37 122 #define ADV_CHANNEL_37 37 123 #define ADV_CHANNEL_38 38 124 #define ADV_CHANNEL_39 39 125 126 /// Minimum number of used channel in the map (chapter 6.B.4.5.8.1) 127 #define DATA_CHANNEL_USED_NB_MIN 2 128 129 /// Advertising interval (in 625us slot) (chapter 2.E.7.8.5) 130 #define ADV_INTERVAL_MIN 0x0020 //(20 ms) 131 #define ADV_INTERVAL_MAX 0x4000 //(10.24 sec) 132 #define ADV_INTERVAL_DFT 0x0800 //(1.28 sec) 133 134 /// Scanning interval (in 625us slot) (chapter 2.E.7.8.10) 135 #define SCAN_INTERVAL_MIN 0x0004 //(2.5 ms) 136 #define SCAN_INTERVAL_MAX 0x4000 //(10.24 sec) 137 #define SCAN_INTERVAL_DFT 0x0010 //(10 ms) 138 139 /// Scanning window (in 625us slot) (chapter 2.E.7.8.10) 140 #define SCAN_WINDOW_MIN 0x0004 //(2.5 ms) 141 #define SCAN_WINDOW_MAX 0x4000 //(10.24 sec) 142 #define SCAN_WINDOW_DFT 0x0010 //(10 ms) 143 144 /// Sync Timeout (in Time = N*10ms) 145 #define SYNC_TIMEOUT_MIN 0x000A //(100 ms) 146 #define SYNC_TIMEOUT_MAX 0x4000 //(163.84 s) 147 148 /// Advertising SID valid Range 149 #define SYNC_SID_MIN 0x00 150 #define SYNC_SID_MAX 0x0F 151 152 /// Periodic Adv Skip valid Range 153 #define SYNC_SKIP_MIN 0x0000 154 #define SYNC_SKIP_MAX 0x01F3 155 156 /// Connection interval (N*1.250ms) (chapter 2.E.7.8.12) 157 #define CON_INTERVAL_MIN_AUDIO 0x0002 //(2.5 msec) 158 #define CON_INTERVAL_MIN 0x0006 //(7.5 msec) 159 #define CON_INTERVAL_MAX 0x0C80 //(4 sec) 160 /// Connection latency (N*cnx evt) (chapter 2.E.7.8.12) 161 #define CON_LATENCY_MIN 0x0000 162 #define CON_LATENCY_MAX 0x01F3 // (499) 163 /// Supervision TO (N*10ms) (chapter 2.E.7.8.12) 164 #define CON_SUP_TO_MIN 0x000A //(100 msec) 165 #define CON_SUP_TO_MAX 0x0C80 //(32 sec) 166 167 /// Format of the Advertising packets 168 #define ADV_ADDR_OFFSET 0 169 #define ADV_ADDR_LEN BD_ADDR_LEN 170 #define ADV_DATA_OFFSET (ADV_ADDR_OFFSET + ADV_ADDR_LEN) 171 172 /// BLE supported features 173 //byte 0 174 #define BLE_ENC_FEAT 0x01 175 #define BLE_CON_PARAM_REQ_PROC_FEAT 0x02 176 #define BLE_REJ_IND_EXT_FEAT 0x04 177 #define BLE_SLAVE_INIT_EXCHG_FEAT 0x08 178 #define BLE_PING_FEAT 0x10 179 #define BLE_LENGTH_EXT_FEAT 0x20 180 #define BLE_LL_PRIVACY_FEAT 0x40 181 #define BLE_EXT_SCAN_POLICY_FEAT 0x80 182 183 //byte 1 184 #define BLE_2M_PHY_FEAT 0x01 185 #define BLE_STABLE_MOD_IDX_TX_FEAT 0x02 186 #define BLE_STABLE_MOD_IDX_RX_FEAT 0x04 187 #define BLE_CODED_PHY_FEAT 0x08 188 #define BLE_EXT_ADV_FEAT 0x10 189 #define BLE_PER_ADV_FEAT 0x20 190 #define BLE_CHAN_SEL_ALGO_2_FEAT 0x40 191 #define BLEPWR_CLASS_1_FEAT 0x80 192 193 //byte 2 194 #define BLE_MIN_NUM_USED_CHAN_PROC 0x01 195 196 /// List of supported BLE Features LL:4.6 197 enum ble_feature 198 { 199 //byte 0 200 BLE_FEAT_ENC = (0), 201 BLE_FEAT_CON_PARAM_REQ_PROC = (1), 202 BLE_FEAT_EXT_REJ_IND = (2), 203 BLE_FEAT_SLAVE_INIT_FEAT_EXCHG = (3), 204 BLE_FEAT_PING = (4), 205 BLE_FEAT_DATA_PKT_LEN_EXT = (5), 206 BLE_FEAT_LL_PRIVACY = (6), 207 BLE_FEAT_EXT_SCAN_FILT_POLICY = (7), 208 //byte 1 209 BLE_FEAT_2M_PHY = (8), 210 BLE_FEAT_STABLE_MOD_IDX_TX = (9), 211 BLE_FEAT_STABLE_MOD_IDX_RX = (10), 212 BLE_FEAT_CODED_PHY = (11), 213 BLE_FEAT_EXT_ADV = (12), 214 BLE_FEAT_PER_ADV = (13), 215 BLE_CHAN_SEL_ALGO_2 = (14), 216 BLE_PWR_CLASS_1 = (15), 217 //byte 2 218 MIN_NUM_USED_CHAN_PROC = (16), 219 //byte 3 220 BLE_FEAT_PUB_KEY_VALID = (27), 221 }; 222 223 /// BLE supported states 224 //byte 0 225 #define BLE_NON_CON_ADV_STATE 0x01 226 #define BLE_DISC_ADV_STATE 0x02 227 #define BLE_CON_ADV_STATE 0x04 228 #define BLE_HDC_DIRECT_ADV_STATE 0x08 229 #define BLE_PASS_SCAN_STATE 0x10 230 #define BLE_ACTIV_SCAN_STATE 0x20 231 #define BLE_INIT_MASTER_STATE 0x40 232 #define BLE_CON_SLAVE_STATE 0x80 233 234 //byte 1 235 #define BLE_NON_CON_ADV_PASS_SCAN_STATE 0x01 236 #define BLE_DISC_ADV_PASS_SCAN_STATE 0x02 237 #define BLE_CON_ADV_PASS_SCAN_STATE 0x04 238 #define BLE_HDC_DIRECT_ADV_PASS_SCAN_STATE 0x08 239 #define BLE_NON_CON_ADV_ACTIV_SCAN_STATE 0x10 240 #define BLE_DISC_ADV_ACTIV_SCAN_STATE 0x20 241 #define BLE_CON_ADV_ACTIV_SCAN_STATE 0x40 242 #define BLE_HDC_DIRECT_ADV_ACTIV_SCAN_STATE 0x80 243 244 //byte 2 245 #define BLE_NON_CON_ADV_INIT_STATE 0x01 246 #define BLE_DISC_ADV_INIT_STATE 0x02 247 #define BLE_NON_CON_ADV_MASTER_STATE 0x04 248 #define BLE_DISC_ADV_MASTER_STATE 0x08 249 #define BLE_NON_CON_ADV_SLAVE_STATE 0x10 250 #define BLE_DISC_ADV_SLAVE_STATE 0x20 251 #define BLE_PASS_SCAN_INIT_STATE 0x40 252 #define BLE_ACTIV_SCAN_INIT_STATE 0x80 253 254 //byte 3 255 #define BLE_PASS_SCAN_MASTER_STATE 0x01 256 #define BLE_ACTIV_SCAN_MASTER_STATE 0x02 257 #define BLE_PASS_SCAN_SLAVE_STATE 0x04 258 #define BLE_ACTIV_SCAN_SLAVE_STATE 0x08 259 #define BLE_INIT_MASTER_MASTER_STATE 0x10 260 #define BLE_LDC_DIRECT_ADV_STATE 0x20 261 #define BLE_LDC_DIRECT_ADV_PASS_SCAN_STATE 0x40 262 #define BLE_LDC_DIRECT_ADV_ACTIV_SCAN_STATE 0x80 263 264 //byte 4 265 #define BLE_CON_ADV_INIT_MASTER_SLAVE_STATE 0x01 266 #define BLE_HDC_DIRECT_ADV_INIT_MASTER_SLAVE_STATE 0x02 267 #define BLE_LDC_DIRECT_ADV_INIT_MASTER_SLAVE_STATE 0x04 268 #define BLE_CON_ADV_MASTER_SLAVE_STATE 0x08 269 #define BLE_HDC_DIRECT_ADV_MASTER_SLAVE_STATE 0x10 270 #define BLE_LDC_DIRECT_ADV_MASTER_SLAVE_STATE 0x20 271 #define BLE_CON_ADV_SLAVE_SLAVE_STATE 0x40 272 #define BLE_HDC_DIRECT_ADV_SLAVE_SLAVE_STATE 0x80 273 274 //byte 5 275 #define BLE_LDC_DIRECT_ADV_SLAVE_SLAVE_STATE 0x01 276 #define BLE_INIT_MASTER_SLAVE_STATE 0x02 277 278 /// BLE supported commands 279 //byte0 280 #define BLE_DISC_CMD 0x20 281 //byte2 282 #define BLE_RD_REM_VERS_CMD 0x80 283 //byte5 284 #define BLE_SET_EVT_MSK_CMD 0x40 285 #define BLE_RESET_CMD 0x80 286 //byte10 287 #define BLE_RD_TX_PWR_CMD 0x04 288 #define BLE_SET_CTRL_TO_HL_FCTRL_CMD 0x20 289 #define BLE_HL_BUF_SIZE_CMD 0x40 290 #define BLE_HL_NB_CMP_PKT_CMD 0x80 291 //byte14 292 #define BLE_RD_LOC_VERS_CMD 0x08 293 #define BLE_RD_LOC_SUP_FEAT_CMD 0x20 294 #define BLE_RD_BUF_SIZE_CMD 0x80 295 //byte15 296 #define BLE_RD_BD_ADDR_CMD 0x02 297 #define BLE_RD_RSSI_CMD 0x20 298 //byte22 299 #define BLE_SET_EVT_MSK_PG2_CMD 0x04 300 //byte25 301 #define BLE_LE_SET_EVT_MSK_CMD 0x01 302 #define BLE_LE_RD_BUF_SIZE_CMD 0x02 303 #define BLE_LE_RD_LOC_SUP_FEAT_CMD 0x04 304 #define BLE_LE_SET_RAND_ADDR_CMD 0x10 305 #define BLE_LE_SET_ADV_PARAM_CMD 0x20 306 #define BLE_LE_RD_ADV_TX_PWR_CMD 0x40 307 #define BLE_LE_SET_ADV_DATA_CMD 0x80 308 //byte26 309 #define BLE_LE_SET_SC_RSP_DATA_CMD 0x01 310 #define BLE_LE_SET_ADV_EN_CMD 0x02 311 #define BLE_LE_SET_SC_PARAM_CMD 0x04 312 #define BLE_LE_SET_SC_EN_CMD 0x08 313 #define BLE_LE_CREAT_CNX_CMD 0x10 314 #define BLE_LE_CREAT_CNX_CNL_CMD 0x20 315 #define BLE_LE_RD_WL_SIZE_CMD 0x40 316 #define BLE_LE_CLEAR_WL_CMD 0x80 317 //byte27 318 #define BLE_LE_ADD_DEV_WL_CMD 0x01 319 #define BLE_LE_REM_DEV_WL_CMD 0x02 320 #define BLE_LE_CNX_UPDATE_CMD 0x04 321 #define BLE_LE_SET_HL_CH_CLASS_CMD 0x08 322 #define BLE_LE_RD_CH_MAP_CMD 0x10 323 #define BLE_LE_RD_REM_FEAT_CMD 0x20 324 #define BLE_LE_ENCRYPT_CMD 0x40 325 #define BLE_LE_RAND_CMD 0x80 326 //byte28 327 #define BLE_LE_START_ENC_CMD 0x01 328 #define BLE_LE_LTK_REQ_RPLY_CMD 0x02 329 #define BLE_LE_LTK_REQ_NEG_RPLY_CMD 0x04 330 #define BLE_LE_RD_SUPP_STATES_CMD 0x08 331 #define BLE_LE_RX_TEST_CMD 0x10 332 #define BLE_LE_TX_TEST_CMD 0x20 333 #define BLE_LE_STOP_TEST_CMD 0x40 334 335 //byte32 336 #define BLE_RD_AUTH_PAYL_TO_CMD 0x10 337 #define BLE_WR_AUTH_PAYL_TO_CMD 0x20 338 339 340 //byte33 341 #define BLE_LE_REM_CON_PARA_REQ_RPLY_CMD 0x10 342 #define BLE_LE_REM_CON_PARA_REQ_NEG_RPLY_CMD 0x20 343 #define BLE_LE_SET_DATA_LEN_CMD 0x40 344 #define BLE_LE_RD_SUGGTED_DFT_DATA_LEN_CMD 0x80 345 346 //byte34 347 #define BLE_LE_WR_SUGGTED_DFT_DATA_LEN_CMD 0x01 348 #define BLE_LE_RD_LOC_P256_PUB_KEY_CMD 0x02 349 #define BLE_LE_GEN_DH_KEY_CMD 0x04 350 #define BLE_LE_ADD_DEV_TO_RESOLV_LIST_CMD 0x08 351 #define BLE_LE_REM_DEV_FROM_RESOLV_LIST_CMD 0x10 352 #define BLE_LE_CLEAR_RESOLV_LIST_CMD 0x20 353 #define BLE_LE_RD_RESOLV_LIST_SIZE_CMD 0x40 354 #define BLE_LE_RD_PEER_RESOLV_ADDR_CMD 0x80 355 356 //byte35 357 #define BLE_LE_RD_LOCAL_RESOLV_ADDR_CMD 0x01 358 #define BLE_LE_SET_ADDR_RESOL_CMD 0x02 359 #define BLE_LE_SET_RESOLV_PRIV_ADDR_TO_CMD 0x04 360 #define BLE_LE_RD_MAX_DATA_LEN_CMD 0x08 361 #define BLE_LE_RD_PHY_CMD 0x10 362 #define BLE_LE_SET_DFT_PHY_CMD 0x20 363 #define BLE_LE_SET_PHY_CMD 0x40 364 #define BLE_LE_ENH_RX_TEST_CMD 0x80 365 //byte36 366 #define BLE_LE_ENH_TX_TEST_CMD 0x01 367 #define BLE_LE_SET_ADV_SET_RAND_ADDR_CMD 0x02 368 #define BLE_LE_SET_EXT_ADV_PARAM_CMD 0x04 369 #define BLE_LE_SET_EXT_ADV_DATA_CMD 0x08 370 #define BLE_LE_SET_EXT_SCAN_RSP_DATA_CMD 0x10 371 #define BLE_LE_SET_EXT_ADV_EN_CMD 0x20 372 #define BLE_LE_RD_MAX_ADV_DATA_LEN_CMD 0x40 373 #define BLE_LE_RD_NB_SUPP_ADV_SETS_CMD 0x80 374 //byte37 375 #define BLE_LE_RMV_ADV_SET_CMD 0x01 376 #define BLE_LE_CLEAR_ADV_SETS_CMD 0x02 377 #define BLE_LE_SET_PER_ADV_PARAM_CMD 0x04 378 #define BLE_LE_SET_PER_ADV_DATA_CMD 0x08 379 #define BLE_LE_SET_PER_ADV_EN_CMD 0x10 380 #define BLE_LE_SET_EXT_SCAN_PARAM_CMD 0x20 381 #define BLE_LE_SET_EXT_SCAN_EN_CMD 0x40 382 #define BLE_LE_EXT_CREATE_CON_CMD 0x80 383 //byte38 384 #define BLE_LE_PER_ADV_CREATE_SYNC_CMD 0x01 385 #define BLE_LE_PER_ADV_CREATE_SYNC_CANCEL_CMD 0x02 386 #define BLE_LE_PER_ADV_TERM_SYNC_CMD 0x04 387 #define BLE_LE_ADD_DEV_TO_PER_ADV_LIST_CMD 0x08 388 #define BLE_LE_RMV_DEV_FROM_PER_ADV_LIST_CMD 0x10 389 #define BLE_LE_CLEAR_PER_ADV_LIST_CMD 0x20 390 #define BLE_LE_RD_PER_ADV_LIST_SIZE_CMD 0x40 391 #define BLE_LE_RD_TX_PWR_CMD 0x80 392 //byte39 393 #define BLE_LE_RD_RF_PATH_COMP_CMD 0x01 394 #define BLE_LE_WR_RF_PATH_COMP_CMD 0x02 395 #define BLE_LE_SET_PRIV_MODE_CMD 0x04 396 397 // Inquiry Length HCI:7.1.1 398 #define INQ_LEN_MIN 0x01 399 #define INQ_LEN_MAX 0x30 400 401 // Inquiry Length HCI:7.1.3 402 #define INQ_MIN_PER_LEN_MIN 0x0002 403 #define INQ_MIN_PER_LEN_MAX 0xFFFE 404 #define INQ_MAX_PER_LEN_MIN 0x0003 405 #define INQ_MAX_PER_LEN_MAX 0xFFFF 406 407 // IAC support 408 #define NB_IAC_MIN 0x01 409 #define NB_IAC_MAX 0x40 410 411 /// Most significant bit of the Bluetooth clock (in 312.5us half-slots) 412 #define BT_CLOCK_MSB (1L << 27) 413 414 /// Logical Transport Adresses BB:4.2 415 #define LT_ADDR_BCST 0x00 416 #define LT_ADDR_MIN 0x01 417 #define LT_ADDR_MAX 0x07 418 419 /// Link type HCI:7.7.3 420 #define SCO_TYPE 0 421 #define ACL_TYPE 1 422 #define ESCO_TYPE 2 423 #define UNKNOWN_TYPE 3 // Used in LM 424 #define LE_TYPE 4 425 426 427 /// Allow Role Switch HCI:4.6.8 428 #define MASTER_ROLE 0 429 #define SLAVE_ROLE 1 430 #define UNKNOWN_ROLE 0xFF //Used in LC to init the links role 431 432 /// Link policy HCI:4.6.9 and HCI:4.6.10 433 #define POLICY_SWITCH 0x0001 434 #define POLICY_HOLD 0x0002 435 #define POLICY_SNIFF 0x0004 436 #define POLICY_PARK 0x0008 437 438 /// Allow Role Switch HCI:4.5.5 439 #define ROLE_SWITCH_NOT_ALLOWED 0 440 #define ROLE_SWITCH_ALLOWED 1 441 442 /// AcceptConnection Role HCI:4.5.8 443 #define ACCEPT_SWITCH_TO_MASTER 0 444 #define ACCEPT_REMAIN_SLAVE 1 445 446 /// Packet Type Flags HCI:7.1.14 447 #define PACKET_TYPE_EDR_MSK 0x330E 448 #define PACKET_TYPE_GFSK_MSK 0xCCF8 449 #define PACKET_TYPE_NO_2_DH1_FLAG 0x0002 450 #define PACKET_TYPE_NO_3_DH1_FLAG 0x0004 451 #define PACKET_TYPE_DM1_FLAG 0x0008 452 #define PACKET_TYPE_DH1_FLAG 0x0010 453 #define PACKET_TYPE_HV1_FLAG 0x0020 454 #define PACKET_TYPE_HV2_FLAG 0x0040 455 #define PACKET_TYPE_HV3_FLAG 0x0080 456 #define PACKET_TYPE_NO_2_DH3_FLAG 0x0100 457 #define PACKET_TYPE_NO_3_DH3_FLAG 0x0200 458 #define PACKET_TYPE_DM3_FLAG 0x0400 459 #define PACKET_TYPE_DH3_FLAG 0x0800 460 #define PACKET_TYPE_NO_2_DH5_FLAG 0x1000 461 #define PACKET_TYPE_NO_3_DH5_FLAG 0x2000 462 #define PACKET_TYPE_DM5_FLAG 0x4000 463 #define PACKET_TYPE_DH5_FLAG 0x8000 464 465 /// Synchronous Packet Types HCI:7.1.14 466 #define SYNC_PACKET_TYPE_HV1_FLAG 0x0001 467 #define SYNC_PACKET_TYPE_HV2_FLAG 0x0002 468 #define SYNC_PACKET_TYPE_HV3_FLAG 0x0004 469 #define SYNC_PACKET_TYPE_EV3_FLAG 0x0008 470 #define SYNC_PACKET_TYPE_EV4_FLAG 0x0010 471 #define SYNC_PACKET_TYPE_EV5_FLAG 0x0020 472 473 #define SYNC_PACKET_TYPE_NO_EV3_2_FLAG 0x0040 474 #define SYNC_PACKET_TYPE_NO_EV3_3_FLAG 0x0080 475 #define SYNC_PACKET_TYPE_NO_EV5_2_FLAG 0x0100 476 #define SYNC_PACKET_TYPE_NO_EV5_3_FLAG 0x0200 477 478 #define SYNC_PACKET_TYPE_EV3_2_FLAG 0x0040 479 #define SYNC_PACKET_TYPE_EV3_3_FLAG 0x0080 480 #define SYNC_PACKET_TYPE_EV5_2_FLAG 0x0100 481 #define SYNC_PACKET_TYPE_EV5_3_FLAG 0x0200 482 483 /// RWBT 1.2 484 #define SYNC_EV3_PACKET_SIZE 30 485 #define SYNC_EV4_PACKET_SIZE 120 486 #define SYNC_EV5_PACKET_SIZE 180 487 488 /// Packet Boundary Flag HCI:5.4.2 489 #define PBF_1ST_NF_HL_FRAG 0x00 // Non-flushable packets 490 #define PBF_CONT_HL_FRAG 0x01 491 #define PBF_1ST_HL_FRAG 0x02 492 #define PBF_CMP_PDU 0x03 493 //#define PBF_MASK 0x03 494 495 /// Broadcast Flag HCI:5.4.2 496 #define BCF_P2P 0x00 497 #define BCF_ACTIVE_SLV_BCST 0x01 498 #define BCF_PARK_SLV_BCST 0x02 499 #define BCF_MASK 0x03 500 501 /// Synchronous Packet Status Flag HCI:5.4.3 502 #define CORRECTLY_RX_FLAG 0x00 503 #define POSSIBLY_INVALID_FLAG 0x01 504 #define NO_RX_DATA_FLAG 0x02 505 #define PARTIALLY_LOST_FLAG 0x03 506 507 /// Park mode defines LMP:3.17 508 #define MACCESS_MSK 0x0F 509 #define ACCSCHEM_MSK 0xF0 510 511 /// Support 3 feature pages 512 #define FEATURE_PAGE_MAX 3 513 514 #define FEATURE_PAGE_0 0 515 #define FEATURE_PAGE_1 1 516 #define FEATURE_PAGE_2 2 517 518 /// Feature mask definition LMP:3.3 519 #define B0_3_SLOT_POS 0 520 #define B0_3_SLOT_MSK 0x01 521 #define B0_5_SLOT_POS 1 522 #define B0_5_SLOT_MSK 0x02 523 #define B0_ENC_POS 2 524 #define B0_ENC_MSK 0x04 525 #define B0_SLOT_OFF_POS 3 526 #define B0_SLOT_OFF_MSK 0x08 527 #define B0_TIMING_ACCU_POS 4 528 #define B0_TIMING_ACCU_MSK 0x10 529 #define B0_ROLE_SWITCH_POS 5 530 #define B0_ROLE_SWITCH_MSK 0x20 531 #define B0_HOLD_MODE_POS 6 532 #define B0_HOLD_MODE_MSK 0x40 533 #define B0_SNIFF_MODE_POS 7 534 #define B0_SNIFF_MODE_MSK 0x80 535 536 #define B1_PARK_POS 0 537 #define B1_PARK_MSK 0x01 538 #define B1_RSSI_POS 1 539 #define B1_RSSI_MSK 0x02 540 #define B1_CQDDR_POS 2 541 #define B1_CQDDR_MSK 0x04 542 #define B1_SCO_POS 3 543 #define B1_SCO_MSK 0x08 544 #define B1_HV2_POS 4 545 #define B1_HV2_MSK 0x10 546 #define B1_HV3_POS 5 547 #define B1_HV3_MSK 0x20 548 #define B1_MULAW_POS 6 549 #define B1_MULAW_MSK 0x40 550 #define B1_ALAW_POS 7 551 #define B1_ALAW_MSK 0x80 552 553 #define B2_CVSD_POS 0 554 #define B2_CVSD_MSK 0x01 555 #define B2_PAGING_PAR_NEGO_POS 1 556 #define B2_PAGING_PAR_NEGO_MSK 0x02 557 #define B2_PWR_CTRL_POS 2 558 #define B2_PWR_CTRL_MSK 0x04 559 #define B2_TRANSPARENT_SCO_POS 3 560 #define B2_TRANSPARENT_SCO_MSK 0x08 561 #define B2_FLOW_CTRL_LAG_POS 4 562 #define B2_FLOW_CTRL_LAG_MSK 0x70 563 #define B2_BCAST_ENC_POS 7 564 #define B2_BCAST_ENC_MSK 0x80 565 566 #define B3_EDR_2MBPS_ACL_POS 1 567 #define B3_EDR_2MBPS_ACL_MSK 0x02 568 #define B3_EDR_3MBPS_ACL_POS 2 569 #define B3_EDR_3MBPS_ACL_MSK 0x04 570 #define B3_ENH_INQSCAN_POS 3 571 #define B3_ENH_INQSCAN_MSK 0x08 572 #define B3_INT_INQSCAN_POS 4 573 #define B3_INT_INQSCAN_MSK 0x10 574 #define B3_INT_PAGESCAN_POS 5 575 #define B3_INT_PAGESCAN_MSK 0x20 576 #define B3_RSSI_INQ_RES_POS 6 577 #define B3_RSSI_INQ_RES_MSK 0x40 578 #define B3_ESCO_EV3_POS 7 579 #define B3_ESCO_EV3_MSK 0x80 580 581 #define B4_EV4_PKT_POS 0 582 #define B4_EV4_PKT_MSK 0x01 583 #define B4_EV5_PKT_POS 1 584 #define B4_EV5_PKT_MSK 0x02 585 #define B4_AFH_CAP_SLV_POS 3 586 #define B4_AFH_CAP_SLV_MSK 0x08 587 #define B4_AFH_CLASS_SLV_POS 4 588 #define B4_AFH_CLASS_SLV_MSK 0x10 589 #define B4_BR_EDR_NOT_SUPP_POS 5 590 #define B4_BR_EDR_NOT_SUPP_MSK 0x20 591 #define B4_LE_SUPP_POS 6 592 #define B4_LE_SUPP_MSK 0x40 593 #define B4_3_SLOT_EDR_ACL_POS 7 594 #define B4_3_SLOT_EDR_ACL_MSK 0x80 595 596 #define B5_5_SLOT_EDR_ACL_POS 0 597 #define B5_5_SLOT_EDR_ACL_MSK 0x01 598 #define B5_SSR_POS 1 599 #define B5_SSR_MSK 0x02 600 #define B5_PAUSE_ENC_POS 2 601 #define B5_PAUSE_ENC_MSK 0x04 602 #define B5_AFH_CAP_MST_POS 3 603 #define B5_AFH_CAP_MST_MSK 0x08 604 #define B5_AFH_CLASS_MST_POS 4 605 #define B5_AFH_CLASS_MST_MSK 0x10 606 #define B5_EDR_ESCO_2MBPS_POS 5 607 #define B5_EDR_ESCO_2MBPS_MSK 0x20 608 #define B5_EDR_ESCO_3MBPS_POS 6 609 #define B5_EDR_ESCO_3MBPS_MSK 0x40 610 #define B5_3_SLOT_EDR_ESCO_POS 7 611 #define B5_3_SLOT_EDR_ESCO_MSK 0x80 612 613 #define B6_EIR_POS 0 614 #define B6_EIR_MSK 0x01 615 #define B6_SIM_LE_BREDR_DEV_CAP_POS 1 616 #define B6_SIM_LE_BREDR_DEV_CAP_MSK 0x02 617 #define B6_SSP_POS 3 618 #define B6_SSP_MSK 0x08 619 #define B6_ENCAPS_PDU_POS 4 620 #define B6_ENCAPS_PDU_MSK 0x10 621 #define B6_ERR_DATA_REP_POS 5 622 #define B6_ERR_DATA_REP_MSK 0x20 623 #define B6_NONFLUSH_PBF_POS 6 624 #define B6_NONFLUSH_PBF_MSK 0x40 625 626 #define B7_LST_CHANGE_EVT_POS 0 627 #define B7_LST_CHANGE_EVT_MSK 0x01 628 #define B7_INQRES_TXPOW_POS 1 629 #define B7_INQRES_TXPOW_MSK 0x02 630 #define B7_ENH_PWR_CTRL_POS 2 631 #define B7_ENH_PWR_CTRL_MSK 0x04 632 #define B7_EXT_FEATS_POS 7 633 #define B7_EXT_FEATS_MSK 0x80 634 635 /// Extended feature mask definition page 1 LMP:3.3 636 #define B0_HOST_SSP_POS 0 637 #define B0_HOST_SSP_MSK 0x01 638 #define B0_HOST_LE_POS 1 639 #define B0_HOST_LE_MSK 0x02 640 #define B0_HOST_LE_BR_EDR_POS 2 641 #define B0_HOST_LE_BR_EDR_MSK 0x04 642 #define B0_HOST_SECURE_CON_POS 3 643 #define B0_HOST_SECURE_CON_MSK 0x08 644 645 /// Extended feature mask definition page 2 LMP:3.3 646 #define B0_CSB_MASTER_POS 0 647 #define B0_CSB_MASTER_MSK 0x01 648 #define B0_CSB_SLAVE_POS 1 649 #define B0_CSB_SLAVE_MSK 0x02 650 #define B0_SYNC_TRAIN_POS 2 651 #define B0_SYNC_TRAIN_MSK 0x04 652 #define B0_SYNC_SCAN_POS 3 653 #define B0_SYNC_SCAN_MSK 0x08 654 #define B0_INQ_RES_NOTIF_EVT_POS 4 655 #define B0_INQ_RES_NOTIF_EVT_MSK 0x10 656 #define B0_GEN_INTERL_SCAN_POS 5 657 #define B0_GEN_INTERL_SCAN_MSK 0x20 658 #define B0_COARSE_CLK_ADJ_POS 6 659 #define B0_COARSE_CLK_ADJ_MSK 0x40 660 661 #define B1_SEC_CON_CTRL_POS 0 662 #define B1_SEC_CON_CTRL_MSK 0x01 663 #define B1_PING_POS 1 664 #define B1_PING_MSK 0x02 665 #define B1_SAM_POS 2 666 #define B1_SAM_MSK 0x04 667 #define B1_TRAIN_NUDGING_POS 3 668 #define B1_TRAIN_NUDGING_MSK 0x08 669 670 /// Features definitions 671 #define FEAT_3_SLOT_BIT_POS 0 672 #define FEAT_5_SLOT_BIT_POS 1 673 #define FEAT_ENC_BIT_POS 2 674 #define FEAT_SLOT_OFFSET_BIT_POS 3 675 #define FEAT_TIMING_ACC_BIT_POS 4 676 #define FEAT_SWITCH_BIT_POS 5 677 #define FEAT_HOLD_BIT_POS 6 678 #define FEAT_SNIFF_BIT_POS 7 679 680 #define FEAT_PARK_BIT_POS 8 681 #define FEAT_RSSI_BIT_POS 9 682 #define FEAT_QUALITY_BIT_POS 10 683 #define FEAT_SCO_BIT_POS 11 684 #define FEAT_HV2_BIT_POS 12 685 #define FEAT_HV3_BIT_POS 13 686 #define FEAT_ULAW_BIT_POS 14 687 #define FEAT_ALAW_BIT_POS 15 688 689 #define FEAT_CVSD_BIT_POS 16 690 #define FEAT_PAGING_BIT_POS 17 691 #define FEAT_POWER_BIT_POS 18 692 #define FEAT_TRANSP_SCO_BIT_POS 19 693 #define FEAT_BCAST_ENCRYPT_BIT_POS 23 694 695 #define FEAT_EDR_2MB_BIT_POS 25 696 #define FEAT_EDR_3MB_BIT_POS 26 697 #define FEAT_ENH_INQSCAN_BIT_POS 27 698 #define FEAT_INT_INQSCAN_BIT_POS 28 699 #define FEAT_INT_PAGESCAN_BIT_POS 29 700 #define FEAT_RSSI_INQRES_BIT_POS 30 701 #define FEAT_EV3_BIT_POS 31 702 703 #define FEAT_EV4_BIT_POS 32 704 #define FEAT_EV5_BIT_POS 33 705 #define FEAT_AFH_CAPABLE_S_BIT_POS 35 706 #define FEAT_AFH_CLASS_S_BIT_POS 36 707 #define FEAT_BR_EDR_NO_SUPP_BIT_POS 37 708 #define FEAT_LE_BIT_POS 38 709 #define FEAT_3_SLOT_EDR_BIT_POS 39 710 #define FEAT_5_SLOT_EDR_BIT_POS 40 711 #define FEAT_SNIFF_SUBRAT_BIT_POS 41 712 #define FEAT_PAUSE_ENCRYPT_BIT_POS 42 713 #define FEAT_AFH_CAPABLE_M_BIT_POS 43 714 #define FEAT_AFH_CLASS_M_BIT_POS 44 715 #define FEAT_EDR_ESCO_2MB_BIT_POS 45 716 #define FEAT_EDR_ESCO_3MB_BIT_POS 46 717 #define FEAT_3_SLOT_EDR_ESCO_BIT_POS 47 718 #define FEAT_EIR_BIT_POS 48 719 #define FEAT_LE_BR_EDR_BIT_POS 49 720 #define FEAT_SSP_BIT_POS 51 721 #define FEAT_ENCAP_PDU_BIT_POS 52 722 #define FEAT_ERRO_DATA_REP_BIT_POS 53 723 #define FEAT_NFLUSH_PBF_BIT_POS 54 724 #define FEAT_LSTO_CHG_EVT_BIT_POS 56 725 #define FEAT_INQ_TXPWR_BIT_POS 57 726 #define FEAT_EPC_BIT_POS 58 727 #define FEAT_EXT_FEATS_BIT_POS 63 728 #define FEAT_SSP_HOST_BIT_POS 64 729 #define FEAT_LE_HOST_BIT_POS 65 730 #define FEAT_LE_BR_EDR_HOST_BIT_POS 66 731 #define FEAT_SEC_CON_HOST_BIT_POS 67 732 733 #define FEAT_CSB_MASTER_BIT_POS 128 734 #define FEAT_CSB_SLAVE_BIT_POS 129 735 #define FEAT_SYNC_TRAIN_BIT_POS 130 736 #define FEAT_SYNC_SCAN_BIT_POS 131 737 #define FEAT_INQ_RES_NOTIF_EVT_BIT_POS 132 738 #define FEAT_GEN_INTERL_SCAN_BIT_POS 133 739 #define FEAT_COARSE_CLK_ADJ_BIT_POS 134 740 #define FEAT_SEC_CON_CTRL_BIT_POS 136 741 #define FEAT_PING_BIT_POS 137 742 #define FEAT_SAM_BIT_POS 138 743 #define FEAT_TRAIN_NUDGING_BIT_POS 139 744 745 /// Maximum number of feature bits per page (8 bytes x 8 bits) 746 #define MAX_FEAT_BITS_PER_PAGE 64 747 748 /// Poll interval defines LMP:5.2 749 #define POLL_INTERVAL_MIN 0x0006 750 #define POLL_INTERVAL_DFT 0x0028 751 #define POLL_INTERVAL_MAX 0x1000 752 753 /// Power Adjustment Request LMP:5.2 754 #define PWR_ADJ_REQ_DEC_1_STEP 0x00 755 #define PWR_ADJ_REQ_INC_1_STEP 0x01 756 #define PWR_ADJ_REQ_INC_MAX 0x02 757 758 /// Power Adjustment Response LMP:5.2 759 #define PWR_ADJ_RES_GFSK_POS 0 760 #define PWR_ADJ_RES_GFSK_MASK 0x03 761 #define PWR_ADJ_RES_DQPSK_POS 2 762 #define PWR_ADJ_RES_DQPSK_MASK 0x0C 763 #define PWR_ADJ_RES_8DPSK_POS 4 764 #define PWR_ADJ_RES_8DPSK_MASK 0x30 765 766 #define PWR_ADJ_RES_NOT_SUPP 0x00 767 #define PWR_ADJ_RES_CHG_1_STEP 0x01 768 #define PWR_ADJ_RES_MAX 0x02 769 #define PWR_ADJ_RES_MIN 0x03 770 771 /// Nb of Broadcast retransmissions defines 772 #define NB_BROADCAST_DFT 0x01 773 774 /// Nb of Broadcast CLK_ADJ PDU Baseband:4.1.14.1 775 #define NB_BROADCAST_CLK_ADJ 0x06 776 777 /// Min PCA clk_adj_instant (in slots) LMP:4.1.14.1 778 #define PCA_INSTANT_MIN 12 779 780 /// Piconet Clock Adjustment clk_adj_mode LMP:4.1.14.1 781 #define CLK_ADJ_BEFORE_INSTANT 0 782 #define CLK_ADJ_AFTER_INSTANT 1 783 784 785 /// Different packet types BaseBand:6.7 786 /* Packet and buffer sizes. These sizes do not include payload header (except for FHS 787 * packet where there is no payload header) since payload header is written or read by 788 * the RWBT in a different control structure part (TX/RXPHDR) */ 789 #define FHS_PACKET_SIZE 18 790 #define DM1_PACKET_SIZE 17 791 #define DH1_PACKET_SIZE 27 792 #define DH1_2_PACKET_SIZE 54 793 #define DH1_3_PACKET_SIZE 83 794 #define DV_ACL_PACKET_SIZE 9 795 #define DM3_PACKET_SIZE 121 796 #define DH3_PACKET_SIZE 183 797 #define DH3_2_PACKET_SIZE 367 798 #define DH3_3_PACKET_SIZE 552 799 #define DM5_PACKET_SIZE 224 800 #define DH5_PACKET_SIZE 339 801 #define DH5_2_PACKET_SIZE 679 802 #define DH5_3_PACKET_SIZE 1021 803 #define AUX1_PACKET_SIZE 29 804 805 #define HV1_PACKET_SIZE 10 806 #define HV2_PACKET_SIZE 20 807 #define HV3_PACKET_SIZE 30 808 #define EV3_PACKET_SIZE 30 809 #define EV3_2_PACKET_SIZE 60 810 #define EV3_3_PACKET_SIZE 90 811 #define EV4_PACKET_SIZE 120 812 #define EV5_PACKET_SIZE 180 813 #define EV5_2_PACKET_SIZE 360 814 #define EV5_3_PACKET_SIZE 540 815 816 /// SCO Packet coding LMP:5.2 817 #define SCO_PACKET_HV1 0x00 818 #define SCO_PACKET_HV2 0x01 819 #define SCO_PACKET_HV3 0x02 820 821 /// eSCO Packet coding LMP:5.2 822 #define ESCO_PACKET_NULL 0x00 823 #define ESCO_PACKET_EV3 0x07 824 #define ESCO_PACKET_EV4 0x0C 825 #define ESCO_PACKET_EV5 0x0D 826 #define ESCO_PACKET_EV3_2 0x26 827 #define ESCO_PACKET_EV3_3 0x37 828 #define ESCO_PACKET_EV5_2 0x2C 829 #define ESCO_PACKET_EV5_3 0x3D 830 831 /// Max number of HV packet BaseBand:4.4.2.1 832 #define MAX_NB_HV1 1 833 #define MAX_NB_HV2 2 834 #define MAX_NB_HV3 3 835 836 /// Tsco (ScoInterval) BaseBand:4.4.2.1 837 #define TSCO_HV1 2 838 #define TSCO_HV2 4 839 #define TSCO_HV3 6 840 841 /* Inquiry train repetition length , Baseband :Table 10.4 842 * - 256 repetitions if no SCO 843 * - 512 repetitions if 1 SCO 844 * - 768 repetitions if 2 SCO */ 845 #define INQ_TRAIN_LENGTH_NO_SCO 256 846 #define INQ_TRAIN_LENGTH_1_SCO 512 847 #define INQ_TRAIN_LENGTH_2_SCO 768 848 849 /* Counter for train length, Npage (N*16 slots) depends on the slave page scan mode and 850 * the number of active SCO: 851 * | SR mode | no SCO | one SCO | two SCO | 852 * | R0 | >=1 | >=2 | >=3 | 853 * | R1 | >=128 | >=256 | >=384 | 854 * | R2 | >=256 | >=512 | >=768 | */ 855 #define PAGE_TRAIN_LENGTH_R0 1 856 #define PAGE_TRAIN_LENGTH_R1 128 857 #define PAGE_TRAIN_LENGTH_R2 256 858 859 /// Synchronisation defines 860 #define NORMAL_SYNC_POS (64 + 4) // End of Synchro word at bit 68 (64 + 4) 861 #define SLOT_SIZE 625 // A slot is 625 us 862 #define HALF_SLOT_SIZE 625 // A half slot is 312.5 us (in half us) 863 #define HALF_SLOT_TIME_MIN (0) // Minimum offset within a half-slot is 0 half-us 864 #define HALF_SLOT_TIME_MAX (HALF_SLOT_SIZE - 1) // Maximum offset within a half-slot is 624 half-us 865 866 /// Baseband timeout default value, Baseband timers: 1.1 867 #define PAGE_RESP_TO_DEF 8 868 #define INQ_RESP_TO_DEF 128 869 #define NEW_CONNECTION_TO 32 870 871 /// LMP Response Timeout (in sec) 872 #define LMP_RSP_TO 30 873 /// LLCP Response Timeout (in units of 10 ms) 874 #define LLCP_RSP_TO 4000 // 40 secs 875 876 /// Athenticated Payload Timeout (in units of 10 ms) 877 #define AUTH_PAYL_TO_DFT 0x0BB8 // 30 secs 878 #define AUTH_PAYL_TO_MIN 0x0001 879 880 /// Voice mute pattern defines 881 #define MU_LAW_MUTE 0xFF 882 #define ALAW_CVSD_MUTE 0x55 883 #define TRANSP_MUTE 0x00 884 885 /// Air Mode LMP:5.2 886 #define MU_LAW_MODE 0 887 #define A_LAW_MODE 1 888 #define CVSD_MODE 2 889 #define TRANS_MODE 3 890 891 /// eSCO negotiation State LMP:5.2 892 #define ESCO_NEGO_INIT 0 893 #define ESCO_NEGO_LATEST_POSSIBLE 1 894 #define ESCO_NEGO_SLOT_VIOLATION 2 895 #define ESCO_NEGO_LAT_VIOLATION 3 896 #define ESCO_NEGO_UNSUPPORTED 4 897 898 #define SCO_BANDWIDTH 8000 899 #define SYNC_BANDWIDTH_DONT_CARE 0xFFFFFFFF 900 901 #define SYNC_MIN_LATENCY 0x0004 902 #define SYNC_MAX_LATENCY_ESCO_S1 0x0007 903 #define SYNC_MAX_LATENCY_ESCO_S2 0x0007 904 #define SYNC_MAX_LATENCY_ESCO_S3 0x000A 905 #define SYNC_DONT_CARE_LATENCY 0xFFFF 906 907 #define SYNC_NO_RE_TX 0x00 908 #define SYNC_RE_TX_POWER 0x01 909 #define SYNC_RE_TX_QUALITY 0x02 910 #define SYNC_RE_TX_DONT_CARE 0xFF 911 912 /// Timing Control Flags LMP:5.2 913 #define TIM_CHANGE_FLAG 0x01 914 #define INIT2_FLAG 0x02 915 #define ACCESS_WIN_FLAG 0x04 916 917 /// Sniff request parameters LMP:5.2 918 #define SNIFF_INTERVAL_MIN 0x0006 919 #define SNIFF_INTERVAL_MAX 0x0540 920 #define SNIFF_TIMEOUT_MAX 0x0028 921 922 /// Packet Type Table defines LMP:4.1.11 923 #define PACKET_TABLE_1MBPS 0x00 924 #define PACKET_TABLE_2_3MBPS 0x01 925 926 /// Data Rate defines LMP:5.2 927 #define FEC_RATE_MSK 0x01 928 #define USE_FEC_RATE 0x00 929 #define NO_FEC_RATE 0x01 930 #define PREF_PACK_MSK 0x06 931 #define NO_PREF_PACK_SIZE 0x00 932 #define USE_1_SLOT_PACKET 0x02 933 #define USE_3_SLOT_PACKET 0x04 934 #define USE_5_SLOT_PACKET 0x06 935 #define PREF_EDR_MSK 0x18 936 #define USE_DM1_ONLY 0x00 937 #define USE_2_MBPS_RATE 0x08 938 #define USE_3_MBPS_RATE 0x10 939 #define PREF_PACK_EDR_MSK 0x60 940 #define USE_1_SLOT_EDR_PKT 0x20 941 #define USE_3_SLOT_EDR_PKT 0x40 942 #define USE_5_SLOT_EDR_PKT 0x60 943 944 /// EIR Data Size HCI:6.24 945 #define EIR_DATA_SIZE 240 946 947 /// Voice setting HCI:4.7.29 & 4.7.30 948 #define INPUT_COD_LIN 0x0000 949 #define INPUT_COD_MULAW 0x0100 950 #define INPUT_COD_ALAW 0x0200 951 #define INPUT_COD_MSK 0x0300 952 #define INPUT_COD_OFF 8 953 #define INPUT_DATA_1COMP 0x0000 954 #define INPUT_DATA_2COMP 0x0040 955 #define INPUT_DATA_SMAG 0x0080 956 #define INPUT_DATA_UNSIGNED 0x00C0 957 #define INPUT_DATAFORM_MSK 0x00C0 958 #define INPUT_DATAFORM_OFF 6 959 #define INPUT_SAMP_8BIT 0x0000 960 #define INPUT_SAMP_16BIT 0x0020 961 #define INPUT_SAMPSIZE_MSK 0x0020 962 #define INPUT_SAMPSIZE_OFF 5 963 #define LIN_PCM_BIT_POS_MSK 0x001C 964 #define LIN_PCM_BIT_POS_OFF 2 965 #define AIR_COD_CVSD 0x0000 966 #define AIR_COD_MULAW 0x0001 967 #define AIR_COD_ALAW 0x0002 968 #define AIR_COD_TRANS 0x0003 969 #define AIR_COD_MSK 0x0003 970 #define AIR_COD_OFF 0 971 972 /// ScanEnable HCI:6.1 973 #define BOTH_SCAN_DISABLE 0 974 #define INQUIRY_SCAN_ENABLE 1 975 #define PAGE_SCAN_ENABLE 2 976 #define BOTH_SCAN_ENABLE 3 977 978 /// PageScanInterval HCI:6.8 979 #define PAGE_SCAN_INTV_MIN 0x0012 980 #define PAGE_SCAN_INTV_MAX 0x1000 981 #define PAGE_SCAN_INTV_DFT 0x0800 982 983 /// PageScanWindow HCI:6.9 984 #define PAGE_SCAN_WIN_MIN 0x0011 985 #define PAGE_SCAN_WIN_MAX 0x1000 986 #define PAGE_SCAN_WIN_DFT 0x0012 987 988 /// InquiryScanInterval HCI:6.2 989 #define INQ_SCAN_INTV_MIN 0x0012 990 #define INQ_SCAN_INTV_MAX 0x1000 991 #define INQ_SCAN_INTV_DFT 0x1000 992 993 /// InquiryScanWindow HCI:6.3 994 #define INQ_SCAN_WIN_MIN 0x0011 995 #define INQ_SCAN_WIN_MAX 0x1000 996 #define INQ_SCAN_WIN_DFT 0x0012 997 998 /// General/Unlimited Inquiry Access Code (GIAC) 999 #define GIAC_LAP_0 0x33 1000 #define GIAC_LAP_1 0x8B 1001 #define GIAC_LAP_2 0x9E 1002 1003 /// Limited Dedicated Inquiry Access Code (LIAC) 1004 #define LIAC_LAP_0 0x00 1005 #define LIAC_LAP_1 0x8B 1006 #define LIAC_LAP_2 0x9E 1007 1008 /// Maximum Dedicated Inquiry Access Code (DIAC MAX) 1009 #define DIAC_MAX_LAP_0 0x3F 1010 #define DIAC_MAX_LAP_1 0x8B 1011 #define DIAC_MAX_LAP_2 0x9E 1012 1013 /// PIN Type HCI:6.13 1014 #define VARIABLE_PIN 0 1015 #define FIXED_PIN 1 1016 1017 /// ConnectionAcceptTimeout HCI:6.7 1018 #define CON_ACCEPT_TO_MIN 0x00A0 1019 #define CON_ACCEPT_TO_MAX 0xB540 1020 #define CON_ACCEPT_TO_DFT 0x1FA0 1021 1022 /// PageTimeout HCI:6.6 1023 #define PAGE_TO_MIN 0x0016 1024 #define PAGE_TO_MAX 0xFFFF 1025 #define PAGE_TO_DFT 0x2000 1026 1027 /// Clock offset valid flag in clock offset field HCI:7.1.5/7.1.19 1028 #define CLK_OFFSET_VALID_FLAG_POS 15 1029 #define CLK_OFFSET_VALID_FLAG_MSK 0x8000 1030 1031 /// AuthenticationEnable HCI:4.7.24 1032 #define AUTH_DISABLED 0x00 // Default 1033 #define AUTH_ENABLED 0x01 1034 1035 /// EncryptionMode HCI:4.7.26 1036 #define ENC_DISABLED 0x00 // Default 1037 #define ENC_PP_ENABLED 0x01 1038 #define ENC_PP_BC_ENABLED 0x02 1039 1040 /// AutomaticFlushTimeout HCI:4.7.32 1041 #define AUTO_FLUSH_TIMEOUT_MAX 0x07FF 1042 #define AUTO_FLUSH_TIMEOUT_OFF 0x0000 1043 #define AUTO_FLUSH_TIMEOUT_DFT AUTO_FLUSH_TIMEOUT_OFF // Default (no automatic flush timeout) 1044 1045 /// Link Supervision Time Out (in slots) HCI:6.21 1046 #define LSTO_OFF 0x0000 1047 #define LSTO_MIN 0x0001 1048 #define LSTO_DFT 0x7D00 // Default is 20 s 1049 #define LSTO_MAX 0xFFFF 1050 1051 /// PageScanRepetitionMode HCI:4.5.5 1052 #define R0 0x00 1053 #define R1 0x01 1054 #define R2 0x02 1055 #define PAGESCAN_REP_DEF R1 // Default 1056 1057 /// PageScanPeriodMode HCI:4.7.49 1058 #define P0 0x00 // Default 1059 #define P1 0x01 1060 #define P2 0x02 1061 1062 /// PageScanMode HCI:4.7.51 1063 #define MANDATORY_PAGE_SCAN_MODE 0x00 // Default 1064 1065 #define OPT_PAGE_SCAN_MODE_1 0x01 1066 #define OPT_PAGE_SCAN_MODE_2 0x02 1067 #define OPT_PAGE_SCAN_MODE_3 0x03 1068 1069 /// Encryption Enable HCI:4.5.17 1070 #define ENCRYPTION_OFF 0x00 1071 #define ENCRYPTION_ON 0x01 1072 1073 /// Country Code HCI:4.8.4 1074 #define NORTH_AMERICA_EUROPE 0x00 1075 #define FRANCE 0x01 1076 #define SPAIN 0x02 1077 #define JAPAN 0x03 1078 1079 /// Loopback mode HCI:7.6.2 1080 #define NO_LOOPBACK 0x00 // Default 1081 #define LOCAL_LOOPBACK 0x01 1082 #define REMOTE_LOOPBACK 0x02 1083 1084 /// Erroneous Data Reporting HCI:7.3.65 1085 #define ERR_DATA_REP_DIS 0x00 // Default 1086 #define ERR_DATA_REP_EN 0x01 1087 1088 /// LM modes HCI:5.2.20 1089 #define LM_ACTIVE_MODE 0x00 1090 #define LM_HOLD_MODE 0x01 1091 #define LM_SNIFF_MODE 0x02 1092 #define LM_PARK_MODE 0x03 1093 1094 /// Key Type HCI:5.2.24 1095 #define COMB_KEY 0 1096 //#define LOCAL_UNIT_KEY 1 1097 //#define REMOTE_UNIT_KEY 2 1098 #define DEBUG_COMB_KEY 3 1099 #define UNAUTH_COMB_KEY_192 4 1100 #define AUTH_COMB_KEY_192 5 1101 #define CHANGED_COMB_KEY 6 1102 #define UNAUTH_COMB_KEY_256 7 1103 #define AUTH_COMB_KEY_256 8 1104 1105 /// Key Flag HCI:5.4.18 1106 #define SEMI_PERMANENT_KEY 0x00 1107 #define TEMPORARY_KEY 0x01 1108 1109 /// QOS Service Type HCI:4.6.6 1110 #define QOS_NO_TRAFFIC 0x00 1111 #define QOS_BEST_EFFORT 0x01 1112 #define QOS_GUARANTEED 0x02 1113 #define QOS_NOTSPECIFIED 0xFF 1114 1115 #define QOS_WILD_CARD 0xFFFFFFFF 1116 1117 /// RSSI golden range 1118 #define RSSI_GOLDEN_RG 0x00 1119 1120 /// Inquiry TX power level (in dBm) HCI:7.3.62 1121 #define INQ_TX_PWR_DBM_MIN -70 1122 #define INQ_TX_PWR_DBM_DFT 0 1123 #define INQ_TX_PWR_DBM_MAX +20 1124 1125 /// Bluetooth Test Mode defines Bluetooth Test Mode: Table 3.2 1126 1127 #define PAUSE_MODE 0x00 1128 #define TXTEST0_MODE 0x01 1129 #define TXTEST1_MODE 0x02 1130 #define TXTEST10_MODE 0x03 1131 #define PRAND_MODE 0x04 1132 #define ACLLOOP_MODE 0x05 1133 #define SCOLOOP_MODE 0x06 1134 #define ACLNOWHIT_MODE 0x07 1135 #define SCONOWHIT_MODE 0x08 1136 #define TXTEST1100_MODE 0x09 1137 #define EXITTEST_MODE 0xFF 1138 1139 #define HOPSINGLE 0x00 1140 #define HOPUSA 0x01 1141 1142 #define FIXTXPOW 0x00 1143 #define ADAPTTXPOW 0x01 1144 1145 /// Maximum frequency value for test mode HCI:7.8.28 1146 #define TEST_FREQ_MAX 39 1147 /// Minimum PHY value for test mode HCI:7.8.50 1148 #define TEST_PHY_MIN 0x01 1149 /// Maximum PHY value for the receiver test mode HCI:7.8.50 1150 #define RX_TEST_PHY_MAX 0x03 1151 /// Maximum PHY value for the transmitter test mode HCI:7.8.51 1152 #define TX_TEST_PHY_MAX 0x04 1153 1154 /// Packet type parameter bit field of LMP_test_control 1155 #define LMP_TEST_CTRL_PKT_TYPE_CODE_POS 0 1156 #define LMP_TEST_CTRL_PKT_TYPE_CODE_MSK 0x0F 1157 #define LMP_TEST_CTRL_PKT_TYPE_LINK_POS 4 1158 #define LMP_TEST_CTRL_PKT_TYPE_LINK_MSK 0xF0 1159 #define TEST_ACLSCO 0 1160 #define TEST_ESCO 1 1161 #define TEST_EDRACL 2 1162 #define TEST_EDRESCO 3 1163 1164 /// LMP_encapsulated_header parameters LMP:5.3 1165 #define LMP_ENCAPS_P192_MAJ_TYPE 1 1166 #define LMP_ENCAPS_P192_MIN_TYPE 1 1167 #define LMP_ENCAPS_P192_PAYL_LEN 48 1168 #define LMP_ENCAPS_P192_PAYL_NB 3 1169 #define LMP_ENCAPS_P256_MAJ_TYPE 1 1170 #define LMP_ENCAPS_P256_MIN_TYPE 2 1171 #define LMP_ENCAPS_P256_PAYL_LEN 64 1172 #define LMP_ENCAPS_P256_PAYL_NB 4 1173 1174 /// Number of bits in the passkey code used during Secure Simple Pairing 1175 #define SSP_PASSKEY_NB_BITS 20 1176 1177 // Event Filter HCI 4.7.3 1178 1179 /// Filter type 1180 #define CLEAR_ALL_FILTER_TYPE 0x00 1181 #define INQUIRY_FILTER_TYPE 0x01 1182 #define CONNECTION_FILTER_TYPE 0x02 1183 1184 /// Filter size 1185 #define CLEAR_ALL_FILTER_SIZE 0 1186 1187 /// Inquiry & Connection Setup Filter Condition Type 1188 #define ALL_FILTER_CONDITION_TYPE 0x00 1189 #define CLASS_FILTER_CONDITION_TYPE 0x01 1190 #define BD_ADDR_FILTER_CONDITION_TYPE 0x02 1191 1192 /// Auto Accept Flag 1193 #define DO_NOT_AUTO_ACCEPT_CONNECTION 0x01 1194 #define ACCEPT_CONNECTION_SLAVE 0x02 1195 #define ACCEPT_CONNECTION_MASTER 0x03 1196 1197 /// Event Mask HCI 4.7.1 1198 #define NO_EVENTS_SPECIFIED_FILTER 0x00000000 1199 #define INQUIRY_COMPLETE_EVENT_FILTER 0x00000001 1200 #define INQUIRY_RESULT_EVENT_FILTER 0x00000002 1201 #define CONNECTION_COMPLETE_EVENT_FILTER 0x00000004 1202 #define CONNECTION_REQUEST_EVENT_FILTER 0x00000008 1203 #define DISCONNECTION_COMPLETE_EVENT_FILTER 0x00000010 1204 #define AUTHENTICATION_COMPLETE_EVENT_FILTER 0x00000020 1205 #define REMOTE_NAME_REQUEST_COMPLETE_EVENT_FILTER 0x00000040 1206 #define ENCRYPTION_CHANGE_EVENT_FILTER 0x00000080 1207 #define CHANGE_CONNECTION_LINK_KEY_COMPLETE_EVENT_FILTER 0x00000100 1208 #define MASTER_LINK_KEY_COMPLETE_EVENT_FILTER 0x00000200 1209 #define READ_REMOTE_SUPPORTED_FEATURES_COMPLETE_EVENT_FILTER 0x00000400 1210 #define READ_REMOTE_VERSION_INFORMATION_COMPLETE_EVENT_FILTER 0x00000800 1211 #define QOS_SETUP_COMPLETE_EVENT_FILTER 0x00001000 1212 #define COMMAND_COMPLETE_EVENT_FILTER 0x00002000 // Unchecked */ 1213 #define COMMAND_STATUS_EVENT_FILTER 0x00004000 // Unchecked */ 1214 #define HARDWARE_ERROR_EVENT_FILTER 0x00008000 1215 #define FLUSH_OCCURRED_EVENT_FILTER 0x00010000 1216 #define ROLE_CHANGE_EVENT_FILTER 0x00020000 1217 #define NUMBER_OF_COMPLETED_PACKETS_EVENT_FILTER 0x00040000 // Unchecked */ 1218 #define MODE_CHANGE_EVENT_FILTER 0x00080000 1219 #define RETURN_LINK_KEYS_EVENT_FILTER 0x00100000 1220 #define PIN_CODE_REQUEST_EVENT_FILTER 0x00200000 1221 #define LINK_KEY_REQUEST_EVENT_FILTER 0x00400000 1222 #define LINK_KEY_NOTIFICATION_EVENT_FILTER 0x00800000 1223 #define LOOPBACK_COMMAND_EVENT_FILTER 0x01000000 // Not implemented */ 1224 #define DATA_BUFFER_OVERFLOW_EVENT_FILTER 0x02000000 1225 #define MAX_SLOTS_CHANGE_EVENT_FILTER 0x04000000 1226 #define READ_CLOCK_OFFSET_COMPLETE_EVENT_FILTER 0x08000000 1227 #define CONNECTION_PACKET_TYPE_CHANGED_EVENT_FILTER 0x10000000 1228 #define QOS_VIOLATION_EVENT_FILTER 0x20000000 1229 #define PAGE_SCAN_MODE_CHANGE_EVENT_FILTER 0x40000000 // Deprecated */ 1230 #define PAGE_SCAN_REPETITION_MODE_CHANGE_EVENT_FILTER 0x80000000 1231 1232 #define FLOW_SPECIFICATION_COMPLETE_EVENT_FILTER 0x00000001 1233 #define INQUIRY_RESULT_WITH_RSSI_EVENT_FILTER 0x00000002 1234 #define READ_REMOTE_EXTENDED_FEATURES_COMPLETE_EVENT_FILTER 0x00000004 1235 #define SYNCHRONOUS_CONNECTION_COMPLETE_EVENT_FILTER 0x00000800 1236 #define SYNCHRONOUS_CONNECTION_CHANGE_EVENT_FILTER 0x00001000 1237 #define SNIFF_SUBRATING_EVENT_FILTER 0x00002000 1238 #define EXTENDED_INQUIRY_RESULT_EVENT_FILTER 0x00004000 1239 #define ENCRYPTION_KEY_REFRESH_COMPLETE_EVENT_FILTER 0x00008000 1240 #define IO_CAPABILITY_REQUEST_EVENT_FILTER 0x00010000 1241 #define IO_CAPABILITY_REQUEST_REPLY_EVENT_FILTER 0x00020000 1242 #define USER_CONFIRMATION_REQUEST_EVENT_FILTER 0x00040000 1243 #define USER_PASSKEY_REQUEST_EVENT_FILTER 0x00080000 1244 #define REMOTE_OOB_DATA_REQUEST_EVENT_FILTER 0x00100000 1245 #define SIMPLE_PAIRING_COMPLETE_EVENT_FILTER 0x00200000 1246 #define LINK_SUPERVISION_TIMEOUT_CHANGE_EVENT_FILTER 0x00800000 1247 #define ENHANCED_FLUSH_COMPLETE_EVENT_FILTER 0x01000000 1248 #define USER_PASSKEY_NOTIFICATION_EVENT_FILTER 0x04000000 1249 #define KEYPRESS_NOTIFICATION_EVENT_FILTER 0x08000000 1250 #define REM_HOST_SUPPORTED_FEATURES_NOTIFICATION_EVENT_FILTER 0x10000000 1251 1252 /// HostControllerToHostFlowControl (ACL) HCI 7.3.40 1253 #define FLOW_CONTROL_OFF 0x00 1254 #define FLOW_CONTROL_ACL 0x01 1255 #define FLOW_CONTROL_SCO 0x02 1256 #define FLOW_CONTROL_ACL_SCO 0x03 1257 1258 /// SynchroinousFlowControlEnable (SCO) HCI 7.3.39 1259 #define SYNC_FLOW_CONTROL_OFF 0x00 1260 #define SYNC_FLOW_CONTROL_ON 0x01 1261 1262 /// Tx Power HCI:4.7.37 1263 #define CURRENT_TX_POWER 0x00 1264 #define MAX_TX_POWER 0x01 1265 1266 /// Flow_direction HCI:7.2.13 1267 #define FLOW_DIR_OUT 0x00 1268 #define FLOW_DIR_IN 0x01 1269 1270 /// Drift and Jitter default value LMP 5.2 1271 #define DRIFT_BLE_DFT 500 1272 #define DRIFT_BT_DFT 250 1273 #define JITTER_DFT 10 1274 #define DRIFT_BT_ACTIVE_MAX 20 // BB:2.2.5 1275 1276 /// MAX LP Clock Jitter allowed by the specification (in us) (Core 4.2 - vol 6, -B - 4.2.2) 1277 #define BLE_MAX_JITTER (16) 1278 1279 /// Read Stored Link Key HCI:4.7.8 1280 #define LINK_KEY_BD_ADDR 0x00 1281 #define LINK_KEY_ALL 0x01 1282 1283 /// Read/Write Hold Mode Activity HCI:4.7.35 and 4.7.36 1284 #define HOLD_MODE_ACTIV_DEFAULT 0x00 1285 #define HOLD_MODE_ACTIV_SUSP_PAGE_SCAN 0x01 1286 #define HOLD_MODE_ACTIV_SUSP_INQUIRY_SCAN 0x02 1287 #define HOLD_MODE_ACTIV_SUSP_PERIODIC_INQ 0x04 1288 #define HOLD_MODE_ACTIV_NOT_MASK 0xF8 1289 1290 /// AFH Mode 1291 #define AFH_DISABLED 0x00 1292 #define AFH_ENABLED 0x01 1293 1294 /// AFH Reporting Mode 1295 #define AFH_REPORTING_DISABLED 0x00 1296 #define AFH_REPORTING_ENABLED 0x01 1297 1298 /// AFH channel assessment Mode 1299 #define AFH_CH_ASS_DISABLED 0x00 1300 #define AFH_CH_ASS_ENABLED 0x01 1301 1302 /// AFH MIn/Max interval, in BT slots (1s - 30s) 1303 #define AFH_REPORT_INTERVAL_MIN 0x0640 1304 #define AFH_REPORT_INTERVAL_MAX 0xBB80 1305 1306 /// Channel classification values for frequency pairs 1307 #define AFH_CH_CLASS_UNKNOWN 0x0 1308 #define AFH_CH_CLASS_GOOD 0x1 1309 #define AFH_CH_CLASS_RESERVED 0x2 1310 #define AFH_CH_CLASS_BAD 0x3 1311 1312 /// Maximum number of frequencies used in adapted channel hopping sequence 1313 #define AFH_NB_CHANNEL_MIN 20 1314 #define AFH_NB_CHANNEL_MAX 79 1315 1316 /// Number of frequencies available in standard hopping sequence 1317 #define HOP_NB_CHANNEL 79 1318 1319 /// Base frequency in MHz of first BT hop channel [f=2402+k MHz, k=0,...,78] 1320 #define HOP_CHANNEL_BASE_MHZ 2402 1321 1322 /// Maximum number of frequencies used in synchronization train BB:2.6.4.8 1323 #define SYNC_TRAIN_CHANNEL_NB 3 1324 /// Indices of frequencies used in synchronization train 1325 #define SYNC_TRAIN_CHANNEL_0 0 1326 #define SYNC_TRAIN_CHANNEL_1 24 1327 #define SYNC_TRAIN_CHANNEL_2 78 1328 1329 /// Maximum delay in synchronization train (in slots) BB:2.7.2 1330 #define SYNC_TRAIN_DELAY_MAX_DFT 16 1331 /// Maximum delay in synchronization train for Coarse clock adjustment (in slots) BB:2.7.2 1332 #define SYNC_TRAIN_DELAY_MAX_CLK_ADJ 4 1333 /// Synchronization train interval for Coarse clock adjustment (in slots) BB:2.7.2 1334 #define SYNC_TRAIN_INTV_CLK_ADJ 32 1335 1336 /// Future CSB instant value offset for Coarse clock adjustment (in slots) BB: 8.11.2 1337 #define SYNC_TRAIN_CSB_INSTANT_OFFSET_CLK_ADJ 1600 1338 1339 /// Minimum value for synchronization train interval (in slots) HCI:7.3.90 1340 #define SYNC_TRAIN_INTV_MIN 0x20 1341 /// Minimum value for synchronization train timeout (in slots) HCI:7.3.90 1342 #define SYNC_TRAIN_TO_MIN 0x00000002 1343 /// Maximum value for synchronization train timeout (in slots) HCI:7.3.90 1344 #define SYNC_TRAIN_TO_MAX 0x07FFFFFE 1345 1346 /// Default value for synchronization train interval (in slots) HCI:6.36 1347 #define SYNC_TRAIN_INTV_DEFAULT 0x80 1348 /// Default value for synchronization train timeout (in slots) HCI:6.37 1349 #define SYNC_TRAIN_TO_DEFAULT 0x0002EE00 1350 /// Default value for synchronization scan timeout for CCA recovery mode (in slots) BB: Appendix B.1.8 1351 #define SYNC_TRAIN_TO_CCA_RM_DEFAULT 0x8000 1352 /// Default value for synchronization train service data HCI:6.39 1353 #define SYNC_TRAIN_SVC_DATA_DEFAULT 0x00 1354 1355 /// Minimum value for synchronization scan timeout (in slots) HCI:7.1.52 1356 #define SYNC_SCAN_TO_MIN 0x22 1357 /// Minimum value for synchronization scan window (in slots) HCI:7.1.52 1358 #define SYNC_SCAN_WIN_MIN 0x22 1359 /// Minimum value for synchronization scan interval (in slots) HCI:7.1.52 1360 #define SYNC_SCAN_INTV_MIN 0x02 1361 1362 /// Default value for synchronization scan timeout (in slots) BB: Apppendix B 1363 #define SYNC_SCAN_TO_DEFAULT 0x2000 1364 /// Default value for synchronization scan timeout for CCA recovery mode (in slots) BB: Appendix B.1.9 1365 #define SYNC_SCAN_TO_CCA_RM_DEFAULT 0x8000 1366 /// Recommended value for synchronization scan window (91.25ms) GAP: Appendix A 1367 #define SYNC_SCAN_WIN_DEFAULT 0x0092 1368 /// Recommended value for synchronization scan interval (320 ms) GAP: Appendix A 1369 #define SYNC_SCAN_INTV_DEFAULT 0x0200 1370 1371 1372 /// CSB receive enable HCI:7.1.50 1373 #define CSB_RX_MODE_DIS 0x00 1374 #define CSB_RX_MODE_EN 0x01 1375 1376 /// CSB fragment HCI:7.2.88 1377 #define CSB_CONTINUATION_FRAGMENT 0 1378 #define CSB_STARTING_FRAGMENT 1 1379 #define CSB_ENDING_FRAGMENT 2 1380 #define CSB_NO_FRAGMENTATION 3 1381 1382 /// CSB max fragment size HCI:7.2.88 1383 #define CSB_FRAGMENT_SIZE_MAX 0xFF 1384 1385 /// MWS Channel_Enable 1386 #define MWS_CHANNEL_DISABLED 0x00 1387 #define MWS_CHANNEL_ENABLED 0x01 1388 1389 /// MWS Channel_Type 1390 #define MWS_TDD_CHANNEL_TYPE 0x00 1391 #define MWS_FDD_CHANNEL_TYPE 0x01 1392 1393 /// MWS Transport_Layer 1394 #define MWS_SIGNALING_ONLY 0x00 1395 #define MWS_WCI_1 0x01 1396 #define MWS_WCI_2 0x02 1397 #define MWS_TRANSPORT_TYPE_MAX 0x02 1398 1399 /// MWS PATTERN Index 1400 #define MWS_PATTERN_INDEX_MAX 2 1401 1402 /// MWS PATTERN IntervalType 1403 #define MWS_PATTERN_NO_TXRX 0 1404 #define MWS_PATTERN_TX_ALLOWED 1 1405 #define MWS_PATTERN_RX_ALLOWED 2 1406 #define MWS_PATTERN_TXRX_ALLOWED 3 1407 #define MWS_PATTERN_EXT_FRAME 4 1408 #define MWS_PATTERN_TYPE_MAX 4 1409 1410 1411 /// MWS Ext_Num_Periods 1412 #define MWS_EXT_NUM_PERIODS_MIN 0x01 1413 #define MWS_EXT_NUM_PERIODS_MAX 0x32 1414 1415 /// MWS Period_Type 1416 #define MWS_PERIOD_TYPE_DOWNLINK 0x00 1417 #define MWS_PERIOD_TYPE_UPLINK 0x01 1418 #define MWS_PERIOD_TYPE_BIDIRECTIONAL 0x02 1419 #define MWS_PERIOD_TYPE_GUARD_PERIOD 0x03 1420 #define MWS_PERIOD_TYPE_RESERVED 0x04 1421 1422 /// MWS inactivity duration 7B(WCI-1):3.1.4. 1423 #define MWS_INACT_DUR_INFINITE 0x1F 1424 1425 1426 /// Simple pairing mode HCI:7.3.58/HCI:7.3.59 1427 #define SP_MODE_DIS 0x00 1428 #define SP_MODE_EN 0x01 1429 1430 /// Inquiry Scan Type and Page Scan Type HCI:6.4/HCI:6.11 1431 #define STANDARD_SCAN 0x00 1432 #define INTERLACED_SCAN 0x01 1433 1434 /// Default interlace offset used for frequency selection during interlaced inquiry/page scan BB:8.3.1/8.4.1 1435 #define INTERLACE_OFFSET_DFT 16 1436 1437 /// Inquiry Mode 1438 #define STANDARD_INQUIRY 0x00 1439 #define RSSI_INQUIRY 0x01 1440 #define EXTENDED_INQUIRY 0x02 1441 1442 /// Maximum number of link keys Host can write via HCI Write Stored Link Key Command 1443 #define NB_LINK_KEY 0x0B 1444 1445 /// LMP Version 1446 #define BT_LMP_V1_0 0 1447 #define BT_LMP_V1_1 1 1448 #define BT_LMP_V1_2 2 1449 #define BT_LMP_V2_0 3 1450 #define BT_LMP_V2_1 4 1451 #define BT_LMP_V3_0 5 1452 #define BT_LMP_V4_0 6 1453 #define BT_LMP_V4_1 7 1454 1455 /// WhichClock parameter 1456 #define LOCAL_CLOCK 0 1457 #define PICONET_CLOCK 1 1458 1459 /// Clock Accuracy parameter 1460 #define CLOCK_ACCURACY_UNKNOWN 0xFFFF 1461 1462 #define SP_PASSKEY_STARTED 0x00 1463 #define SP_PASSKEY_DIGIT_ENTERED 0x01 1464 #define SP_PASSKEY_DIGIT_ERASED 0x02 1465 #define SP_PASSKEY_CLEARED 0x03 1466 #define SP_PASSKEY_COMPLETED 0x04 1467 1468 /// Low Power Mode 1469 #define PARK_BEACON_MIN 0x000E 1470 1471 /// RWBT Device can be slave of 2 master at max 1472 #define MAX_SLAVES_FOR_DIFFERENT_MASTERS 2 1473 // Flags for ld_util_get_nb_acl function 1474 /// Flag for master link 1475 #define MASTER_FLAG 0x01 1476 /// Flag for slave link 1477 #define SLAVE_FLAG 0x02 1478 1479 1480 /// BLE packet info in bytes 1481 #define BLE_PKT_HDR_LEN (2) 1482 #define BLE_PKT_CRC_LEN (3) 1483 #define BLE_PKT_ACCESS_LEN (4) 1484 1485 /// IFS duration in us 1486 #define BLE_IFS_DUR (150) 1487 1488 /// MAFS duration in us 1489 #define BLE_MAFS_DUR (300) 1490 1491 /// BLE event mask 1492 enum le_evt_mask 1493 { 1494 LE_EVT_MASK_CON_CMP_EVT_BIT = 0, //!< LE_EVT_MASK_CON_CMP_EVT_BIT 1495 LE_EVT_MASK_CON_CMP_EVT_MSK = 0x00000001,//!< LE_EVT_MASK_CON_CMP_EVT_MSK 1496 LE_EVT_MASK_ADV_REP_EVT_BIT = 1, //!< LE_EVT_MASK_ADV_REP_EVT_BIT 1497 LE_EVT_MASK_ADV_REP_EVT_MSK = 0x00000002,//!< LE_EVT_MASK_ADV_REP_EVT_MSK 1498 LE_EVT_MASK_CON_UPD_EVT_BIT = 2, //!< LE_EVT_MASK_CON_UPD_EVT_BIT 1499 LE_EVT_MASK_CON_UPD_EVT_MSK = 0x00000004,//!< LE_EVT_MASK_CON_UPD_EVT_MSK 1500 LE_EVT_MASK_CON_RD_REM_FEAT_EVT_BIT = 3, //!< LE_EVT_MASK_CON_RD_REM_FEAT_EVT_BIT 1501 LE_EVT_MASK_CON_RD_REM_FEAT_EVT_MSK = 0x00000008,//!< LE_EVT_MASK_CON_RD_REM_FEAT_EVT_MSK 1502 LE_EVT_MASK_LG_TR_KEY_REQ_EVT_BIT = 4, //!< LE_EVT_MASK_LG_TR_KEY_REQ_EVT_BIT 1503 LE_EVT_MASK_LG_TR_KEY_REQ_EVT_MSK = 0x00000010,//!< LE_EVT_MASK_LG_TR_KEY_REQ_EVT_MSK 1504 LE_EVT_MASK_REM_CON_PARA_REQ_EVT_BIT = 5, //!< LE_EVT_MASK_REM_CON_PARA_REQ_EVT_BIT 1505 LE_EVT_MASK_REM_CON_PARA_REQ_EVT_MSK = 0x00000020,//!< LE_EVT_MASK_REM_CON_PARA_REQ_EVT_MSK 1506 LE_EVT_MASK_DATA_LEN_CHG_EVT_BIT = 6, //!< LE_EVT_MASK_DATA_LEN_CHG_EVT_BIT 1507 LE_EVT_MASK_DATA_LEN_CHG_EVT_MSK = 0x00000040,//!< LE_EVT_MASK_DATA_LEN_CHG_EVT_MSK 1508 LE_EVT_MASK_RD_LOC_P256_PUB_KEY_CMP_EVT_BIT = 7, //!< LE_EVT_MASK_RD_LOC_P256_PUB_KEY_CMP_EVT_BIT 1509 LE_EVT_MASK_RD_LOC_P256_PUB_KEY_CMP_EVT_MSK = 0x00000080,//!< LE_EVT_MASK_RD_LOC_P256_PUB_KEY_CMP_EVT_MSK 1510 LE_EVT_MASK_GEN_DHKEY_CMP_EVT_BIT = 8, //!< LE_EVT_MASK_GEN_DHKEY_CMP_EVT_BIT 1511 LE_EVT_MASK_GEN_DHKEY_CMP_EVT_MSK = 0x00000100,//!< LE_EVT_MASK_GEN_DHKEY_CMP_EVT_MSK 1512 LE_EVT_MASK_ENH_CON_CMP_EVT_BIT = 9, //!< LE_EVT_MASK_ENH_CON_CMP_EVT_BIT 1513 LE_EVT_MASK_ENH_CON_CMP_EVT_MSK = 0x00000200,//!< LE_EVT_MASK_ENH_CON_CMP_EVT_MSK 1514 LE_EVT_MASK_DIR_ADV_REP_EVT_BIT = 10, //!< LE_EVT_MASK_DIR_ADV_REP_EVT_BIT 1515 LE_EVT_MASK_DIR_ADV_REP_EVT_MSK = 0x00000400,//!< LE_EVT_MASK_DIR_ADV_REP_EVT_MSK 1516 LE_EVT_MASK_PHY_UPD_CMP_EVT_BIT = 11, //!< LE_EVT_MASK_PHY_UPD_CMP_EVT_BIT 1517 LE_EVT_MASK_PHY_UPD_CMP_EVT_MSK = 0x00000800,//!< LE_EVT_MASK_PHY_UPD_CMP_EVT_MSK 1518 LE_EVT_MASK_EXT_ADV_REPORT_EVT_BIT = 12, //!< LE_EVT_MASK_EXT_ADV_REPORT_EVT_BIT 1519 LE_EVT_MASK_EXT_ADV_REPORT_EVT_MSK = 0x00001000,//!< LE_EVT_MASK_EXT_ADV_REPORT_EVT_MSK 1520 LE_EVT_MASK_PER_ADV_SYNC_EST_EVT_BIT = 13, //!< LE_EVT_MASK_PER_ADV_SYNC_EST_EVT_BIT 1521 LE_EVT_MASK_PER_ADV_SYNC_EST_EVT_MSK = 0x00002000,//!< LE_EVT_MASK_PER_ADV_SYNC_EST_EVT_MSK 1522 LE_EVT_MASK_PER_ADV_REPORT_EVT_BIT = 14, //!< LE_EVT_MASK_PER_ADV_REPORT_EVT_BIT 1523 LE_EVT_MASK_PER_ADV_REPORT_EVT_MSK = 0x00004000,//!< LE_EVT_MASK_PER_ADV_REPORT_EVT_MSK 1524 LE_EVT_MASK_PER_ADV_SYNC_LOST_EVT_BIT = 15, //!< LE_EVT_MASK_PER_ADV_SYNC_LOST_EVT_BIT 1525 LE_EVT_MASK_PER_ADV_SYNC_LOST_EVT_MSK = 0x00008000,//!< LE_EVT_MASK_PER_ADV_SYNC_LOST_EVT_MSK 1526 LE_EVT_MASK_EXT_SCAN_TIMEOUT_EVT_BIT = 16, //!< LE_EVT_MASK_EXT_SCAN_TIMEOUT_EVT_MSK 1527 LE_EVT_MASK_EXT_SCAN_TIMEOUT_EVT_MSK = 0x00010000,//!<LE_EVT_MASK_EXT_SCAN_TIMEOUT_EVT_MSK 1528 LE_EVT_MASK_EXT_ADV_SET_TERMINATED_EVT_BIT = 17, //!<LE_EVT_MASK_EXT_ADV_SET_TERMINATED_EVT_MSK 1529 LE_EVT_MASK_EVT_ADV_SET_TERMINATED_EVT_MSK = 0x00020000,//!<LE_EVT_MASK_EVT_ADV_SET_TERMINATED_EVT_MSK 1530 LE_EVT_MASK_SCAN_REQ_RECEIVED_EVT_BIT = 18, //!<LE_EVT_MASK_SCAN_REQ_RECEIVED_EVT_BIT 1531 LE_EVT_MASK_SCAN_REQ_RECEIVED_EVT_MSK = 0x00040000,//!<LE_EVT_MASK_SCAN_REQ_RECEIVED_EVT_MSK 1532 LE_EVT_MASK_CH_SEL_ALGO_EVT_BIT = 19, //!<LE_EVT_MASK_CH_SEL_ALGO_EVT_BIT 1533 LE_EVT_MASK_CH_SEL_ALGO_EVT_MSK = 0x00080000,//!<LE_EVT_MASK_CH_SEL_ALGO_EVT_MSK 1534 1535 LE_EVT_MASK_DFT = 0x0000001F,//!< LE_EVT_MASK_DFT 1536 }; 1537 1538 /// Enhanced Synchronous Connection HCI:7.1.41 & 7.1.42 1539 #define CODING_FORMAT_ULAW 0x00 1540 #define CODING_FORMAT_ALAW 0x01 1541 #define CODING_FORMAT_CVSD 0x02 1542 #define CODING_FORMAT_TRANSP 0x03 1543 #define CODING_FORMAT_LINPCM 0x04 1544 #define CODING_FORMAT_MSBC 0x05 1545 #define CODING_FORMAT_VENDSPEC 0xFF 1546 1547 #define PCM_FORMAT_NA 0x00 1548 #define PCM_FORMAT_1SCOMP 0x01 1549 #define PCM_FORMAT_2SCOMP 0x02 1550 #define PCM_FORMAT_SIGNMAG 0x03 1551 #define PCM_FORMAT_UNSIGNED 0x04 1552 1553 #define PCM_SAMPLE_SIZE_8BITS 8 1554 #define PCM_SAMPLE_SIZE_16BITS 16 1555 1556 #define AUDIO_DATA_PATH_HCI 0 1557 #define AUDIO_DATA_PATH_PCM 1 1558 1559 /// Default maximum number of slots per packet 1560 #define MAX_SLOT_DFT 1 1561 1562 /// Packet type code interpretation possibilities BB:6.5 1563 #define ID_NUL_TYPE 0x0 1564 #define POLL_TYPE 0x1 1565 #define FHS_TYPE 0x2 1566 #define DM1_TYPE 0x3 1567 #define DH1_TYPE 0x4 1568 #define DH1_2_TYPE 0x4 1569 #define DH1_3_TYPE 0x8 1570 #define HV1_TYPE 0x5 1571 #define HV2_TYPE 0x6 1572 #define EV3_2_TYPE 0x6 1573 #define HV3_TYPE 0x7 1574 #define EV3_TYPE 0x7 1575 #define EV3_3_TYPE 0x7 1576 #define DV_TYPE 0x8 1577 #define AUX1_TYPE 0x9 1578 #define DM3_TYPE 0xA 1579 #define DH3_TYPE 0xB 1580 #define DH3_2_TYPE 0xA 1581 #define DH3_3_TYPE 0xB 1582 #define EV4_TYPE 0xC 1583 #define EV5_2_TYPE 0xC 1584 #define EV5_TYPE 0xD 1585 #define EV5_3_TYPE 0xD 1586 #define DM5_TYPE 0xE 1587 #define DH5_TYPE 0xF 1588 #define DH5_2_TYPE 0xE 1589 #define DH5_3_TYPE 0xF 1590 1591 /// Format of the FHS payload BB:6.5.1.4 1592 #define FHS_PAR_BITS_POS 0 1593 #define FHS_PAR_BITS_LEN 34 1594 #define FHS_PAR_BITS_END (FHS_PAR_BITS_POS + FHS_PAR_BITS_LEN) 1595 #define FHS_LAP_POS FHS_PAR_BITS_END 1596 #define FHS_LAP_LEN 24 1597 #define FHS_LAP_END (FHS_LAP_POS + FHS_LAP_LEN) 1598 #define FHS_EIR_POS FHS_LAP_END 1599 #define FHS_EIR_LEN 1 1600 #define FHS_EIR_END (FHS_EIR_POS + FHS_EIR_LEN) 1601 #define FHS_UNDEF_POS FHS_EIR_END 1602 #define FHS_UNDEF_LEN 1 1603 #define FHS_UNDEF_END (FHS_UNDEF_POS + FHS_UNDEF_LEN) 1604 #define FHS_SR_POS FHS_UNDEF_END 1605 #define FHS_SR_LEN 2 1606 #define FHS_SR_END (FHS_SR_POS + FHS_SR_LEN) 1607 #define FHS_RSVD_POS FHS_SR_END 1608 #define FHS_RSVD_LEN 2 1609 #define FHS_RSVD_END (FHS_RSVD_POS + FHS_RSVD_LEN) 1610 #define FHS_UAP_POS FHS_RSVD_END 1611 #define FHS_UAP_LEN 8 1612 #define FHS_UAP_END (FHS_UAP_POS + FHS_UAP_LEN) 1613 #define FHS_NAP_POS FHS_UAP_END 1614 #define FHS_NAP_LEN 16 1615 #define FHS_NAP_END (FHS_NAP_POS + FHS_NAP_LEN) 1616 #define FHS_CLASS_OF_DEV_POS FHS_NAP_END 1617 #define FHS_CLASS_OF_DEV_LEN 24 1618 #define FHS_CLASS_OF_DEV_END (FHS_CLASS_OF_DEV_POS + FHS_CLASS_OF_DEV_LEN) 1619 #define FHS_LT_ADDR_POS FHS_CLASS_OF_DEV_END 1620 #define FHS_LT_ADDR_LEN 3 1621 #define FHS_LT_ADDR_END (FHS_LT_ADDR_POS + FHS_LT_ADDR_LEN) 1622 #define FHS_CLK_POS FHS_LT_ADDR_END 1623 #define FHS_CLK_LEN 26 1624 #define FHS_CLK_END (FHS_CLK_POS + FHS_CLK_LEN) 1625 #define FHS_PAGE_SCAN_MODE_POS FHS_CLK_END 1626 #define FHS_PAGE_SCAN_MODE_LEN 3 1627 #define FHS_PAGE_SCAN_MODE_END (FHS_PAGE_SCAN_MODE_POS + FHS_PAGE_SCAN_MODE_LEN) 1628 1629 /// Format of the STP payload BB:8.11.2 1630 #define STP_CLK_POS 0 1631 #define STP_CLK_LEN 4 1632 #define STP_FUT_CSB_INST_POS 4 1633 #define STP_FUT_CSB_INST_LEN 4 1634 #define STP_AFH_CH_MAP_POS 8 1635 #define STP_AFH_CH_MAP_LEN 10 1636 #define STP_MST_BD_ADDR_POS 18 1637 #define STP_MST_BD_ADDR_LEN 6 1638 #define STP_CSB_INTV_POS 24 1639 #define STP_CSB_INTV_LEN 2 1640 #define STP_CSB_LT_ADDR_POS 26 1641 #define STP_CSB_LT_ADDR_LEN 1 1642 #define STP_SVC_DATA_POS 27 1643 #define STP_SVC_DATA_LEN 1 1644 #define STP_PACKET_SIZE 28 1645 1646 /// CSB Receive status HCI:7.7.69 1647 #define CSB_RX_OK 0x00 1648 #define CSB_RX_KO 0x01 1649 1650 1651 /// HCI 7.8.18 LE Connection Update Command 1652 /// Connection interval min (N*1.250ms) 1653 #define LE_CNX_INTERVAL_MIN 6 //(0x06) 1654 /// Connection interval Max (N*1.250ms) 1655 #define LE_CNX_INTERVAL_MAX 3200 //(0xC80) 1656 /// Connection latency min (N*cnx evt) 1657 #define LE_CNX_LATENCY_MIN 0 //(0x00) 1658 /// Connection latency Max (N*cnx evt 1659 #define LE_CNX_LATENCY_MAX 500 //(0x1F4) 1660 /// Supervision TO min (N*10ms) 1661 #define LE_CNX_SUP_TO_MIN 10 //(0x0A) 1662 /// Supervision TO Max (N*10ms) 1663 #define LE_CNX_SUP_TO_MAX 3200 //(0xC80) 1664 /// Connection event length min (N*0.625ms) 1665 #define LE_CNX_CE_LGTH_MIN 0 //(0x00) 1666 /// Connection event length Max (N*0.625ms) 1667 #define LE_CNX_CE_LGTH_MAX 65535 //(0xFFFF)' 1668 1669 1670 /// HCI 7.8.33 LE Set Data Length Command 1671 /// Preferred minimum number of payload octets 1672 #define LE_MIN_OCTETS (27) 1673 /// Preferred minimum number of microseconds 1674 #define LE_MIN_TIME (328) 1675 /// Preferred minimum number of microseconds LL:4.5.10 1676 #define LE_MIN_TIME_CODED (2704) 1677 /// Preferred maximum number of payload octets 1678 #define LE_MAX_OCTETS (251) 1679 /// Preferred maximum number of microseconds 1680 #define LE_MAX_TIME (2120) 1681 /// Preferred maximum number of microseconds LL:4.5.10 1682 #define LE_MAX_TIME_CODED (17040) 1683 1684 /// LE LL 2.1.2 Access Address 1685 #define LE_ADV_CH_ACC_ADDR_H 0x8E89 1686 #define LE_ADV_CH_ACC_ADDR_L 0xBED6 1687 1688 /// Resolvable private address timeout (in seconds) HCI:7.8.45 1689 #define RPA_TO_MAX 0xA1B8 // approximately 11.5 hours 1690 #define RPA_TO_DFT 0x0384 // 900 seconds or 15 minutes 1691 #define RPA_TO_MIN 0x0001 // 1 second 1692 1693 /// Scan/Init PHYs (bit fields, as defined in HCI:7.8.64, HCI:7.8.66). 1694 #define LE_1M_PHY_BIT_POS 0 1695 #define LE_1M_PHY_BIT_MSK 0x01 1696 #define LE_CODED_PHY_BIT_POS 2 1697 #define LE_CODED_PHY_BIT_MSK 0x04 1698 1699 /// Max scanning PHYs which can be set HCI:7.8.64 1700 #define MAX_SCAN_PHYS 2 1701 1702 /// Max initiating PHYs which can be set HCI:7.8.66 1703 #define MAX_INIT_PHYS 3 1704 1705 /// Ext Scanning interval (in 625us slot) (chapter 2.E.7.8.64) 1706 #define EXT_SCAN_INTERVAL_MIN 0x0004 //(2.5 ms) 1707 #define EXT_SCAN_INTERVAL_MAX 0xFFFF //(40.96 sec) 1708 1709 /// Ext Scanning window (in 625us slot) (chapter 2.E.7.8.64) 1710 #define EXT_SCAN_WINDOW_MIN 0x0004 //(2.5 ms) 1711 #define EXT_SCAN_WINDOW_MAX 0xFFFF //(40.96 sec) 1712 1713 /// Advertiser PHY definitions for Ext Adv report Evts HCI:7.7.65.13 1714 #define HCI_ADV_PHY_1M 1 1715 #define HCI_ADV_PHY_2M 2 1716 #define HCI_ADV_PHY_CODED 3 1717 1718 /// Duration of 1MBPS PDU of specified payload length in microseconds (chapter 6.B.2.1) 1719 #define PDU_1MBPS_LEN_US(n_bytes) ((8 + (2 + n_bytes))*8) // (1 + 4 + (2 + payload_len) + 3)*8 1720 1721 /// Duration of 2MBPS PDU of specified payload length in microseconds (chapter 6.B.2.1) 1722 #define PDU_2MBPS_LEN_US(n_bytes) ((9 + (2 + n_bytes))*4) // (2 + 4 + (2 + payload_len) + 3)*4 1723 1724 /// Duration of 500KBPS PDU of specified payload length in microseconds (chapter 6.B.2.2) 1725 #define PDU_500KBPS_LEN_US(n_bytes) (430 + (2 + n_bytes)*16) // 80 + 256 + 16 + 24 + (2 + payload_len)*8*2 + 24*2 + 3*2 1726 1727 /// Duration of 125KBPS PDU of specified payload length in microseconds (chapter 6.B.2.2) 1728 #define PDU_125KBPS_LEN_US(n_bytes) (592 + (2 + n_bytes)*64) // 80 + 256 + 16 + 24 + (2 + payload_len)*8*8 + 24*8 + 3*8 1729 1730 /// Maximum length of BLE advertising channel PDU payloads ((chapter 6.B.2.3)) 1731 #define PDU_ADV_PAYLOAD_LEN_MAX 255 1732 1733 // The total amount of Host Advertising Data before fragmentation shall not exceed 1650 octets (chapter 6.B.2.3.4.9). 1734 #define HOST_ADV_DATA_LEN_MAX 1650 1735 1736 /// SyncInfo Sync Packet Offset unspecified (chapter 6.B.2.3) 1737 #define PER_SYNC_OFFSET_UNSPECIFIED 0 1738 1739 /// SyncInfo Sync Interval min in 1.25ms units (chapter 6.B.2.3) 1740 #define PER_SYNC_INTERVAL_MIN 6 // (7.5ms) 1741 1742 /// Ext Adv Report - ADV SID - Define for no ADI filed in the PDU HCI:7.7.65.13 1743 #define REP_ADV_NO_ADI 0xFF 1744 1745 /// Ext Adv Report - Tx Power & RSSI dBm - Define for information not available HCI:7.7.65.13 1746 #define REP_ADV_DBM_UNKNOWN 127 1747 1748 /// Periodic Advertising Report - Unused parameter - mandatory value HCI:7.7.65.15 1749 #define PER_ADV_REPORT_TRAIL_BYTE 0xFF 1750 1751 /// Maximum advertising handle HCI:7.8.53 1752 #define ADV_HDL_MAX 0xEF 1753 1754 /// Maximum advertising Set ID HCI:7.8.53 1755 #define ADV_SID_MAX 0x0F 1756 1757 /// Advertising_Tx_Power, Host has no preference HCI:7.8.53 1758 #define ADV_TX_PWR_NO_PREF 127 1759 1760 /// Address type of devices sending anonymous advertisements, HCI 7.8.16 1761 #define ANONYMOUS_ADV_ADDR_TYPE 0xFF 1762 1763 /// Invalid param_req offset, 2.4.2.16 LL_CONNECTION_PARAM_REQ 1764 #define PARAM_REQ_INVALID_OFFSET 0xFFFF 1765 /* 1766 * *********************************************************** 1767 * ISOCHRONOUS CHANNEL DEFINES 1768 * *********************************************************** 1769 */ 1770 1771 /// Maximum Payload Size value 1772 #define BLE_ISO_MAX_PAYLOAD_SIZE (0xFB) 1773 /// Minimum Number of Subevents value 1774 #define BLE_ISO_MIN_NSE (0x01) 1775 /// Maximum Number of Subevents value 1776 #define BLE_ISO_MAX_NSE (0x1F) 1777 /// Mask for PHY type value received from host 1778 #define BLE_ISO_PHY_MASK (0x07) 1779 1780 /// Maximum SDU Size 1781 #define BLE_ISO_MAX_SDU_SIZE (0xFFF) 1782 /// Minimum SDU Interval (in microseconds) 1783 #define BLE_ISO_MIN_SDU_INTERVAL (0x000FF) 1784 /// Maximum SDU Interval (in microseconds) 1785 #define BLE_ISO_MAX_SDU_INTERVAL (0xFFFFF) 1786 1787 /// Minimum Transport Latency (in milliseconds) 1788 #define BLE_ISO_MIN_TRANS_LATENCY (0x0005) 1789 /// Maximum Transport Latency (in milliseconds) 1790 #define BLE_ISO_MAX_TRANS_LATENCY (0x0FA0) 1791 1792 /// Minimum ISO Interval value 1793 #define BLE_ISO_MIN_INTERVAL (0x0004) 1794 /// Maximum ISO Interval value 1795 #define BLE_ISO_MAX_INTERVAL (0x0C80) 1796 1797 /// Maximum CIG ID value 1798 #define BLE_CIG_MAX_ID (0xEF) 1799 /// Maximum Channel ID value 1800 #define BLE_CIS_MAX_ID (0xEF) 1801 /// Minimum Flush Timeout value 1802 #define BLE_CIS_MIN_FT (0x01) 1803 /// Maximum Flush Timeout value 1804 #define BLE_CIS_MAX_FT (0x1F) 1805 /// Maximum Burst Number value 1806 #define BLE_CIS_MAX_BN (0x1F) 1807 /// Minimum CIS offset value - 300us 1808 #define BLE_CIS_MIN_OFFSET (300) 1809 /// Minimum Subevent interval value - 400us 1810 #define BLE_CIS_MIN_SUBEVENT_INTV (400) 1811 /// Maximum number of retransmission 1812 #define BLE_CIS_MAX_RTN (0x0F) 1813 1814 /// Maximum BIG Handle value 1815 #define BLE_BIG_MAX_HANDLE (0xEF) 1816 /// Minimum BIS Number value 1817 #define BLE_BIS_MIN_NB (0x01) 1818 /// Maximum BIS Number value 1819 #define BLE_BIS_MAX_NB (0x1F) 1820 /// Minimum Burst Number value for BIS 1821 #define BLE_BIS_MIN_BN (0x01) 1822 /// Maximum Burst Number value for BIS 1823 #define BLE_BIS_MAX_BN (0x07) 1824 /// Minimum Number of Immediate Retransmission Count value 1825 #define BLE_BIS_MIN_IRC (0x01) 1826 /// Maximum Number of Immediate Retransmission Count value 1827 #define BLE_BIS_MAX_IRC (0x0F) 1828 /// Maximum Number of Pre-Transmission Offset value 1829 #define BLE_BIS_MAX_PTO (0x0F) 1830 1831 1832 /// Size of payload count 1833 #define BLE_PLD_CNT_SIZE (5) 1834 /// Invalid connection link id 1835 #define BLE_INVALID_LINK_ID (0xFF) 1836 /// Invalid channel handle 1837 #define BLE_INVALID_CHANHDL (0xFF) 1838 /// Invalid Group handle 1839 #define BLE_INVALID_GROUP_HDL (0xFF) 1840 /// Invalid Isochronous handle 1841 #define BLE_INVALID_ISOHDL (0xFFFF) 1842 1843 /// Isochronous Channel Direction selection 1844 enum iso_rx_tx_select 1845 { 1846 /// Isochronous tx buffer selection: Host to Controller 1847 ISO_SEL_TX, 1848 /// Isochronous rx buffer selection: Controller to Host 1849 ISO_SEL_RX, 1850 1851 ISO_SEL_MAX, 1852 }; 1853 1854 /// Isochronous Group packing preference 1855 enum iso_packing 1856 { 1857 /// Sequential stream packing 1858 ISO_PACKING_SEQUENTIAL = 0, 1859 /// Interleaved stream packing 1860 ISO_PACKING_INTERLEAVED, 1861 1862 ISO_PACKING_MAX, 1863 }; 1864 1865 /// Isochronous SDU Framing mode 1866 enum iso_frame 1867 { 1868 /// Un-Framed mode 1869 ISO_UN_FRAMED_MODE = 0, 1870 /// Framed mode 1871 ISO_FRAMED_MODE, 1872 1873 ISO_FRAME_MODE_MAX, 1874 }; 1875 1876 1877 /* 1878 * ENUMERATIONS 1879 **************************************************************************************** 1880 */ 1881 1882 /// Specify if Host has no preference into all_phys parameter HCI:7.8.48 / HCI:7.8.49 1883 enum le_phys_preference 1884 { 1885 /// The Host has no preference among the transmitter PHYs supported by the Controller 1886 ALL_PHYS_TX_NO_PREF = (1 << 0), 1887 /// The Host has no preference among the receiver PHYs supported by the Controller 1888 ALL_PHYS_RX_NO_PREF = (1 << 1), 1889 }; 1890 1891 /// Specify what PHY the Controller has changed for TX/RX. HCI:7.7.65.12 1892 /*@TRACE*/ 1893 enum le_phy_value 1894 { 1895 PHY_UNDEF_VALUE = 0, 1896 PHY_1MBPS_VALUE = 1, 1897 PHY_2MBPS_VALUE = 2, 1898 PHY_CODED_VALUE = 3, 1899 }; 1900 1901 /// Specify what PHY Host prefers to use for RX or TX HCI:7.8.48 / HCI:7.8.49 1902 enum le_phy_mask 1903 { 1904 /// The Host prefers to use the LE 1M transmitter/receiver PHY (possibly among others) 1905 PHY_1MBPS_BIT = (1<<0), 1906 PHY_1MBPS_POS = (0), 1907 /// The Host prefers to use the LE 2M transmitter/receiver PHY (possibly among others) 1908 PHY_2MBPS_BIT = (1<<1), 1909 PHY_2MBPS_POS = (1), 1910 /// The Host prefers to use the LE Coded transmitter/receiver PHY (possibly among others) 1911 PHY_CODED_BIT = (1<<2), 1912 PHY_CODED_POS = (2), 1913 /// The Host prefers to use the LE Coded transmitter/receiver PHY (possibly among others) 1914 PHY_ALL = (PHY_1MBPS_BIT | PHY_2MBPS_BIT | PHY_CODED_BIT), 1915 }; 1916 1917 /// Specify what rate Host prefers to use in transmission on coded PHY. HCI:7.8.49 1918 enum le_phy_opt 1919 { 1920 /// The Host has no preferred coding when transmitting on the LE Coded PHY 1921 PHY_OPT_NO_LE_CODED_TX_PREF, 1922 /// The Host prefers that S=2 coding be used when transmitting on the LE Coded PHY 1923 PHY_OPT_S2_LE_CODED_TX_PREF, 1924 /// The Host prefers that S=8 coding be used when transmitting on the LE Coded PHY 1925 PHY_OPT_S8_LE_CODED_TX_PREF, 1926 }; 1927 1928 1929 enum le_phy_mode 1930 { 1931 PHYS_MOD_STANDARD , 1932 PHYS_MOD_STABLE , 1933 PHYS_MOD_MAX, 1934 }; 1935 1936 ///Transmit Power level types 1937 enum 1938 { 1939 ///Current Power Level 1940 TX_PW_LVL_CURRENT = 0x00, 1941 ///Maximum power level 1942 TX_PW_LVL_MAX, 1943 }; 1944 1945 ///Controller to Host flow control 1946 enum 1947 { 1948 /// C-> H flow control off 1949 FLOW_CTRL_OFF = 0x00, 1950 ///C->H ACL flow control on only 1951 FLOW_CTRL_ON_ACL_OFF_SYNC, 1952 ///C->H Sync flow control on only 1953 FLOW_CTRL_OFF_ACL_ON_SYNC, 1954 ///C->H ACL and Sync flow control on 1955 FLOW_CTRL_ON_ACL_ON_SYNC, 1956 }; 1957 1958 ///LE Supported Host enable 1959 enum 1960 { 1961 ///Disable LE supported Host 1962 LE_SUPP_HOST_DIS = 0x00, 1963 ///Enable LE Supported Host 1964 LE_SUPP_HOST_EN, 1965 }; 1966 1967 ///Simultaneous LE Host enable 1968 enum 1969 { 1970 ///Disable LE simultaneous Host disable 1971 SIMULT_LE_HOST_DIS = 0x00, 1972 ///Enable LE simultaneous Host disable 1973 SIMULT_LE_HOST_EN, 1974 }; 1975 1976 ///Advertising HCI Type 1977 enum 1978 { 1979 ///Connectable Undirected advertising 1980 ADV_CONN_UNDIR = 0x00, 1981 ///Connectable high duty cycle directed advertising 1982 ADV_CONN_DIR, 1983 ///Discoverable undirected advertising 1984 ADV_DISC_UNDIR, 1985 ///Non-connectable undirected advertising 1986 ADV_NONCONN_UNDIR, 1987 ///Connectable low duty cycle directed advertising 1988 ADV_CONN_DIR_LDC, 1989 }; 1990 1991 ///Advertising event properties values for legacy PDUs 1992 enum 1993 { 1994 ///Connectable and scannable undirected 1995 ADV_IND = 0x13, 1996 ///Connectable directed (low duty cycle) 1997 ADV_DIRECT_LO_IND = 0x15, 1998 ///Connectable directed (high duty cycle) 1999 ADV_DIRECT_HI_IND = 0x1D, 2000 ///Connectable directed (received) 2001 ADV_DIRECT_IND = 0x15, 2002 ///Scannable undirected 2003 ADV_SCAN_IND = 0x12, 2004 ///Non-connectable and non-scannable undirected 2005 ADV_NONCONN_IND = 0x10, 2006 ///Scan response to an ADV_IND 2007 SCAN_RSP_TO_ADV_IND = 0x1B, 2008 ///Scan response to an ADV_SCAN_IND 2009 SCAN_RSP_TO_ADV_SCAN_IND = 0x1A, 2010 }; 2011 2012 ///Advertising event properties masks 2013 enum 2014 { 2015 ///Connectable advertising 2016 ADV_CON = 0x01, 2017 ///Scannable advertising 2018 ADV_SCAN = 0x02, 2019 ///Directed advertising 2020 ADV_DIRECT = 0x04, 2021 ///High duty cycle directed connectable advertising 2022 ADV_DIRECT_HI = 0x08, 2023 ///Use legacy advertising PDUs 2024 ADV_LEGACY = 0x10, 2025 ///Omit advertiser's address from all PDUs ("anonymous advertising") 2026 ADV_ANONYMOUS = 0x20, 2027 ///Include TxPower in the extended header of the advertising PDU 2028 ADV_TX_PWR = 0x40, 2029 }; 2030 2031 ///Scanning HCI Type 2032 enum 2033 { 2034 ///Scan request 2035 SCAN_REQ, 2036 ///Scan response 2037 SCAN_RSP, 2038 }; 2039 2040 ///BD address type 2041 enum 2042 { 2043 ///Public BD address 2044 ADDR_PUBLIC = 0x00, 2045 ///Random BD Address 2046 ADDR_RAND, 2047 /// Controller generates Resolvable Private Address based on the 2048 /// local IRK from resolving list. If resolving list contains no matching 2049 /// entry, use public address. 2050 ADDR_RPA_OR_PUBLIC, 2051 /// Controller generates Resolvable Private Address based on the 2052 /// local IRK from resolving list. If resolving list contains no matching 2053 /// entry, use random address. 2054 ADDR_RPA_OR_RAND, 2055 /// mask used to determine Address type in the air 2056 ADDR_MASK = 0x01, 2057 /// mask used to determine if an address is an RPA 2058 ADDR_RPA_MASK = 0x02, 2059 /// Random device address (controller unable to resolve) 2060 ADDR_RAND_UNRESOLVED = 0xFE, 2061 /// No address provided (anonymous advertisement) 2062 ADDR_NONE = 0xFF, 2063 }; 2064 2065 ///Privacy mode type 2066 enum 2067 { 2068 ///Network privacy mode 2069 PRIV_TYPE_NETWORK = 0x00, 2070 ///Device privacy mode 2071 PRIV_TYPE_DEVICE = 0x01, 2072 }; 2073 2074 /// Random Address type (2 MSB of the LE BD Address) 2075 enum rnd_addr_type 2076 { 2077 /// Static random address - 11 (MSB->LSB) 2078 RND_STATIC_ADDR = 0xC0, 2079 /// Private non resolvable address - 00 (MSB->LSB) 2080 RND_NON_RSLV_ADDR = 0x00, 2081 /// Private resolvable address - 01 (MSB->LSB) 2082 RND_RSLV_ADDR = 0x40, 2083 }; 2084 2085 ///Advertising channels enables 2086 enum adv_channel_map 2087 { 2088 ///Byte value for advertising channel map for channel 37 enable 2089 ADV_CHNL_37_EN = 0x01, 2090 ///Byte value for advertising channel map for channel 38 enable 2091 ADV_CHNL_38_EN = 0x02, 2092 ///Byte value for advertising channel map for channel 39 enable 2093 ADV_CHNL_39_EN = 0x04, 2094 ///Byte value for advertising channel map for channel 37, 38 and 39 enable 2095 ADV_ALL_CHNLS_EN = 0x07, 2096 }; 2097 2098 ///Advertising filter policy 2099 enum adv_filter_policy 2100 { 2101 ///Allow both scan and connection requests from anyone 2102 ADV_ALLOW_SCAN_ANY_CON_ANY = 0x00, 2103 ///Allow both scan req from White List devices only and connection req from anyone 2104 ADV_ALLOW_SCAN_WLST_CON_ANY, 2105 ///Allow both scan req from anyone and connection req from White List devices only 2106 ADV_ALLOW_SCAN_ANY_CON_WLST, 2107 ///Allow scan and connection requests from White List devices only 2108 ADV_ALLOW_SCAN_WLST_CON_WLST, 2109 }; 2110 2111 ///Advertising enables 2112 enum 2113 { 2114 ///Disable advertising 2115 ADV_DIS = 0x00, 2116 ///Enable advertising 2117 ADV_EN, 2118 }; 2119 2120 ///LE Scan type 2121 enum 2122 { 2123 ///Passive scan 2124 SCAN_PASSIVE = 0x00, 2125 ///Active scan 2126 SCAN_ACTIVE, 2127 }; 2128 2129 ///Scan filter policy 2130 enum scan_filter_policy 2131 { 2132 ///Allow advertising packets from anyone 2133 SCAN_ALLOW_ADV_ALL = 0x00, 2134 ///Allow advertising packets from White List devices only 2135 SCAN_ALLOW_ADV_WLST, 2136 ///Allow advertising packets from anyone and Direct adv using RPA in InitA 2137 SCAN_ALLOW_ADV_ALL_AND_INIT_RPA, 2138 ///Allow advertising packets from White List devices only and Direct adv using RPA in InitA 2139 SCAN_ALLOW_ADV_WLST_AND_INIT_RPA, 2140 }; 2141 2142 ///Le Scan enables 2143 enum 2144 { 2145 ///Disable scan 2146 SCAN_DIS = 0x00, 2147 ///Enable scan 2148 SCAN_EN, 2149 }; 2150 2151 ///Filter duplicates 2152 enum scan_dup_filter_policy 2153 { 2154 ///Disable filtering of duplicate packets 2155 SCAN_FILT_DUPLIC_DIS = 0x00, 2156 ///Enable filtering of duplicate packets 2157 SCAN_FILT_DUPLIC_EN, 2158 ///Enable filtering of duplicate packets per scan period 2159 SCAN_FILT_DUPLIC_EN_PER_PERIOD, 2160 }; 2161 2162 ///Initiator Filter policy 2163 enum 2164 { 2165 ///Initiator will ignore White List 2166 INIT_FILT_IGNORE_WLST = 0x00, 2167 ///Initiator will use White List 2168 INIT_FILT_USE_WLST, 2169 }; 2170 2171 ///Periodic Synchronization Filter policy 2172 enum 2173 { 2174 ///Use the Advertising SID, Advertising Address Type and Advertising Address parameters to determine 2175 ///which advertiser to listen to 2176 PER_SYNC_FILT_IGNORE_PAL = 0x00, 2177 ///Use the Periodic Advertiser List to determine which advertiser to listen to 2178 PER_SYNC_FILT_USE_PAL, 2179 }; 2180 2181 ///Transmitter test Packet Payload Type 2182 enum 2183 { 2184 ///Pseudo-random 9 TX test payload type 2185 PAYL_PSEUDO_RAND_9 = 0x00, 2186 ///11110000 TX test payload type 2187 PAYL_11110000, 2188 ///10101010 TX test payload type 2189 PAYL_10101010, 2190 ///Pseudo-random 15 TX test payload type 2191 PAYL_PSEUDO_RAND_15, 2192 ///All 1s TX test payload type 2193 PAYL_ALL_1, 2194 ///All 0s TX test payload type 2195 PAYL_ALL_0, 2196 ///00001111 TX test payload type 2197 PAYL_00001111, 2198 ///01010101 TX test payload type 2199 PAYL_01010101, 2200 }; 2201 2202 /// Constant defining the role 2203 enum 2204 { 2205 ///Master role 2206 ROLE_MASTER, 2207 ///Slave role 2208 ROLE_SLAVE, 2209 }; 2210 2211 /// Constant clock accuracy 2212 enum SCA 2213 { 2214 ///Clock accuracy at 500PPM 2215 SCA_500PPM, 2216 ///Clock accuracy at 250PPM 2217 SCA_250PPM, 2218 ///Clock accuracy at 150PPM 2219 SCA_150PPM, 2220 ///Clock accuracy at 100PPM 2221 SCA_100PPM, 2222 ///Clock accuracy at 75PPM 2223 SCA_75PPM, 2224 ///Clock accuracy at 50PPM 2225 SCA_50PPM, 2226 ///Clock accuracy at 30PPM 2227 SCA_30PPM, 2228 ///Clock accuracy at 20PPM 2229 SCA_20PPM 2230 }; 2231 2232 ///Advertising pdu Type 2233 /*@TRACE*/ 2234 enum ble_adv_type 2235 { 2236 /// Undirected advertising 2237 BLE_ADV_IND = 0x00, 2238 /// Directed advertising 2239 BLE_ADV_DIRECT_IND = 0x01, 2240 /// Non Connectable advertising 2241 BLE_ADV_NONCONN_IND = 0x02, 2242 /// Scan Request on primary channel 2243 BLE_SCAN_REQ = 0x03, 2244 /// Scan Response on secondary channel 2245 BLE_AUX_SCAN_REQ = 0x03, 2246 2247 /// Scan Response 2248 BLE_SCAN_RSP = 0x04, 2249 /// Connect Request on primary channel 2250 BLE_CONNECT_IND = 0x05, 2251 /// Connect Request on secondary channel 2252 BLE_AUX_CONNECT_REQ = 0x05, 2253 2254 /// Discoverable advertising 2255 BLE_ADV_SCAN_IND = 0x06, 2256 2257 /// Extended Advertising indication on primary channel 2258 BLE_ADV_EXT_IND = 0x07, 2259 2260 /// ADV data indication on secondary channel 2261 BLE_AUX_ADV_IND = 0x07, 2262 /// Scan response data on secondary channel 2263 BLE_AUX_SCAN_RSP = 0x07, 2264 /// Periodic Advertising packet on secondary channel 2265 BLE_AUX_SYNC_IND = 0x07, 2266 /// Continuation of advertising data on secondary channel 2267 BLE_AUX_CHAIN_IND = 0x07, 2268 /// Response of the AUX_CONNECT_REQ on secondary channel to confirm that connection is accepted 2269 BLE_AUX_CONNECT_RSP = 0x08, 2270 2271 /// Reserved 2272 BLE_RESERVED_PDU_TYPE, 2273 }; 2274 2275 2276 /// LE Advertising Report Event Type HCI:7.7.65.2 2277 enum 2278 { 2279 /// Connectable undirected advertising 2280 ADV_IND_EVT = 0x00, 2281 /// Connectable directed advertising 2282 ADV_DIRECT_IND_EVT, 2283 /// Scannable undirected advertising 2284 ADV_SCAN_IND_EVT, 2285 /// Non connectable undirected advertising 2286 ADV_NONCONN_IND_EVT, 2287 /// Scan Response 2288 SCAN_RSP_EVT, 2289 /// Reserved 2290 RESERVED_ADV_EVT_TYPES, 2291 }; 2292 2293 /// LE Extended Advertising Report Event Type Bit Mask HCI:7.7.65.13 2294 2295 /// Connectable advertising event 2296 #define CON_ADV_EVT_MSK 0x01 2297 /// Scannable advertising event 2298 #define SCAN_ADV_EVT_MSK 0x02 2299 /// Directed advertising event 2300 #define DIR_ADV_EVT_MSK 0x04 2301 /// Scan Response 2302 #define SCAN_RSP_EVT_MSK 0x08 2303 /// Legacy advertising PDUs 2304 #define LGCY_ADV_EVT_MSK 0x10 2305 2306 /// Connectable undirected advertising 2307 #define LGCY_ADV_IND_EVT 0x13 //LGCY_ADV_EVT_MSK|SCAN_ADV_EVT_MSK|CON_ADV_EVT_MSK 2308 /// Connectable directed advertising 2309 #define LGCY_ADV_DIRECT_IND_EVT 0x15 //LGCY_ADV_EVT_MSK|DIR_ADV_EVT_MSK|CON_ADV_EVT_MSK 2310 /// Scannable undirected advertising 2311 #define LGCY_ADV_SCAN_IND_EVT 0x12 //LGCY_ADV_EVT_MSK|SCAN_ADV_EVT_MSK 2312 /// Non connectable undirected advertising 2313 #define LGCY_ADV_NONCONN_IND_EVT 0x10 //LGCY_ADV_EVT_MSK 2314 /// Scan Response to ADV_IND 2315 #define LGCY_SCAN_RSP_TO_ADV_IND_EVT 0x1B //LGCY_ADV_EVT_MSK|SCAN_RSP_EVT_MSK|SCAN_ADV_EVT_MSK|CON_ADV_EVT_MSK 2316 /// Scan Response to ADV_SCAN_IND 2317 #define LGCY_SCAN_RSP_TO_ADV_SCAN_IND_EVT 0x1A //LGCY_ADV_EVT_MSK|SCAN_RSP_EVT_MSK|SCAN_ADV_EVT_MSK 2318 2319 /// Offset of data status field in event type value 2320 #define ADV_EVT_DATA_STATUS_LSB 5 2321 /// Mask for data status field in event type value 2322 #define ADV_EVT_DATA_STATUS_MASK 0x0060 2323 /// Data status of extended advertising event - Complete 2324 #define ADV_EVT_DATA_STATUS_COMPLETE 0 2325 /// Data status of extended advertising event - Incomplete, more data to come 2326 #define ADV_EVT_DATA_STATUS_INCOMPLETE 1 2327 /// Data status of extended advertising event - Incomplete, data truncated, no more to come 2328 #define ADV_EVT_DATA_STATUS_TRUNCATED 2 2329 /// Data status of extended advertising event - Reserved for future use 2330 #define ADV_EVT_DATA_STATUS_RESERVED 3 2331 2332 /// Data status of periodic advertising event - Complete 2333 #define PER_ADV_EVT_DATA_STATUS_COMPLETE 0 2334 /// Data status of periodic advertising event - Incomplete, more data to come 2335 #define PER_ADV_EVT_DATA_STATUS_INCOMPLETE 1 2336 /// Data status of periodic advertising event - Incomplete, data truncated, no more to come 2337 #define PER_ADV_EVT_DATA_STATUS_TRUNCATED 2 2338 2339 /// LLID packet 2340 enum 2341 { 2342 /// Reserved for future use 2343 LLID_ISO, 2344 /// Continue 2345 LLID_CONTINUE, 2346 /// Start 2347 LLID_START, 2348 /// Control 2349 LLID_CNTL 2350 }; 2351 2352 /// Remote OOB Data present parameter value HCI:7.1.29 2353 enum 2354 { 2355 REM_OOB_DATA_NO = 0x00, 2356 REM_OOB_DATA_P192 = 0x01, 2357 REM_OOB_DATA_P256 = 0x02, 2358 REM_OOB_DATA_P192_P256 = 0x03, 2359 }; 2360 2361 /// Encryption enabled parameter in HCI_Enc_Chg_Evt HCI:7.7.8 2362 enum 2363 { 2364 ENC_OFF = 0x00, 2365 ENC_BRDER_E0_LE_AESCCM = 0x01, 2366 ENC_BREDR_AESCC = 0x02, 2367 }; 2368 2369 /// Combined duration of Preamble and Access Address depending on the PHY used (in us) 2370 #define BLE_PREAMBLE_ACCESS_ADDR_DUR_1MBPS (5*8) 2371 #define BLE_PREAMBLE_ACCESS_ADDR_DUR_2MBPS (6*4) 2372 #define BLE_PREAMBLE_ACCESS_ADDR_DUR_125KBPS (80+256) 2373 #define BLE_PREAMBLE_ACCESS_ADDR_DUR_500KBPS (80+256) 2374 2375 2376 2377 /// size of the Maximum Adv Extended header length 2378 #define BLE_EXT_MAX_HEADER_LEN (63) 2379 2380 /// size of the LEN & MODE info preceeding the extended header 2381 #define BLE_EXT_ADV_PRE_HEADER_LEN (1) 2382 /// size of the FLAGS info at start of the extended header 2383 #define BLE_EXT_ADV_HEADER_FLAGS_LEN (1) 2384 /// size of the extended header in bytes (pre-header + flags) 2385 #define BLE_EXT_ADV_HEADER_LEN (2) 2386 /// Size of supplemental info in extended header 2387 #define BLE_EXT_SUP_INFO_LEN (1) 2388 /// Size of ADV Data Info in extended header 2389 #define BLE_EXT_ADI_LEN (2) 2390 /// Size of Aux Pointer info in extended header 2391 #define BLE_EXT_AUX_PTR_LEN (3) 2392 /// Size of Sync PTR info in extended header 2393 #define BLE_EXT_SYNC_LEN (18) 2394 /// Size of TX Power info in extended header 2395 #define BLE_EXT_TX_PWR_LEN (1) 2396 2397 /// Size of the Channel Map Update Indication in extended header 2398 #define BLE_EXT_CHM_UPD_IND_LEN (9) 2399 /// AD Types for ACAD data 2400 #define BLE_EXT_ACAD_CHANNEL_MAP_UPDATE_INDICATION_AD_TYPE (0x28) 2401 2402 /// Size of ACAD Data for BIG info - Not Encrypted 2403 #define BLE_EXT_ACAD_BIG_INFO_LEN (32) 2404 /// Size of ACAD Data for BIG info - Encrypted 2405 #define BLE_EXT_ACAD_BIG_INFO_ENC_LEN (56) 2406 /// maximum duration in us of Big Offset with 30 us step 2407 #define BLE_BIG_OFFSET_30_US_MAX (491490) 2408 /// AD Type reserved for Stream info ACAD data 2409 /// TODO [FBE] put 0xFE for the moment 2410 #define BLE_EXT_ACAD_BIG_INFO_AD_TYPE (0xFE) 2411 2412 2413 /// Extended Header Flags 2414 enum ble_ext_header_flags 2415 { 2416 // AdvA 2417 ADVA_BIT = 0x01, 2418 ADVA_POS = 0, 2419 // TargetA 2420 TARGETA_BIT = 0x02, 2421 TARGETA_POS = 1, 2422 // SuppInfo 2423 SUPPINFO_BIT = 0x04, 2424 SUPPINFO_POS = 2, 2425 // AdvDataInfo (ADI) 2426 ADI_BIT = 0x08, 2427 ADI_POS = 3, 2428 // AuxPtr 2429 AUXPTR_BIT = 0x10, 2430 AUXPTR_POS = 4, 2431 // SyncInfo 2432 SYNCINFO_BIT = 0x20, 2433 SYNCINFO_POS = 5, 2434 // TxPower 2435 TXPOWER_BIT = 0x40, 2436 TXPOWER_POS = 6, 2437 }; 2438 2439 /// AUX pointer description 2440 enum ble_aux_ptr 2441 { 2442 // Aux LL Channel 2443 BLE_AUX_LL_CHANNEL_MASK = 0x0000003F, 2444 BLE_AUX_LL_CHANNEL_LSB = 0, 2445 // Aux Clock Accuracy 2446 BLE_AUX_CA_BIT = 0x00000040, 2447 BLE_AUX_CA_POS = 6, 2448 // Aux Offset Unit 2449 BLE_AUX_OFFSET_UNIT_BIT = 0x00000080, 2450 BLE_AUX_OFFSET_UNIT_POS = 7, 2451 // Aux ADV offset 2452 BLE_AUX_OFFSET_MASK = 0x001FFF00, 2453 BLE_AUX_OFFSET_LSB = 8, 2454 // Aux PHY 2455 BLE_AUX_PHY_MASK = 0x00E00000, 2456 BLE_AUX_PHY_LSB = 21, 2457 }; 2458 2459 /// Aux PHY values LL:2.3.4.5 2460 enum aux_phy 2461 { 2462 AUX_PHY_1MBPS = 0, 2463 AUX_PHY_2MBPS = 1, 2464 AUX_PHY_CODED = 2, 2465 }; 2466 2467 /// SyncInfo - Sync Offset description (13 bits) 2468 #define BLE_SYNC_OFFSET_MASK 0x1FFF 2469 #define BLE_SYNC_OFFSET_LSB 0 2470 2471 /// SyncInfo - Offset Units description (1 bit) 2472 #define BLE_SYNC_OFFSET_UNITS_BIT 0x2000 2473 #define BLE_SYNC_OFFSET_UNITS_POS 13 2474 2475 /// SyncInfo[8] - ChM description (5 bits of 37 bits) 2476 #define BLE_SYNC_CHMAP_END_MASK 0x1F 2477 #define BLE_SYNC_CHMAP_END_LSB 0 2478 2479 /// SyncInfo[8] - SCA description (3 bits) 2480 #define BLE_SYNC_SCA_MASK 0xE0 2481 #define BLE_SYNC_SCA_LSB 5 2482 2483 /// AdvDataInfo (ADI) field description 2484 enum ble_adi 2485 { 2486 // Advertising Data ID (DID) 2487 BLE_ADI_DID_MASK = 0x0FFF, 2488 BLE_ADI_DID_LSB = 0, 2489 // Advertising Set ID (SID) 2490 BLE_ADI_SID_MASK = 0xF000, 2491 BLE_ADI_SID_LSB = 12, 2492 }; 2493 2494 /// Advertising mode 2495 enum ble_adv_mode 2496 { 2497 /// Non connectable and non scannable mode 2498 BLE_MODE_NON_CON_SCAN = 0, 2499 /// Connectable Mode (accept connection request) 2500 BLE_MODE_CONNECTABLE = 1, 2501 /// Scannable Mode (accept scan request) 2502 BLE_MODE_SCANNABLE = 2, 2503 /// Reserved Advertising mode 2504 BLE_MODE_RESERVED = 3, 2505 }; 2506 2507 /// Advertising data operation 2508 enum adv_data_op 2509 { 2510 /// Intermediate fragment of fragmented extended advertising data 2511 ADV_DATA_OP_INTERMEDIATE_FRAG = 0, 2512 /// First fragment of fragmented extended advertising data 2513 ADV_DATA_OP_FIRST_FRAG = 1, 2514 /// Last fragment of fragmented extended advertising data 2515 ADV_DATA_OP_LAST_FRAG = 2, 2516 /// Complete extended advertising data 2517 ADV_DATA_OP_COMPLETE = 3, 2518 /// Unchanged data (just update the Advertising DID) 2519 ADV_DATA_OP_UNCHANGED_DATA = 4, 2520 }; 2521 2522 /// Advertising data fragment preference 2523 enum adv_data_frag_pref 2524 { 2525 /// The Controller may fragment all Host advertising data 2526 ADV_DATA_MAY_FRAG = 0, 2527 /// The Controller should not fragment nor minimize fragmentation of Host advertising data 2528 ADV_DATA_SHOULD_NOT_FRAG = 1, 2529 }; 2530 2531 /* 2532 * STRUCTURE DEFINITONS 2533 **************************************************************************************** 2534 */ 2535 2536 ///BD name structure 2537 struct bd_name 2538 { 2539 ///length for name 2540 uint8_t namelen; 2541 ///array of bytes for name 2542 uint8_t name[BD_NAME_SIZE]; 2543 }; 2544 2545 ///Structure device name 2546 /*@TRACE*/ 2547 struct device_name 2548 { 2549 ///array of bytes for name 2550 uint8_t name[BD_NAME_SIZE]; 2551 }; 2552 2553 ///Structure name vector 2554 /*@TRACE*/ 2555 struct name_vect 2556 { 2557 uint8_t vect[NAME_VECT_SIZE]; 2558 }; 2559 2560 /// lap structure 2561 /*@TRACE*/ 2562 struct lap 2563 { 2564 /// LAP 2565 uint8_t A[BD_ADDR_LAP_LEN]; 2566 }; 2567 2568 /// class structure 2569 /*@TRACE*/ 2570 struct devclass 2571 { 2572 /// class 2573 uint8_t A[DEV_CLASS_LEN]; 2574 }; 2575 2576 ///Extended inquiry response structure 2577 /*@TRACE*/ 2578 struct eir 2579 { 2580 /// eir data 2581 uint8_t data[EIR_DATA_SIZE]; 2582 }; 2583 2584 ///Event mask structure 2585 /*@TRACE*/ 2586 struct evt_mask 2587 { 2588 ///8-byte array for mask value 2589 uint8_t mask[EVT_MASK_LEN]; 2590 }; 2591 2592 ///Host number of completed packets structure, for 1 connection handle 2593 struct host_cmpl_pkts 2594 { 2595 ///Connection handle 2596 uint16_t con_hdl; 2597 ///Number of completed packets 2598 uint16_t nb_cmpl_pkts; 2599 }; 2600 2601 ///BD Address structure 2602 /*@TRACE*/ 2603 struct bd_addr 2604 { 2605 ///6-byte array address value 2606 uint8_t addr[BD_ADDR_LEN]; 2607 }; 2608 2609 ///Access Address structure 2610 /*@TRACE*/ 2611 struct access_addr 2612 { 2613 ///4-byte array access address 2614 uint8_t addr[ACCESS_ADDR_LEN]; 2615 }; 2616 2617 ///Advertising data structure 2618 /*@TRACE*/ 2619 struct adv_data 2620 { 2621 ///Maximum length data bytes array 2622 uint8_t data[ADV_DATA_LEN]; 2623 }; 2624 2625 ///Scan response data structure 2626 /*@TRACE*/ 2627 struct scan_rsp_data 2628 { 2629 ///Maximum length data bytes array 2630 uint8_t data[SCAN_RSP_DATA_LEN]; 2631 }; 2632 2633 ///Channel map structure 2634 /*@TRACE*/ 2635 struct chnl_map 2636 { 2637 ///10-bytes channel map array 2638 uint8_t map[CHNL_MAP_LEN]; 2639 }; 2640 2641 ///Channel map structure 2642 /*@TRACE*/ 2643 struct le_chnl_map 2644 { 2645 ///5-byte channel map array 2646 uint8_t map[LE_CHNL_MAP_LEN]; 2647 }; 2648 2649 /// External frame period (duration & type) structure 2650 struct ext_fr_period 2651 { 2652 /// Period_Duration 2653 uint16_t duration; 2654 /// Period_Type 2655 uint8_t type; 2656 }; 2657 2658 /// MWS scan frequency (low & high) structure 2659 struct mws_scan_freq 2660 { 2661 ///Scan_Frequency_Low 2662 uint16_t low; 2663 ///Scan_Frequency_High 2664 uint16_t high; 2665 }; 2666 2667 /// MWS pattern interval (duration & type) structure 2668 struct mws_pattern_intv 2669 { 2670 ///MWS_PATTERN_IntervalDuration 2671 uint16_t duration; 2672 ///MWS_PATTERN_IntervalType 2673 uint8_t type; 2674 }; 2675 2676 2677 /// MWS transport rates structure 2678 struct mws_trans_rate 2679 { 2680 ///To_MWS_Baud_Rate 2681 uint32_t to_mws_baud_rate; 2682 ///From_MWS_Baud_Rate 2683 uint32_t from_mws_baud_rate; 2684 }; 2685 2686 /// MWS transports strucutre 2687 struct mws_transport 2688 { 2689 ///Transport_Layer 2690 uint8_t layer_id; 2691 ///Num_Baud_Rates 2692 uint8_t num_baud_rates; 2693 ///To/From_MWS_Baud_Rates 2694 struct mws_trans_rate *rates; 2695 }; 2696 2697 2698 /// SAM submaps structure 2699 struct sam_submaps 2700 { 2701 //12-byte SAM submaps array of 2-bit fields 2702 //The nth (numbering from 0) such field defines the submap type of the nth submap in the map: 2703 // - SAM_SLOTS_SUBMAPPED: Each slot is individually available or unavailable as configured. 2704 // - SAM_SLOTS_AVAILABLE: All slots are available for transmission and reception. 2705 // - SAM_SLOTS_UNAVAILABLE: All slots are unavailable for transmission and reception. 2706 // - Other: Reserved for future use. 2707 uint8_t map[SAM_SUBMAPS_LEN]; 2708 }; 2709 2710 /// SAM type0 submap structure 2711 struct sam_type0_submap 2712 { 2713 //14-byte type0 submap array of 2-bit fields 2714 //The nth (numbering from 0) such field defines the submap type of the nth submap in the map: 2715 // - SAM_SLOT_NOT_AVAILABLE: The slot is not available for transmision or reception. 2716 // - SAM_SLOT_TX_AVAILABLE: The slot is available for transmission but not reception. 2717 // - SAM_SLOT_RX_AVAILABLE: The slot is available for reception but not transmission. 2718 // - SAM_SLOT_TX_RX_AVAILABLE: The slot is available for both transmission and reception. 2719 uint8_t map[SAM_TYPE0_SUBMAP_LEN]; 2720 }; 2721 2722 ///Long Term Key structure 2723 /*@TRACE*/ 2724 struct ltk 2725 { 2726 ///16-byte array for LTK value 2727 uint8_t ltk[KEY_LEN]; 2728 }; 2729 2730 ///Identity Resolving Key structure 2731 /*@TRACE*/ 2732 struct irk 2733 { 2734 ///16-byte array for IRK value 2735 uint8_t key[KEY_LEN]; 2736 }; 2737 2738 /// Initialization vector (for AES-CCM encryption) 2739 /*@TRACE*/ 2740 struct initialization_vector 2741 { 2742 ///8-byte array 2743 uint8_t vect[IV_LEN]; 2744 }; 2745 2746 /// Bluetooth address with link key 2747 struct bd_addr_plus_key 2748 { 2749 /// BD Address 2750 struct bd_addr bd_addr; 2751 /// Link Key 2752 struct ltk link_key; 2753 }; 2754 2755 ///Random number structure 2756 /*@TRACE*/ 2757 struct rand_nb 2758 { 2759 ///8-byte array for random number 2760 uint8_t nb[RAND_NB_LEN]; 2761 }; 2762 2763 ///Advertising report structure 2764 /*@TRACE*/ 2765 struct adv_report 2766 { 2767 ///Event type: 2768 /// - ADV_CONN_UNDIR: Connectable Undirected advertising 2769 /// - ADV_CONN_DIR: Connectable directed advertising 2770 /// - ADV_DISC_UNDIR: Discoverable undirected advertising 2771 /// - ADV_NONCONN_UNDIR: Non-connectable undirected advertising 2772 uint8_t evt_type; 2773 ///Advertising address type: public/random 2774 uint8_t adv_addr_type; 2775 ///Advertising address value 2776 struct bd_addr adv_addr; 2777 ///Data length in advertising packet 2778 uint8_t data_len; 2779 ///Data of advertising packet 2780 uint8_t data[ADV_DATA_LEN]; 2781 ///RSSI value for advertising packet (in dBm, between -127 and +20 dBm) 2782 int8_t rssi; 2783 }; 2784 2785 ///Direct Advertising report structure 2786 /*@TRACE*/ 2787 struct dir_adv_report 2788 { 2789 ///Event type: 2790 /// - ADV_CONN_DIR: Connectable directed advertising 2791 uint8_t evt_type; 2792 ///Address type: public/random 2793 uint8_t addr_type; 2794 ///Address value 2795 struct bd_addr addr; 2796 ///Direct address type: public/random 2797 uint8_t dir_addr_type; 2798 ///Direct address value 2799 struct bd_addr dir_addr; 2800 ///RSSI value for advertising packet (in dBm, between -127 and +20 dBm) 2801 int8_t rssi; 2802 }; 2803 2804 ///Exteneded Advertising report structure 2805 /*@TRACE*/ 2806 struct ext_adv_report 2807 { 2808 ///Event type 2809 uint16_t evt_type; 2810 ///Advertising address type: public/random 2811 uint8_t adv_addr_type; 2812 ///Advertising address value 2813 struct bd_addr adv_addr; 2814 ///Primary PHY 2815 uint8_t phy; 2816 ///Secondary PHY 2817 uint8_t phy2; 2818 ///Advertising SID 2819 uint8_t adv_sid; 2820 ///Tx Power 2821 uint8_t tx_power; 2822 ///RSSI value for advertising packet (in dBm, between -127 and +20 dBm) 2823 int8_t rssi; 2824 ///Periodic Advertising interval (Time=N*1.25ms) 2825 uint16_t interval; 2826 ///Direct address type 2827 uint8_t dir_addr_type; 2828 ///Direct address value 2829 struct bd_addr dir_addr; 2830 ///Data length in advertising packet 2831 uint8_t data_len; 2832 ///Data of advertising packet 2833 uint8_t data[EXT_ADV_DATA_MAX_LEN]; 2834 }; 2835 2836 ///Supported LE Features structure 2837 /*@TRACE*/ 2838 struct le_features 2839 { 2840 ///8-byte array for LE features 2841 uint8_t feats[LE_FEATS_LEN]; 2842 }; 2843 2844 ///Simple pairing hash structure 2845 /*@TRACE*/ 2846 struct hash 2847 { 2848 ///16-byte array for LTK value 2849 uint8_t C[KEY_LEN]; 2850 }; 2851 2852 ///Simple pairing randomizer structure 2853 /*@TRACE*/ 2854 struct randomizer 2855 { 2856 ///16-byte array for LTK value 2857 uint8_t R[KEY_LEN]; 2858 }; 2859 2860 ///Pin code structure 2861 /*@TRACE*/ 2862 struct pin_code 2863 { 2864 ///16-byte array for PIN value 2865 uint8_t pin[PIN_CODE_MAX_LEN]; 2866 }; 2867 2868 ///Sres structure 2869 /*@TRACE*/ 2870 struct sres_nb 2871 { 2872 ///8-byte array for random number 2873 uint8_t nb[SRES_LEN]; 2874 }; 2875 2876 ///aco structure 2877 /*@TRACE*/ 2878 struct aco 2879 { 2880 ///8-byte array for random number 2881 uint8_t a[ACO_LEN]; 2882 }; 2883 2884 ///struct byte 16 to stay align with the sdl version 2885 /*@TRACE*/ 2886 struct byte16 2887 { 2888 uint8_t A[16]; 2889 }; 2890 2891 ///Controller number of completed packets structure 2892 /*@TRACE*/ 2893 struct nb_cmpl_pk 2894 { 2895 ///Connection handle 2896 uint16_t con_hdl; 2897 ///Controller number of data packets that have been completed since last time 2898 uint16_t nb_hc_cmpl_pkts; 2899 }; 2900 2901 ///Supported Features structure 2902 /*@TRACE*/ 2903 struct features 2904 { 2905 ///8-byte array for features 2906 uint8_t feats[FEATS_LEN]; 2907 }; 2908 2909 ///Supported commands structure 2910 /*@TRACE*/ 2911 struct supp_cmds 2912 { 2913 ///64-byte array for supported commands 2914 uint8_t cmds[SUPP_CMDS_LEN]; 2915 }; 2916 2917 ///Supported LMP features structure 2918 struct lmp_features 2919 { 2920 ///8-byte array for LMp features 2921 uint8_t feats[FEATS_LEN]; 2922 }; 2923 2924 ///Simple pairing IO capabilities 2925 struct io_capability 2926 { 2927 ///IO capability 2928 uint8_t io_cap; 2929 /// Out Of Band Data present 2930 bool oob_data_present; 2931 ///Authentication Requirement 2932 uint8_t aut_req; 2933 }; 2934 2935 ///Public key 2936 struct pub_key_192 2937 { 2938 uint8_t p_key[PUB_KEY_192_LEN/2]; 2939 }; 2940 2941 ///Public key 2942 struct pub_key_256 2943 { 2944 uint8_t p_key[PUB_KEY_256_LEN/2]; 2945 }; 2946 2947 ///Simple pairing public keys 192 2948 struct sp_pub_key_192 2949 { 2950 ///Public key X 2951 struct pub_key_192 X; 2952 ///Public key Y 2953 struct pub_key_192 Y; 2954 }; 2955 2956 ///Simple pairing public keys 256 2957 struct sp_pub_key_256 2958 { 2959 ///Public key X 2960 struct pub_key_256 X; 2961 ///Public key Y 2962 struct pub_key_256 Y; 2963 }; 2964 2965 ///Supported LE states structure 2966 /*@TRACE*/ 2967 struct le_states 2968 { 2969 ///8-byte array for LE states 2970 uint8_t supp_states[LE_STATES_LEN]; 2971 }; 2972 2973 ///White List element structure 2974 struct white_list 2975 { 2976 ///BD address of device entry 2977 struct bd_addr wl_bdaddr; 2978 ///BD address type of device entry 2979 uint8_t wl_bdaddr_type; 2980 }; 2981 2982 ///CRC initial value structure 2983 /*@TRACE*/ 2984 struct crc_init 2985 { 2986 ///3-byte array CRC initial value 2987 uint8_t crc[CRC_INIT_LEN]; 2988 }; 2989 2990 ///Session key diversifier master or slave structure 2991 /*@TRACE*/ 2992 struct sess_k_div_x 2993 { 2994 ///8-byte array for diversifier value 2995 uint8_t skdiv[SESS_KEY_DIV_LEN]; 2996 }; 2997 2998 ///Session key diversifier structure 2999 struct sess_k_div 3000 { 3001 ///16-byte array for session key diversifier. 3002 uint8_t skd[2*SESS_KEY_DIV_LEN]; 3003 }; 3004 3005 ///Initiator vector 3006 /*@TRACE*/ 3007 struct init_vect 3008 { 3009 ///4-byte array for vector 3010 uint8_t iv[INIT_VECT_LEN]; 3011 }; 3012 3013 /*@TRACE*/ 3014 typedef struct t_public_key 3015 { 3016 uint8_t x[PUBLIC_KEY_P256_LEN]; 3017 uint8_t y[PUBLIC_KEY_P256_LEN]; 3018 3019 } t_public_key; 3020 3021 /// structure connection request LLData 3022 struct pdu_con_req_lldata 3023 { 3024 /// Access address 3025 struct access_addr aa; 3026 3027 /// CRC init 3028 struct crc_init crcinit; 3029 3030 /// Window size (in units of 1,25 ms, i.e. 2 slots) 3031 uint8_t winsize; 3032 3033 /// Window offset (in units of 1,25 ms, i.e. 2 slots) 3034 uint16_t winoffset; 3035 3036 /// Interval (in units of 1,25 ms, i.e. 2 slots) 3037 uint16_t interval; 3038 3039 /// Latency 3040 uint16_t latency; 3041 3042 /// Timeout (in units of 10 ms, i.e. 16 slots) 3043 uint16_t timeout; 3044 3045 /// Channel mapping 3046 struct le_chnl_map chm; 3047 3048 /// Hopping 3049 uint8_t hop_sca; 3050 }; 3051 3052 /// structure connection request 3053 struct pdu_con_req 3054 { 3055 /// Initiator address 3056 struct bd_addr inita; 3057 3058 /// Advertiser address 3059 struct bd_addr adva; 3060 3061 /// LLData 3062 struct pdu_con_req_lldata lldata; 3063 }; 3064 3065 /// structure advertising syncinfo field 3066 /*@TRACE*/ 3067 struct sync_info 3068 { 3069 /// sync offset 3070 uint16_t sync_offset; 3071 3072 /// offset units 3073 uint8_t offset_units; 3074 3075 /// interval 3076 uint16_t interval; 3077 3078 /// channel mapping 3079 struct le_chnl_map ch_map; 3080 3081 /// clock accuracy 3082 uint8_t sca; 3083 3084 /// access address 3085 struct access_addr aa; 3086 3087 /// CRC init 3088 struct crc_init crcinit; 3089 3090 /// event counter 3091 uint16_t evt_counter; 3092 }; 3093 3094 /// Device specific link preferences 3095 typedef struct 3096 { 3097 // **** Data Length Management **** 3098 /// Suggested value for the Controller's maximum transmitted number of payload octets 3099 uint16_t suggested_max_tx_octets; 3100 /// Suggested value for the Controller's maximum packet transmission time (in us) 3101 uint16_t suggested_max_tx_time; 3102 3103 // **** PHY Management **** 3104 /// Phy options indicated by Host (@see enum le_phy_opt) (by default 0 if never set by Host) 3105 uint16_t phy_opt; 3106 /// Default TX preferred PHY to use (@see enum le_phy_mask) 3107 uint8_t tx_phys; 3108 /// Default RX preferred PHY to use (@see enum le_phy_mask) 3109 uint8_t rx_phys; 3110 } link_pref_t; 3111 3112 3113 /// BIG info fields 3114 enum big_info_fields 3115 { 3116 // (14 bits) BIG_Offset 3117 BIG_OFFSET_POS = 0, 3118 BIG_OFFSET_LSB = 0, 3119 BIG_OFFSET_MASK = 0x00003FFF, 3120 // (1 bit) BIG_Offset_Units 3121 BIG_OFFSET_UNIT_POS = 0, 3122 BIG_OFFSET_UNIT_LSB = 14, 3123 BIG_OFFSET_UNIT_MASK = 0x00004000, 3124 // (12 bits) ISO_Interval 3125 BIG_ISO_INTERVAL_POS = 0, 3126 BIG_ISO_INTERVAL_LSB = 15, 3127 BIG_ISO_INTERVAL_MASK = 0x07FF8000, 3128 // (5 bits) NumBIS 3129 BIG_NUM_BIS_POS = 0, 3130 BIG_NUM_BIS_LSB = 27, 3131 BIG_NUM_BIS_MASK = 0xF8000000, 3132 3133 // (5 bits) NSE 3134 BIG_NSE_POS = 4, 3135 BIG_NSE_LSB = 0, 3136 BIG_NSE_MASK = 0x1F, 3137 // (3 bits) BN 3138 BIG_BN_POS = 4, 3139 BIG_BN_LSB = 5, 3140 BIG_BN_MASK = 0xE0, 3141 3142 // (20 bits) Sub_Interval 3143 BIG_SUB_INTERVAL_POS = 5, 3144 BIG_SUB_INTERVAL_LSB = 0, 3145 BIG_SUB_INTERVAL_MASK = 0x000FFFFF, 3146 // (4 bits) PTO 3147 BIG_PTO_POS = 5, 3148 BIG_PTO_LSB = 20, 3149 BIG_PTO_MASK = 0x00F00000, 3150 3151 // (20 bits) BIS_Spacing 3152 BIG_BIS_SPACING_POS = 8, 3153 BIG_BIS_SPACING_LSB = 0, 3154 BIG_BIS_SPACING_MASK = 0x000FFFFF, 3155 // (4 bits) IRC 3156 BIG_IRC_POS = 8, 3157 BIG_IRC_LSB = 20, 3158 BIG_IRC_MASK = 0x00F00000, 3159 // (8 bits) Max_PDU 3160 BIG_MAX_PDU_POS = 11, 3161 3162 // (4 octets) SeedAccessAddress 3163 BIG_SEED_ACCESS_ADDRESS_POS = 12, 3164 3165 // (20 bits) SDU_Interval 3166 BIG_SDU_INTERVAL_POS = 16, 3167 BIG_SDU_INTERVAL_LSB = 0, 3168 BIG_SDU_INTERVAL_MASK = 0x000FFFFF, 3169 // (12 bits) Max_SDU 3170 BIG_MAX_SDU_POS = 16, 3171 BIG_MAX_SDU_LSB = 20, 3172 BIG_MAX_SDU_MASK = 0xFFF00000, 3173 3174 // (2 octets) BaseCRCInit 3175 BIG_BASE_CRC_INIT_POS = 20, 3176 3177 // (37 bits) Channel Map 3178 BIG_CHMAP_LSB_POS = 22, 3179 BIG_CHMAP_MSB_POS = 26, 3180 BIG_CHMAP_MSB_LSB = 0, 3181 BIG_CHMAP_MSB_MASK = 0x1F, 3182 3183 // (3 bits) PHY 3184 BIG_PHY_POS = 26, 3185 BIG_PHY_LSB = 5, 3186 BIG_PHY_MASK = 0xE0, 3187 3188 // (39 bits) bisPayloadCount 3189 BIG_BIS_PLD_COUNT_LSB_POS = 27, 3190 BIG_BIS_PLD_COUNT_MSB_POS = 31, 3191 BIG_BIS_PLD_COUNT_MSB_LSB = 0, 3192 BIG_BIS_PLD_COUNT_MSB_MASK = 0x7F, 3193 // (1 bit) Framing 3194 BIG_FRAMING_POS = 31, 3195 BIG_FRAMING_LSB = 7, 3196 BIG_FRAMING_MASK = 0x80, 3197 3198 // (8 octets) GIV 3199 BIG_GIV_POS = 32, 3200 3201 // (16 octets) GSKD 3202 BIG_GSKD_POS = 40, 3203 }; 3204 3205 3206 /// BIG Sync Info format 3207 struct big_info 3208 { 3209 /// BIG_Offset field contains the time from the start of the packet containing the BIGInfo to the next 3210 /// BIG anchor point. The value of the BIG_Offset field is in the unit of time indicated by the BIG_Offset_Units 3211 /// field; the actual time offset is determined by multiplying the value of BIG_Offset by the units. 3212 /// The BIG_Offset shall be in the range 600 us to ISO_Interval of the associated BIG. 3213 uint16_t big_offset; 3214 /// If the BIG_Offset_Units bit is set then the unit is 300 us; otherwise it is 30 us. 3215 /// The BIG_Offset_Units field shall be set to 0 if the offset is less than us. 3216 /// The BIG event anchor point shall be no earlier than the BIG_Offset and no later than the BIG_Offset 3217 /// plus one BIG_Offset_Unit after the start of the relevant packet. 3218 uint8_t big_offset_unit; 3219 /// ISO interval (1.25ms unit, range: 5ms to 4s) 3220 uint16_t iso_interval; 3221 /// Number of BIS transmitted. (range 1 to 31) 3222 uint8_t num_bis; 3223 /// Number of subevents (range 1 to 31) 3224 uint8_t nse; 3225 /// BN which is the number of new payloads per BIS channel in every BIS channel interval (range 1 to 7). 3226 uint8_t bn; 3227 3228 /// Time in microseconds of every subevent in the BIG 3229 uint32_t sub_interval; 3230 /// PreTransmission offset numbers which is the number of Stream Interval spacing used for selecting 3231 /// payloads of events from the current channel event (range 0 to 15). 3232 uint8_t pto; 3233 /// Time in microseconds between an anchor point of a BIS and the anchor point of the next BIS 3234 uint32_t bis_spacing; 3235 /// Immediate Repetition Count which is the number of subevents that are used for transmissions 3236 /// of the intended payload for that channel event (range 1 to 15). 3237 uint8_t irc; 3238 /// Maximum size of payload in each Data PDU of each BIS in the BIG 3239 uint8_t max_pdu; 3240 3241 /// SDU interval in microseconds 3242 uint32_t sdu_interval; 3243 /// ISOAL Framing mode, 0: Unframed, 1: Framed 3244 uint8_t framing; 3245 /// Maximum size of SDU in each SDU interval 3246 uint16_t max_sdu; 3247 /// Indicates the PHY used to transmit the Isochronous Channel PDUs (see enum le_phy_mask). 3248 uint8_t phy; 3249 /// Number from which the CRC initialization value for all Data PDUs and Control PDUs are derived. 3250 uint16_t base_crc_init; 3251 /// Number from which the Access Addresses for all Broadcast 3252 uint32_t seed_access_addr; 3253 /// Channel Map 3254 uint8_t chmap[LE_CHNL_MAP_LEN]; 3255 /// Payload Counter field contains 39bits payload counter of the BIS channel Data PDU. 3256 /// MSB of the Payload Counter field shall be set to 0. 3257 uint8_t bis_pkt_cnt[BLE_PLD_CNT_SIZE]; 3258 3259 // Encryption (Optional) 3260 /// Used to know if BIG is encrypted 3261 bool encrypted; 3262 /// GIV field is the Group Initialization Vector to be used to encrypt the BIS channel Data PDUs. 3263 uint8_t giv[IV_LEN]; 3264 /// GSKD field is the Group Session Key Diversifier used to encrypt the BIS channel Data PDUs 3265 uint8_t gskd[KEY_LEN]; 3266 }; 3267 3268 #endif // _BT_COMMON_DEFINES_H 3269