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Searched refs:mis_val (Results 1 – 25 of 56) sorted by relevance

123

/device/soc/rockchip/common/vendor/drivers/media/platform/rockchip/isp/
Dhw.c146 u32 mis_val = readl(base + CIF_MIPI_MIS); in mipi_irq_hdl() local
147 if (mis_val) { in mipi_irq_hdl()
148 rkisp_mipi_isr(mis_val, isp); in mipi_irq_hdl()
161 u32 mis_val, tx_isr = MI_RAW0_WR_FRAME | MI_RAW1_WR_FRAME | MI_RAW2_WR_FRAME | MI_RAW3_WR_FRAME; in mi_irq_hdl() local
167 mis_val = readl(base + CIF_MI_MIS); in mi_irq_hdl()
168 if (mis_val) { in mi_irq_hdl()
169 if (mis_val & ~tx_isr) { in mi_irq_hdl()
170 rkisp_mi_isr(mis_val & ~tx_isr, isp); in mi_irq_hdl()
172 if (mis_val & tx_isr) { in mi_irq_hdl()
174 rkisp_mi_isr(mis_val & tx_isr, isp); in mi_irq_hdl()
[all …]
Dcapture_v2x.h20 void rkisp_mi_v20_isr(u32 mis_val, struct rkisp_device *dev);
35 static inline void rkisp_mi_v20_isr(u32 mis_val, struct rkisp_device *dev) in rkisp_mi_v20_isr() argument
50 void rkisp_mi_v21_isr(u32 mis_val, struct rkisp_device *dev);
60 static inline void rkisp_mi_v21_isr(u32 mis_val, struct rkisp_device *dev) in rkisp_mi_v21_isr() argument
Dcapture_v1x.h10 void rkisp_mi_v1x_isr(u32 mis_val, struct rkisp_device *dev);
19 static inline void rkisp_mi_v1x_isr(u32 mis_val, struct rkisp_device *dev) in rkisp_mi_v1x_isr() argument
Dcapture_v3x.h13 void rkisp_mi_v30_isr(u32 mis_val, struct rkisp_device *dev);
23 static inline void rkisp_mi_v30_isr(u32 mis_val, struct rkisp_device *dev) in rkisp_mi_v30_isr() argument
Ddmarx.h52 void rkisp_dmarx_isr(u32 mis_val, struct rkisp_device *dev);
53 void rkisp2_rawrd_isr(u32 mis_val, struct rkisp_device *dev);
/device/soc/rockchip/rk3588/kernel/drivers/media/platform/rockchip/isp/
Dhw.c157 u32 mis_val = readl(base + CIF_MIPI_MIS); in mipi_irq_hdl() local
159 if (mis_val) in mipi_irq_hdl()
160 rkisp_mipi_isr(mis_val, isp); in mipi_irq_hdl()
173 u32 mis_val, tx_isr = MI_RAW0_WR_FRAME | MI_RAW1_WR_FRAME | in mi_irq_hdl() local
179 mis_val = readl(base + CIF_MI_MIS); in mi_irq_hdl()
180 if (mis_val) { in mi_irq_hdl()
181 if (mis_val & ~tx_isr) in mi_irq_hdl()
182 rkisp_mi_isr(mis_val & ~tx_isr, isp); in mi_irq_hdl()
183 if (mis_val & tx_isr) { in mi_irq_hdl()
185 rkisp_mi_isr(mis_val & tx_isr, isp); in mi_irq_hdl()
[all …]
Dcapture_v2x.h20 void rkisp_mi_v20_isr(u32 mis_val, struct rkisp_device *dev);
30 static inline void rkisp_mi_v20_isr(u32 mis_val, struct rkisp_device *dev) {} in rkisp_mi_v20_isr() argument
39 void rkisp_mi_v21_isr(u32 mis_val, struct rkisp_device *dev);
44 static inline void rkisp_mi_v21_isr(u32 mis_val, struct rkisp_device *dev) {} in rkisp_mi_v21_isr() argument
Dcapture_v1x.h10 void rkisp_mi_v1x_isr(u32 mis_val, struct rkisp_device *dev);
14 static inline void rkisp_mi_v1x_isr(u32 mis_val, struct rkisp_device *dev) {} in rkisp_mi_v1x_isr() argument
Dcapture_v3x.h14 void rkisp_mi_v30_isr(u32 mis_val, struct rkisp_device *dev);
19 static inline void rkisp_mi_v30_isr(u32 mis_val, struct rkisp_device *dev) {} in rkisp_mi_v30_isr() argument
Ddmarx.h56 void rkisp_dmarx_isr(u32 mis_val, struct rkisp_device *dev);
57 void rkisp2_rawrd_isr(u32 mis_val, struct rkisp_device *dev);
/device/board/isoftstone/yangfan/kernel/src/driv/media/isp/
Dhw.c157 u32 mis_val = readl(base + CIF_MIPI_MIS); in mipi_irq_hdl() local
159 if (mis_val) in mipi_irq_hdl()
160 rkisp_mipi_isr(mis_val, isp); in mipi_irq_hdl()
173 u32 mis_val, tx_isr = MI_RAW0_WR_FRAME | MI_RAW1_WR_FRAME | in mi_irq_hdl() local
179 mis_val = readl(base + CIF_MI_MIS); in mi_irq_hdl()
180 if (mis_val) { in mi_irq_hdl()
181 if (mis_val & ~tx_isr) in mi_irq_hdl()
182 rkisp_mi_isr(mis_val & ~tx_isr, isp); in mi_irq_hdl()
183 if (mis_val & tx_isr) { in mi_irq_hdl()
185 rkisp_mi_isr(mis_val & tx_isr, isp); in mi_irq_hdl()
[all …]
Dcapture_v2x.h20 void rkisp_mi_v20_isr(u32 mis_val, struct rkisp_device *dev);
30 static inline void rkisp_mi_v20_isr(u32 mis_val, struct rkisp_device *dev) {} in rkisp_mi_v20_isr() argument
39 void rkisp_mi_v21_isr(u32 mis_val, struct rkisp_device *dev);
44 static inline void rkisp_mi_v21_isr(u32 mis_val, struct rkisp_device *dev) {} in rkisp_mi_v21_isr() argument
Dcapture_v1x.h10 void rkisp_mi_v1x_isr(u32 mis_val, struct rkisp_device *dev);
14 static inline void rkisp_mi_v1x_isr(u32 mis_val, struct rkisp_device *dev) {} in rkisp_mi_v1x_isr() argument
Dcapture_v3x.h14 void rkisp_mi_v30_isr(u32 mis_val, struct rkisp_device *dev);
19 static inline void rkisp_mi_v30_isr(u32 mis_val, struct rkisp_device *dev) {} in rkisp_mi_v30_isr() argument
Ddmarx.h56 void rkisp_dmarx_isr(u32 mis_val, struct rkisp_device *dev);
57 void rkisp2_rawrd_isr(u32 mis_val, struct rkisp_device *dev);
/device/soc/rockchip/common/vendor/drivers/media/platform/rockchip/ispp/
Dhw.c171 unsigned int mis_val; in irq_hdl() local
174 mis_val = readl(base + RKISPP_CTRL_INT_STA); in irq_hdl()
175 writel(mis_val, base + RKISPP_CTRL_INT_CLR); in irq_hdl()
178 if (IS_ENABLED(CONFIG_VIDEO_ROCKCHIP_ISPP_FEC) && (mis_val & FEC_INT)) { in irq_hdl()
179 mis_val &= ~FEC_INT; in irq_hdl()
183 if (mis_val) { in irq_hdl()
184 ispp->irq_hdl(mis_val, ispp); in irq_hdl()
Dstream.c333 dev->stream_vdev.stream_ops->check_to_force_update(dev, dev->mis_val); in irq_work()
1741 void rkispp_isr(u32 mis_val, struct rkispp_device *dev) in rkispp_isr() argument
1749 v4l2_dbg(3, rkispp_debug, &dev->v4l2_dev, "isr:0x%x\n", mis_val); in rkispp_isr()
1753 if (mis_val & (tnr_err | nr_err)) { in rkispp_isr()
1754 if (mis_val & tnr_err) { in rkispp_isr()
1757 if (mis_val & nr_err) { in rkispp_isr()
1761 v4l2_err(&dev->v4l2_dev, "ispp err:0x%x, seq:%d\n", mis_val, dev->ispp_sdev.frm_sync_seq); in rkispp_isr()
1764 if (mis_val & TNR_INT) { in rkispp_isr()
1773 if (mis_val & NR_INT) { in rkispp_isr()
1782 if (mis_val & FEC_INT) { in rkispp_isr()
[all …]
Ddev.h61 u32 mis_val; member
/device/soc/rockchip/rk3588/kernel/drivers/media/platform/rockchip/ispp/
Dhw.c181 unsigned int mis_val; in irq_hdl() local
184 mis_val = readl(base + RKISPP_CTRL_INT_STA); in irq_hdl()
185 writel(mis_val, base + RKISPP_CTRL_INT_CLR); in irq_hdl()
188 if (IS_ENABLED(CONFIG_VIDEO_ROCKCHIP_ISPP_FEC) && mis_val & FEC_INT) { in irq_hdl()
189 mis_val &= ~FEC_INT; in irq_hdl()
193 if (mis_val) in irq_hdl()
194 ispp->irq_hdl(mis_val, ispp); in irq_hdl()
Dstream.c321 dev->stream_vdev.stream_ops->check_to_force_update(dev, dev->mis_val); in irq_work()
1817 void rkispp_isr(u32 mis_val, struct rkispp_device *dev) in rkispp_isr() argument
1828 "isr:0x%x\n", mis_val); in rkispp_isr()
1832 if (mis_val & (tnr_err | nr_err)) { in rkispp_isr()
1833 if (mis_val & tnr_err) in rkispp_isr()
1835 if (mis_val & nr_err) in rkispp_isr()
1840 mis_val, dev->ispp_sdev.frm_sync_seq); in rkispp_isr()
1843 if (mis_val & TNR_INT) { in rkispp_isr()
1851 if (mis_val & NR_INT) { in rkispp_isr()
1859 if (mis_val & FEC_INT) { in rkispp_isr()
[all …]
Ddev.h54 u32 mis_val; member
Dstream.h213 void (*check_to_force_update)(struct rkispp_device *dev, u32 mis_val);
254 void rkispp_isr(u32 mis_val, struct rkispp_device *dev);
/device/board/isoftstone/yangfan/kernel/src/driv/media/ispp/
Dhw.c181 unsigned int mis_val; in irq_hdl() local
184 mis_val = readl(base + RKISPP_CTRL_INT_STA); in irq_hdl()
185 writel(mis_val, base + RKISPP_CTRL_INT_CLR); in irq_hdl()
188 if (IS_ENABLED(CONFIG_VIDEO_ROCKCHIP_ISPP_FEC) && mis_val & FEC_INT) { in irq_hdl()
189 mis_val &= ~FEC_INT; in irq_hdl()
193 if (mis_val) in irq_hdl()
194 ispp->irq_hdl(mis_val, ispp); in irq_hdl()
Dstream.c321 dev->stream_vdev.stream_ops->check_to_force_update(dev, dev->mis_val); in irq_work()
1817 void rkispp_isr(u32 mis_val, struct rkispp_device *dev) in rkispp_isr() argument
1828 "isr:0x%x\n", mis_val); in rkispp_isr()
1832 if (mis_val & (tnr_err | nr_err)) { in rkispp_isr()
1833 if (mis_val & tnr_err) in rkispp_isr()
1835 if (mis_val & nr_err) in rkispp_isr()
1840 mis_val, dev->ispp_sdev.frm_sync_seq); in rkispp_isr()
1843 if (mis_val & TNR_INT) { in rkispp_isr()
1851 if (mis_val & NR_INT) { in rkispp_isr()
1859 if (mis_val & FEC_INT) { in rkispp_isr()
[all …]
Ddev.h54 u32 mis_val; member

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