Searched refs:mode_cfg (Results 1 – 8 of 8) sorted by relevance
439 hi_nv_ftm_upg_wait_mode mode_cfg = {0}; in upg_check_clear_wait_mode() local440 hi_u32 ret = upg_get_wait_mode_nv(&mode_cfg); in upg_check_clear_wait_mode()445 if ((mode_cfg.trans_finish_flag == HI_TRUE) || (mode_cfg.is_upg_process == HI_TRUE)) { in upg_check_clear_wait_mode()446 ret = upg_clear_wait_mode(&mode_cfg); in upg_check_clear_wait_mode()1528 hi_nv_ftm_upg_wait_mode mode_cfg = {0}; in upg_check_transmit_finish_flag() local1530 ret = upg_get_wait_mode_nv(&mode_cfg); in upg_check_transmit_finish_flag()1536 if (mode_cfg.trans_finish_flag == HI_TRUE) { in upg_check_transmit_finish_flag()1570 hi_nv_ftm_upg_wait_mode mode_cfg = {0}; in hi_upg_transmit_finish_save_cache() local1596 mode_cfg.boot_version = ctx->common_head.file_version; in hi_upg_transmit_finish_save_cache()1610 mode_cfg.file_addr = ctx->file_addr; in hi_upg_transmit_finish_save_cache()[all …]
1013 u32 mode_cfg; in dw_mipi_dsi_debugfs_write() local1023 mode_cfg = dsi_read(dsi, DSI_VID_MODE_CFG); in dw_mipi_dsi_debugfs_write()1026 mode_cfg |= vpg->mask; in dw_mipi_dsi_debugfs_write()1028 mode_cfg &= ~vpg->mask; in dw_mipi_dsi_debugfs_write()1031 dsi_write(dsi, DSI_VID_MODE_CFG, mode_cfg); in dw_mipi_dsi_debugfs_write()
150 hdmi_phy_mode_cfg mode_cfg; /* TMDS/FRL/tx_ffe */ member
158 phy_cfg.mode_cfg = HDMI_PHY_MODE_CFG_TXFFE; in frl_tx_ffe_set()187 phy_cfg.mode_cfg = HDMI_PHY_MODE_CFG_FRL; in frl_phy_set()526 phy_cfg.mode_cfg = HDMI_FRL_MODE_TMDS; in frl_train_exception()
1332 hdmi_phy_mode_cfg mode_cfg; /* TMDS/FRL/tx_ffe */ member
2873 phy_cfg.mode_cfg = HDMI_PHY_MODE_CFG_TXFFE; in debug_frl_ffe()
2062 phy_cfg.mode_cfg = HDMI_PHY_MODE_CFG_FRL;
336 cfg.mode_cfg = phy_cfg->mode_cfg; in hal_hdmi_phy_set()