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/device/soc/bestechnic/bes2600/liteos_m/sdk/bsp/platform/hal/
Dreg_lcdc.h139 #define LCD_CFG_TVD_SA_Y0(n) (((n) & 0xFFFFFFFF) << 0) argument
144 #define LCD_CFG_TVD_SA_U0(n) (((n) & 0xFFFFFFFF) << 0) argument
149 #define LCD_CFG_TVD_SA_V0(n) (((n) & 0xFFFFFFFF) << 0) argument
154 #define LCD_CFG_TVD_SA_C0(n) (((n) & 0xFFFFFFFF) << 0) argument
159 #define LCD_CFG_TVD_SA_Y1(n) (((n) & 0xFFFFFFFF) << 0) argument
164 #define LCD_CFG_TVD_SA_U1(n) (((n) & 0xFFFFFFFF) << 0) argument
169 #define LCD_CFG_TVD_SA_V1(n) (((n) & 0xFFFFFFFF) << 0) argument
174 #define LCD_CFG_TVD_SA_C1(n) (((n) & 0xFFFFFFFF) << 0) argument
179 #define LCD_CFG_TVD_PITCH_Y(n) (((n) & 0xFFFF) << 0) argument
182 #define LCD_CFG_TVD_PITCH_C(n) (((n) & 0xFFFF) << 16) argument
[all …]
Dreg_psram_mc_v2.h110 #define PSRAM_ULP_MC_CHIP_CA_PATTERN(n) (((n) & 0x7) << 3) argument
117 #define PSRAM_ULP_MC_DTR_MODE(n) (((n) & 0x7) << 10) argument
125 #define PSRAM_ULP_MC_MGR_CMD(n) (((n) & 0xFF) << 0) argument
130 #define PSRAM_ULP_MC_MGR_ADDR(n) (((n) & 0xFFFFFFFF) << 0) argument
135 #define PSRAM_ULP_MC_MGR_LEN(n) (((n) & 0xFF) << 0) argument
141 #define PSRAM_ULP_MC_MGR_WSTRB(n) (((n) & 0xFF) << 0) argument
146 #define PSRAM_ULP_MC_MGR_TX_FIFO(n) (((n) & 0xFFFFFFFF) << 0) argument
151 #define PSRAM_ULP_MC_MGR_RX_FIFO(n) (((n) & 0xFFFFFFFF) << 0) argument
168 #define PSRAM_ULP_MC_RES_7_4_REG24(n) (((n) & 0xF) << 4) argument
171 #define PSRAM_ULP_MC_PD_MR(n) (((n) & 0xFF) << 8) argument
[all …]
Dreg_dsi.h50 #define DSI_R_LANE_NUM(n) (((n) & 0x3) << 0) argument
54 #define DSI_R_LPCD_DLY(n) (((n) & 0x3) << 3) argument
64 #define DSI_R_T_BTA(n) (((n) & 0xF) << 12) argument
67 #define DSI_R_T_LPX(n) (((n) & 0xF) << 16) argument
70 #define DSI_R_CLK_T_LPX(n) (((n) & 0xF) << 20) argument
73 #define DSI_R_CLK_PRE(n) (((n) & 0x3) << 24) argument
76 #define DSI_R_CLK_POST(n) (((n) & 0x3F) << 26) argument
81 #define DSI_R_HS_EXIT_TIME(n) (((n) & 0x3F) << 0) argument
84 #define DSI_R_HS_PRPR_TIME(n) (((n) & 0xF) << 6) argument
87 #define DSI_R_HS_ZERO_TIME(n) (((n) & 0x3F) << 10) argument
[all …]
Dhal_location.h40 #define BOOT_TEXT_SRAM_DEF(n) HAL_SEC_DEF(.boot_text_sram, n) argument
42 #define BOOT_TEXT_FLASH_DEF(n) HAL_SEC_DEF(.boot_text_flash, n) argument
44 #define BOOT_RODATA_SRAM_DEF(n) HAL_SEC_DEF(.boot_rodata_sram, n) argument
46 #define BOOT_RODATA_FLASH_DEF(n) HAL_SEC_DEF(.boot_rodata_flash, n) argument
48 #define BOOT_DATA_DEF(n) HAL_SEC_DEF(.boot_data, n) argument
51 #define BOOT_BSS_DEF(n) HAL_SEC_DEF(.bss.boot_bss, n) argument
54 #define BOOT_BSS_DEF(n) HAL_SEC_DEF(.boot_bss, n)
58 #define SRAM_TEXT_DEF(n) HAL_SEC_DEF(.sram_text, n) argument
60 #define SRAM_DATA_DEF(n) HAL_SEC_DEF(.sram_data, n) argument
62 #define SRAM_STACK_DEF(n) ALIGNED(8) HAL_SEC_LOC(.sram_data, n) argument
[all …]
/device/soc/chipsea/cst85/liteos_m/sdk/bsp/driver/cs1000lite_regs/
Dcs1000Lite_rtc_core.h58 #define CS1000LITE_RTC_CORE_RTC_RG_XTAL32K_COMP_IBIT(n) (((n)&7)<<2) argument
59 #define CS1000LITE_RTC_CORE_RTC_RG_XTAL32K_IBIT(n) (((n)&7)<<5) argument
60 #define CS1000LITE_RTC_CORE_RTC_RG_XTAL32K_AMP_BIT(n) (((n)&7)<<8) argument
61 #define CS1000LITE_RTC_CORE_RTC_RG_XTAL32K_CLK_EN(n) (((n)&7)<<11) argument
62 #define CS1000LITE_RTC_CORE_RTC_RG_POR_CLK32K_FBIT(n) (((n)&7)<<14) argument
63 #define CS1000LITE_RTC_CORE_RTC_RG_XTAL_CAP_STEP(n) (((n)&0x3F)<<17) argument
64 #define CS1000LITE_RTC_CORE_RTC_RG_LPO512K_TEMP_COEF_BIT(n) (((n)&7)<<23) argument
71 #define CS1000LITE_RTC_CORE_RTC_RG_MDLL128K_DIV_BIT(n) (((n)&7)<<1) argument
72 #define CS1000LITE_RTC_CORE_RTC_RG_MDLL128K_FREQ_C_BIT(n) (((n)&15)<<4) argument
73 #define CS1000LITE_RTC_CORE_RTC_RG_MDLL128K_FREQ_F_BIT(n) (((n)&0x3F)<<8) argument
[all …]
Dcs1000Lite_analog_reg.h83 #define CS1000LITE_ANALOG_REG_CFG_USB_CTRL(n) (((n)&0x7FFFFFFF)<<0) argument
89 #define CS1000LITE_ANALOG_REG_CFG_USBPLL_SDM_CLK_SEL(n) (((n)&3)<<2) argument
90 #define CS1000LITE_ANALOG_REG_CFG_USBPLL_SDM_RESETN_DELAY(n) (((n)&0xFF)<<4) argument
91 #define CS1000LITE_ANALOG_REG_CFG_USBPLL_SDM_INTDEC_SEL(n) (((n)&7)<<20) argument
102 #define CS1000LITE_ANALOG_REG_CFG_USBPLL_SDM_FREQ(n) (((n)&0xFFFFFFF)<<0) argument
107 #define CS1000LITE_ANALOG_REG_CFG_USBPLL_SDM_AMP_CT(n) (((n)&7)<<1) argument
108 #define CS1000LITE_ANALOG_REG_CFG_USBPLL_SDM_CYC_CT(n) (((n)&3)<<4) argument
121 #define CS1000LITE_ANALOG_REG_CFG_ANA_USB_HS_CLK_SEL(n) (((n)&3)<<10) argument
122 #define CS1000LITE_ANALOG_REG_CFG_ANA_USB_ISET_SEQ(n) (((n)&7)<<12) argument
124 #define CS1000LITE_ANALOG_REG_CFG_ANA_USB_ISET_OTG(n) (((n)&7)<<16) argument
[all …]
Dcs1000Lite_iomux.h37 #define CS1000LITE_IOMUX_PAD_GPIO_DRV_STRENGTH(n) (((n)&3)<<18) argument
42 #define CS1000LITE_IOMUX_PAD_GPIO_ANA(n) (((n)&15)<<4) argument
43 #define CS1000LITE_IOMUX_PAD_GPIO_SEL(n) (((n)&15)<<0) argument
51 #define CS1000LITE_IOMUX_PAD_GPIO_0_DRV_STRENGTH(n) (((n)&3)<<18) argument
56 #define CS1000LITE_IOMUX_PAD_GPIO_0_ANA(n) (((n)&15)<<4) argument
57 #define CS1000LITE_IOMUX_PAD_GPIO_0_SEL(n) (((n)&15)<<0) argument
74 #define CS1000LITE_IOMUX_PAD_GPIO_1_DRV_STRENGTH(n) (((n)&3)<<18) argument
79 #define CS1000LITE_IOMUX_PAD_GPIO_1_ANA(n) (((n)&15)<<4) argument
80 #define CS1000LITE_IOMUX_PAD_GPIO_1_SEL(n) (((n)&15)<<0) argument
97 #define CS1000LITE_IOMUX_PAD_GPIO_2_DRV_STRENGTH(n) (((n)&3)<<18) argument
[all …]
Dcs1000Lite_sys_ctrl.h70 #define CS1000LITE_SYS_CTRL_CHIP_ID(n) (((n)&0xFFFF)<<0) argument
71 #define CS1000LITE_SYS_CTRL_METAL_ID(n) (((n)&0xFF)<<16) argument
72 #define CS1000LITE_SYS_CTRL_BOND_ID(n) (((n)&0xFF)<<24) argument
86 #define CS1000LITE_SYS_CTRL_CFG_HCLK_MODE(n) (((n)&0xFFFFFFFF)<<0) argument
89 #define CS1000LITE_SYS_CTRL_CFG_OTHERS_CLK_MODE(n) (((n)&0xFFFF)<<0) argument
92 #define CS1000LITE_SYS_CTRL_CFG_HCLK_DIV_DENOM(n) (((n)&0xFF)<<0) argument
96 #define CS1000LITE_SYS_CTRL_CFG_CLK_MSADC_DIV_DENOM(n) (((n)&0xFF)<<0) argument
100 #define CS1000LITE_SYS_CTRL_CFG_MEM_SRAM(n) (((n)&0xFFFF)<<0) argument
103 #define CS1000LITE_SYS_CTRL_CFG_USB_CTRL(n) (((n)&0x7FFFFFFF)<<0) argument
107 #define CS1000LITE_SYS_CTRL_CFG_DET_SDIO_TRIG_CMD_ARGUMENT(n) (((n)&0xFFFFFFFF)<<0) argument
[all …]
/device/soc/bestechnic/bes2600/liteos_m/sdk/bsp/platform/hal/best2003/
Dreg_wfcmu_best2003.h32 #define WLAN_CMU_MANUAL_HCLK_ENABLE(n) (((n) & 0xFFFFFFFF) << 0) argument
37 #define WLAN_CMU_MANUAL_HCLK_DISABLE(n) (((n) & 0xFFFFFFFF) << 0) argument
42 #define WLAN_CMU_MANUAL_PCLK_ENABLE(n) (((n) & 0xFFFFFFFF) << 0) argument
47 #define WLAN_CMU_MANUAL_PCLK_DISABLE(n) (((n) & 0xFFFFFFFF) << 0) argument
52 #define WLAN_CMU_MANUAL_OCLK_ENABLE(n) (((n) & 0xFFFFFFFF) << 0) argument
57 #define WLAN_CMU_MANUAL_OCLK_DISABLE(n) (((n) & 0xFFFFFFFF) << 0) argument
62 #define WLAN_CMU_MANUAL_MCLK_ENABLE(n) (((n) & 0xFFFFFFFF) << 0) argument
67 #define WLAN_CMU_MANUAL_MCLK_DISABLE(n) (((n) & 0xFFFFFFFF) << 0) argument
72 #define WLAN_CMU_MANUAL_YCLK_ENABLE(n) (((n) & 0xFFFFFFFF) << 0) argument
77 #define WLAN_CMU_MANUAL_YCLK_DISABLE(n) (((n) & 0xFFFFFFFF) << 0) argument
[all …]
Dreg_psc_best2003.h111 #define PSC_AON_MCU_RESERVED(n) (((n) & 0x7F) << 1) argument
114 #define PSC_AON_MCU_MAIN_STATE(n) (((n) & 0x3) << 8) argument
117 #define PSC_AON_MCU_POWERDN_STATE(n) (((n) & 0x7) << 10) argument
120 #define PSC_AON_MCU_POWERUP_STATE(n) (((n) & 0x7) << 13) argument
125 #define PSC_AON_MCU_POWERDN_TIMER1(n) (((n) & 0x3F) << 0) argument
128 #define PSC_AON_MCU_POWERDN_TIMER2(n) (((n) & 0x3F) << 6) argument
131 #define PSC_AON_MCU_POWERDN_TIMER3(n) (((n) & 0x3F) << 12) argument
134 #define PSC_AON_MCU_POWERDN_TIMER4(n) (((n) & 0x3F) << 18) argument
137 #define PSC_AON_MCU_POWERDN_TIMER5(n) (((n) & 0xFF) << 24) argument
142 #define PSC_AON_MCU_POWERUP_TIMER1(n) (((n) & 0x3F) << 0) argument
[all …]
Dreg_iomux_best2003.h62 #define IOMUX_32_H00001300(n) (((n) & 0xFFFFFFFF) << 0) argument
67 #define IOMUX_GPIO_P00_SEL(n) (((n) & 0xF) << 0) argument
70 #define IOMUX_GPIO_P01_SEL(n) (((n) & 0xF) << 4) argument
73 #define IOMUX_GPIO_P02_SEL(n) (((n) & 0xF) << 8) argument
76 #define IOMUX_GPIO_P03_SEL(n) (((n) & 0xF) << 12) argument
79 #define IOMUX_GPIO_P04_SEL(n) (((n) & 0xF) << 16) argument
82 #define IOMUX_GPIO_P05_SEL(n) (((n) & 0xF) << 20) argument
85 #define IOMUX_GPIO_P06_SEL(n) (((n) & 0xF) << 24) argument
88 #define IOMUX_GPIO_P07_SEL(n) (((n) & 0xF) << 28) argument
93 #define IOMUX_GPIO_P10_SEL(n) (((n) & 0xF) << 0) argument
[all …]
Dreg_cmu_best2003.h130 #define CMU_MANUAL_HCLK_ENABLE(n) (((n) & 0xFFFFFFFF) << 0) argument
135 #define CMU_MANUAL_HCLK_DISABLE(n) (((n) & 0xFFFFFFFF) << 0) argument
140 #define CMU_MANUAL_PCLK_ENABLE(n) (((n) & 0xFFFFFFFF) << 0) argument
145 #define CMU_MANUAL_PCLK_DISABLE(n) (((n) & 0xFFFFFFFF) << 0) argument
150 #define CMU_MANUAL_OCLK_ENABLE(n) (((n) & 0xFFFFFFFF) << 0) argument
155 #define CMU_MANUAL_OCLK_DISABLE(n) (((n) & 0xFFFFFFFF) << 0) argument
160 #define CMU_MODE_HCLK(n) (((n) & 0xFFFFFFFF) << 0) argument
165 #define CMU_MODE_PCLK(n) (((n) & 0xFFFFFFFF) << 0) argument
170 #define CMU_MODE_OCLK(n) (((n) & 0xFFFFFFFF) << 0) argument
175 #define CMU_HRESETN_PULSE(n) (((n) & 0xFFFFFFFF) << 0) argument
[all …]
Dreg_aoncmu_best2003.h73 #define AON_CMU_CHIP_ID(n) (((n) & 0xFFFF) << 0) argument
76 #define AON_CMU_REVISION_ID(n) (((n) & 0xFFFF) << 16) argument
144 #define AON_CMU_ARESETN_PULSE(n) (((n) & 0xFFFFFFFF) << 0) argument
147 #define AON_CMU_ORESETN_PULSE(n) (((n) & 0xFFFFFFFF) << AON_ARST_NUM) argument
152 #define AON_CMU_ARESETN_SET(n) (((n) & 0xFFFFFFFF) << 0) argument
155 #define AON_CMU_ORESETN_SET(n) (((n) & 0xFFFFFFFF) << AON_ARST_NUM) argument
160 #define AON_CMU_ARESETN_CLR(n) (((n) & 0xFFFFFFFF) << 0) argument
163 #define AON_CMU_ORESETN_CLR(n) (((n) & 0xFFFFFFFF) << AON_ARST_NUM) argument
169 #define AON_CMU_CFG_DIV_BTSYS(n) (((n) & 0x3) << 1) argument
175 #define AON_CMU_CFG_DIV_USB(n) (((n) & 0x7) << 6) argument
[all …]
/device/soc/chipsea/cst85/liteos_m/sdk/bsp/driver/cs1000aud_regs/
Dcs1000Aud_rtc_core.h65 #define CS1000AUD_RTC_CORE_RTC_RG_XTAL_CAP_LP_BIT(n) (((n)&31)<<0) argument
66 #define CS1000AUD_RTC_CORE_RTC_RG_XTAL_CAP_NOR_DELTA(n) (((n)&0x3F)<<5) argument
67 #define CS1000AUD_RTC_CORE_RTC_RG_XTAL_CAP_NOR_BIT(n) (((n)&31)<<11) argument
68 #define CS1000AUD_RTC_CORE_RTC_RG_XTAL_CAP_STEP(n) (((n)&0x3F)<<16) argument
69 #define CS1000AUD_RTC_CORE_RTC_RG_LPO256K_TEMP_COEF_BIT(n) (((n)&15)<<22) argument
73 #define CS1000AUD_RTC_CORE_RTC_RG_POR_CLK32K_FBIT(n) (((n)&7)<<29) argument
76 #define CS1000AUD_RTC_CORE_RTC_RG_BG_TRIM(n) (((n)&7)<<0) argument
81 #define CS1000AUD_RTC_CORE_RTC_RG_XTAL_CAP_LP_DELTA(n) (((n)&0x3F)<<7) argument
82 #define CS1000AUD_RTC_CORE_RTC_RG_XTAL_CAP_RF_ON_DELTA(n) (((n)&0x3F)<<13) argument
83 #define CS1000AUD_RTC_CORE_RTC_RG_XTAL_CAP_RF_ON_BIT(n) (((n)&31)<<19) argument
[all …]
Dcs1000Aud_iomux.h37 #define CS1000AUD_IOMUX_PAD_GPIO_DRV_STRENGTH(n) (((n)&3)<<18) argument
42 #define CS1000AUD_IOMUX_PAD_GPIO_ANA(n) (((n)&15)<<4) argument
43 #define CS1000AUD_IOMUX_PAD_GPIO_SEL(n) (((n)&15)<<0) argument
51 #define CS1000AUD_IOMUX_PAD_GPIO_0_DRV_STRENGTH(n) (((n)&3)<<18) argument
56 #define CS1000AUD_IOMUX_PAD_GPIO_0_ANA(n) (((n)&15)<<4) argument
57 #define CS1000AUD_IOMUX_PAD_GPIO_0_SEL(n) (((n)&15)<<0) argument
69 #define CS1000AUD_IOMUX_PAD_GPIO_1_DRV_STRENGTH(n) (((n)&3)<<18) argument
74 #define CS1000AUD_IOMUX_PAD_GPIO_1_ANA(n) (((n)&15)<<4) argument
75 #define CS1000AUD_IOMUX_PAD_GPIO_1_SEL(n) (((n)&15)<<0) argument
87 #define CS1000AUD_IOMUX_PAD_GPIO_2_DRV_STRENGTH(n) (((n)&3)<<18) argument
[all …]
Dcs1000Aud_analog_reg.h75 #define CS1000AUD_ANALOG_REG_CFG_ANA_TOUCH_CHOP_EN(n) (((n)&3)<<1) argument
77 #define CS1000AUD_ANALOG_REG_CFG_ANA_TOUCH_CDC_MODE(n) (((n)&3)<<4) argument
80 #define CS1000AUD_ANALOG_REG_CFG_ANA_TOUCH_REFV1_BIT(n) (((n)&3)<<8) argument
81 #define CS1000AUD_ANALOG_REG_CFG_ANA_TOUCH_PU_BIT(n) (((n)&3)<<10) argument
82 #define CS1000AUD_ANALOG_REG_CFG_ANA_TOUCH_REFV_BIT(n) (((n)&7)<<12) argument
83 #define CS1000AUD_ANALOG_REG_CFG_ANA_TOUCH_REFC_BIT(n) (((n)&7)<<16) argument
84 #define CS1000AUD_ANALOG_REG_CFG_ANA_TOUCH_IBIT(n) (((n)&7)<<20) argument
85 #define CS1000AUD_ANALOG_REG_CFG_ANA_TOUCH_IOS_BIT(n) (((n)&7)<<24) argument
88 #define CS1000AUD_ANALOG_REG_CFG_ANA_DCDC_RF_VBIT_OFFSET(n) (((n)&15)<<0) argument
89 #define CS1000AUD_ANALOG_REG_CFG_ANA_DCDC_RF_FBIT(n) (((n)&3)<<4) argument
[all …]
Dcs1000Aud_sys_ctrl.h55 #define CS1000AUD_SYS_CTRL_CHIP_ID(n) (((n)&0xFFFF)<<0) argument
56 #define CS1000AUD_SYS_CTRL_METAL_ID(n) (((n)&0xFF)<<16) argument
57 #define CS1000AUD_SYS_CTRL_BOND_ID(n) (((n)&15)<<24) argument
58 #define CS1000AUD_SYS_CTRL_REV_ID(n) (((n)&15)<<28) argument
68 #define CS1000AUD_SYS_CTRL_CFG_PCLK_MODE(n) (((n)&0xFFFFFFFF)<<0) argument
71 #define CS1000AUD_SYS_CTRL_CFG_OTHERS_CLK_MODE(n) (((n)&0xFFFF)<<0) argument
74 #define CS1000AUD_SYS_CTRL_CFG_PCLK_DIV_DENOM(n) (((n)&0xFF)<<0) argument
78 #define CS1000AUD_SYS_CTRL_CFG_CLK_MSADC_DIV_DENOM(n) (((n)&0xFF)<<0) argument
82 #define CS1000AUD_SYS_CTRL_CFG_CLK_TOUCH_DIV_MODE(n) (((n)&3)<<0) argument
85 #define CS1000AUD_SYS_CTRL_CFG_DCDC_REF_CLK_DIV_DENOM(n) (((n)&0xFF)<<0) argument
[all …]
/device/soc/esp/esp32/components/bootloader/subproject/components/micro-ecc/micro-ecc/
Dasm_avr_mult_square.inc7 "adiw r30, 10 \n\t" \
8 "adiw r28, 10 \n\t" \
9 "ld r2, x+ \n\t" \
10 "ld r3, x+ \n\t" \
11 "ld r4, x+ \n\t" \
12 "ld r5, x+ \n\t" \
13 "ld r6, x+ \n\t" \
14 "ld r7, x+ \n\t" \
15 "ld r8, x+ \n\t" \
16 "ld r9, x+ \n\t" \
[all …]
Dasm_arm_mult_square.inc7 "push {r3} \n\t" \
8 "add r0, 12 \n\t" \
9 "add r2, 12 \n\t" \
10 "ldmia r1!, {r3,r4} \n\t" \
11 "ldmia r2!, {r6,r7} \n\t" \
13 "umull r11, r12, r3, r6 \n\t" \
14 "stmia r0!, {r11} \n\t" \
16 "mov r10, #0 \n\t" \
17 "umull r11, r9, r3, r7 \n\t" \
18 "adds r12, r12, r11 \n\t" \
[all …]
Dasm_arm_mult_square_umaal.inc7 "push {r3} \n\t" \
8 "ldmia r2!, {r3, r4, r5, r6, r7} \n\t" \
9 "push {r2} \n\t" \
11 "ldr r2, [r1], #4 \n\t" \
12 "umull r8, r9, r3, r2 \n\t" \
13 "str r8, [r0], #4 \n\t" \
14 "mov r10, #0 \n\t" \
15 "umaal r9, r10, r4, r2 \n\t" \
16 "mov r11, #0 \n\t" \
17 "umaal r10, r11, r5, r2 \n\t" \
[all …]
/device/board/isoftstone/zhiyuan/kernel/hdf/driver/audio/dai/include/
Dt507_dai_ahub_impl_linux.h31 #define SUNXI_AHUB_APBIF_TX_CTL(n) (0x10 + ((n) * 0x30)) argument
32 #define SUNXI_AHUB_APBIF_TX_IRQ_CTL(n) (0x14 + ((n) * 0x30)) argument
33 #define SUNXI_AHUB_APBIF_TX_IRQ_STA(n) (0x18 + ((n) * 0x30)) argument
35 #define SUNXI_AHUB_APBIF_TXFIFO_CTL(n) (0x20 + ((n) * 0x30)) argument
36 #define SUNXI_AHUB_APBIF_TXFIFO_STA(n) (0x24 + ((n) * 0x30)) argument
38 #define SUNXI_AHUB_APBIF_TXFIFO(n) (0x30 + ((n) * 0x30)) argument
39 #define SUNXI_AHUB_APBIF_TXFIFO_CNT(n) (0x34 + ((n) * 0x30)) argument
41 #define SUNXI_AHUB_APBIF_RX_CTL(n) (0x100 + ((n) * 0x30)) argument
42 #define SUNXI_AHUB_APBIF_RX_IRQ_CTL(n) (0x104 + ((n) * 0x30)) argument
43 #define SUNXI_AHUB_APBIF_RX_IRQ_STA(n) (0x108 + ((n) * 0x30)) argument
[all …]
/device/soc/rockchip/common/hardware/mpp/include/
Dmpp_hash.h80 static inline void _hlist_del(struct hlist_node *n) in _hlist_del() argument
82 struct hlist_node *next = n->next; in _hlist_del()
83 struct hlist_node **pprev = n->pprev; in _hlist_del()
91 static inline void hlist_del(struct hlist_node *n) in hlist_del() argument
93 _hlist_del(n); in hlist_del()
94 n->next = (struct hlist_node *)LIST_POISON1; in hlist_del()
95 n->pprev = (struct hlist_node **)LIST_POISON2; in hlist_del()
98 static inline void hlist_del_init(struct hlist_node *n) in hlist_del_init() argument
100 if (!hlist_unhashed(n)) { in hlist_del_init()
101 _hlist_del(n); in hlist_del_init()
[all …]
/device/soc/rockchip/rk3568/hardware/mpp/include/
Dmpp_hash.h78 static inline void __hlist_del(struct hlist_node *n) in __hlist_del() argument
80 struct hlist_node *next = n->next; in __hlist_del()
81 struct hlist_node **pprev = n->pprev; in __hlist_del()
89 static inline void hlist_del(struct hlist_node *n) in hlist_del() argument
91 __hlist_del(n); in hlist_del()
92 n->next = (struct hlist_node*)LIST_POISON1; in hlist_del()
93 n->pprev = (struct hlist_node**)LIST_POISON2; in hlist_del()
96 static inline void hlist_del_init(struct hlist_node *n) in hlist_del_init() argument
98 if (!hlist_unhashed(n)) { in hlist_del_init()
99 __hlist_del(n); in hlist_del_init()
[all …]
/device/soc/rockchip/rk3399/hardware/mpp/include/
Dmpp_hash.h78 static inline void _hlist_del(struct hlist_node *n) in _hlist_del() argument
80 struct hlist_node *next = n->next; in _hlist_del()
81 struct hlist_node **pprev = n->pprev; in _hlist_del()
89 static inline void hlist_del(struct hlist_node *n) in hlist_del() argument
91 _hlist_del(n); in hlist_del()
92 n->next = (struct hlist_node*)LIST_POISON1; in hlist_del()
93 n->pprev = (struct hlist_node**)LIST_POISON2; in hlist_del()
96 static inline void hlist_del_init(struct hlist_node *n) in hlist_del_init() argument
98 if (!hlist_unhashed(n)) { in hlist_del_init()
99 _hlist_del(n); in hlist_del_init()
[all …]
/device/soc/rockchip/rk3588/hardware/mpp/include/
Dmpp_hash.h80 static inline void __hlist_del(struct hlist_node *n) in __hlist_del() argument
82 struct hlist_node *next = n->next; in __hlist_del()
83 struct hlist_node **pprev = n->pprev; in __hlist_del()
90 static inline void hlist_del(struct hlist_node *n) in hlist_del() argument
92 __hlist_del(n); in hlist_del()
93 n->next = (struct hlist_node*)LIST_POISON1; in hlist_del()
94 n->pprev = (struct hlist_node**)LIST_POISON2; in hlist_del()
97 static inline void hlist_del_init(struct hlist_node *n) in hlist_del_init() argument
99 if (!hlist_unhashed(n)) { in hlist_del_init()
100 __hlist_del(n); in hlist_del_init()
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