| /device/board/isoftstone/zhiyuan/kernel/driver/drivers/drm/sunxi_device/ |
| D | sunxi_de.h | 23 bool (*is_support_tcon)(int nr, int tcon_id);
24 unsigned long (*get_freq)(int nr);
26 int (*get_layer_count)(int nr);
27 int (*get_vi_layer_count)(int nr);
28 int (*get_ui_layer_count)(int nr);
29 int (*get_layer_channel_id)(int nr, int layer_id);
30 int (*get_layer_id_within_chanel)(int nr, int top_layer_id);
31 int (*get_layer_formats)(int nr, unsigned int layer_id,
34 int (*single_layer_apply)(int nr, struct disp_layer_config_data *data);
35 int (*multi_layers_apply)(int nr, struct disp_layer_config_data *data,
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| D | sunxi_de.c | 114 static struct sunxi_de *sunxi_de_get_de(int nr) in sunxi_de_get_de() argument
116 return &de_drv->hwde[nr]; in sunxi_de_get_de()
126 struct sunxi_de_funcs *sunxi_de_get_funcs(int nr) in sunxi_de_get_funcs() argument
128 struct sunxi_de *hwde = sunxi_de_get_de(nr); in sunxi_de_get_funcs()
173 static unsigned long sunxi_de_get_freq(int nr) in sunxi_de_get_freq() argument
178 static int sunxi_de_get_layer_count(int nr) in sunxi_de_get_layer_count() argument
180 struct sunxi_de *hwde = sunxi_de_get_de(nr); in sunxi_de_get_layer_count()
186 static int sunxi_de_get_vi_layer_count(int nr) in sunxi_de_get_vi_layer_count() argument
188 struct sunxi_de *hwde = sunxi_de_get_de(nr); in sunxi_de_get_vi_layer_count()
193 static int sunxi_de_get_ui_layer_count(int nr) in sunxi_de_get_ui_layer_count() argument
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| D | sunxi_de_v33x.c | 118 static struct sunxi_de *sunxi_de_get_de(int nr) in sunxi_de_get_de() argument
120 return &de_drv->hwde[nr]; in sunxi_de_get_de()
130 struct sunxi_de_funcs *sunxi_de_get_funcs(int nr) in sunxi_de_get_funcs() argument
132 struct sunxi_de *hwde = sunxi_de_get_de(nr); in sunxi_de_get_funcs()
184 static unsigned long sunxi_de_get_freq(int nr) in sunxi_de_get_freq() argument
189 static int sunxi_de_get_layer_count(int nr) in sunxi_de_get_layer_count() argument
191 struct sunxi_de *hwde = sunxi_de_get_de(nr); in sunxi_de_get_layer_count()
197 static int sunxi_de_get_vi_layer_count(int nr) in sunxi_de_get_vi_layer_count() argument
199 struct sunxi_de *hwde = sunxi_de_get_de(nr); in sunxi_de_get_vi_layer_count()
204 static int sunxi_de_get_ui_layer_count(int nr) in sunxi_de_get_ui_layer_count() argument
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| D | sunxi_tcon.c | 59 struct sunxi_tcon *sunxi_tcon_get_tcon(int nr) in sunxi_tcon_get_tcon() argument
61 return &tcon_drv->hwtcon[nr]; in sunxi_tcon_get_tcon()
79 int sunxi_tcon_lcd_enable(int nr, int lcd_id) in sunxi_tcon_lcd_enable() argument
90 tcon0_open(nr, panel); in sunxi_tcon_lcd_enable()
96 && nr + 1 < DEVICE_DSI_NUM) in sunxi_tcon_lcd_enable()
103 int sunxi_tcon_lcd_disable(int nr, int lcd_id) in sunxi_tcon_lcd_disable() argument
115 lvds_close(nr); in sunxi_tcon_lcd_disable()
119 nr + 1 < DEVICE_DSI_NUM) in sunxi_tcon_lcd_disable()
122 tcon0_close(nr); in sunxi_tcon_lcd_disable()
127 static int sunxi_tcon_lcd_query_irq(int nr) in sunxi_tcon_lcd_query_irq() argument
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| D | sunxi_tcon_v33x.c | 52 struct sunxi_tcon *sunxi_tcon_get_tcon(int nr) in sunxi_tcon_get_tcon() argument
54 return &tcon_drv->hwtcon[nr]; in sunxi_tcon_get_tcon()
82 int sunxi_tcon_lcd_enable(int nr, int lcd_id) in sunxi_tcon_lcd_enable() argument
93 tcon0_open(nr, panel); in sunxi_tcon_lcd_enable()
100 && nr + 1 < DEVICE_DSI_NUM) in sunxi_tcon_lcd_enable()
108 int sunxi_tcon_lcd_disable(int nr, int lcd_id) in sunxi_tcon_lcd_disable() argument
120 lvds_close(nr); in sunxi_tcon_lcd_disable()
125 nr + 1 < DEVICE_DSI_NUM) in sunxi_tcon_lcd_disable()
129 tcon0_close(nr); in sunxi_tcon_lcd_disable()
134 static int sunxi_tcon_lcd_query_irq(int nr) in sunxi_tcon_lcd_query_irq() argument
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| D | sunxi_tcon.h | 109 int sunxi_tcon_lcd_enable(int nr, int lcd_id);
110 int sunxi_tcon_lcd_disable(int nr, int lcd_id);
123 int sunxi_tcon_query_irq(int nr);
125 bool sunxi_tcon_sync_time_is_enough(unsigned int nr);
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| /device/soc/hisilicon/hi3751v350/sdk_linux/source/common/drv/include/ |
| D | osal_ioctl.h | 65 #define _IOC(dir, type, nr, size) \ argument
68 ((nr) << _IOC_NRSHIFT) | \
86 #define _IO(type,nr) _IOC(_IOC_NONE,(type),(nr),0) argument
87 #define _IOR(type,nr,size) _IOC(_IOC_READ,(type),(nr),(_IOC_TYPECHECK(size))) argument
88 #define _IOW(type,nr,size) _IOC(_IOC_WRITE,(type),(nr),(_IOC_TYPECHECK(size))) argument
89 #define _IOWR(type,nr,size) _IOC(_IOC_READ|_IOC_WRITE,(type),(nr),(_IOC_TYPECHECK(size))) argument
90 #define _IOR_BAD(type,nr,size) _IOC(_IOC_READ,(type),(nr),sizeof(size)) argument
91 #define _IOW_BAD(type,nr,size) _IOC(_IOC_WRITE,(type),(nr),sizeof(size)) argument
92 #define _IOWR_BAD(type,nr,size) _IOC(_IOC_READ|_IOC_WRITE,(type),(nr),sizeof(size)) argument
95 #define _IOC_DIR(nr) (((nr) >> _IOC_DIRSHIFT) & _IOC_DIRMASK) argument
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| /device/soc/hisilicon/hi3516dv300/sdk_linux/include/ |
| D | osal_ioctl.h | 96 #define _IOC(dir, type, nr, size) \ argument
99 ((nr) << _IOC_NRSHIFT) | \
117 #define _IO(type, nr) _IOC(_IOC_NONE, (type), (nr), 0) argument
121 #define _IOR(type, nr, size) _IOC(_IOC_READ, (type), (nr), (_IOC_TYPECHECK(size))) argument
125 #define _IOW(type, nr, size) _IOC(_IOC_WRITE, (type), (nr), (_IOC_TYPECHECK(size))) argument
129 #define _IOWR(type, nr, size) _IOC(_IOC_READ | _IOC_WRITE, (type), (nr), (_IOC_TYPECHECK(size))) argument
133 #define _IOR_BAD(type, nr, size) _IOC(_IOC_READ, (type), (nr), sizeof(size)) argument
137 #define _IOW_BAD(type, nr, size) _IOC(_IOC_WRITE, (type), (nr), sizeof(size)) argument
141 #define _IOWR_BAD(type, nr, size) _IOC(_IOC_READ | _IOC_WRITE, (type), (nr), sizeof(size)) argument
147 #define _IOC_DIR(nr) (((nr) >> _IOC_DIRSHIFT) & _IOC_DIRMASK) argument
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| /device/soc/hisilicon/hi3516dv300/sdk_liteos/include/ |
| D | osal_ioctl.h | 96 #define _IOC(dir, type, nr, size) \ argument
99 ((nr) << _IOC_NRSHIFT) | \
117 #define _IO(type, nr) _IOC(_IOC_NONE, (type), (nr), 0) argument
121 #define _IOR(type, nr, size) _IOC(_IOC_READ, (type), (nr), (_IOC_TYPECHECK(size))) argument
125 #define _IOW(type, nr, size) _IOC(_IOC_WRITE, (type), (nr), (_IOC_TYPECHECK(size))) argument
129 #define _IOWR(type, nr, size) _IOC(_IOC_READ | _IOC_WRITE, (type), (nr), (_IOC_TYPECHECK(size))) argument
133 #define _IOR_BAD(type, nr, size) _IOC(_IOC_READ, (type), (nr), sizeof(size)) argument
137 #define _IOW_BAD(type, nr, size) _IOC(_IOC_WRITE, (type), (nr), sizeof(size)) argument
141 #define _IOWR_BAD(type, nr, size) _IOC(_IOC_READ | _IOC_WRITE, (type), (nr), sizeof(size)) argument
147 #define _IOC_DIR(nr) (((nr) >> _IOC_DIRSHIFT) & _IOC_DIRMASK) argument
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| /device/soc/hisilicon/hi3516dv300/sdk_linux/drv/osal/include/ |
| D | osal_ioctl.h | 99 #define _IOC(dir, type, nr, size) \ argument
102 ((nr) << _IOC_NRSHIFT) | \
120 #define _IO(type, nr) _IOC(_IOC_NONE, (type), (nr), 0) argument
124 #define _IOR(type, nr, size) _IOC(_IOC_READ, (type), (nr), (_IOC_TYPECHECK(size))) argument
128 #define _IOW(type, nr, size) _IOC(_IOC_WRITE, (type), (nr), (_IOC_TYPECHECK(size))) argument
132 #define _IOWR(type, nr, size) _IOC(_IOC_READ | _IOC_WRITE, (type), (nr), (_IOC_TYPECHECK(size))) argument
136 #define _IOR_BAD(type, nr, size) _IOC(_IOC_READ, (type), (nr), sizeof(size)) argument
140 #define _IOW_BAD(type, nr, size) _IOC(_IOC_WRITE, (type), (nr), sizeof(size)) argument
144 #define _IOWR_BAD(type, nr, size) _IOC(_IOC_READ | _IOC_WRITE, (type), (nr), sizeof(size)) argument
150 #define _IOC_DIR(nr) (((nr) >> _IOC_DIRSHIFT) & _IOC_DIRMASK) argument
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| /device/soc/rockchip/common/kernel/drivers/gpu/arm/mali400/mali/common/ |
| D | mali_osk_bitops.h | 91 MALI_STATIC_INLINE void _mali_osk_clear_nonatomic_bit(u32 nr, u32 *addr) in _mali_osk_clear_nonatomic_bit() argument
93 addr += nr >> 5; /* find the correct word */ in _mali_osk_clear_nonatomic_bit()
94 nr = nr & ((1 << 5) - 1); /* The bit number within the word */ in _mali_osk_clear_nonatomic_bit()
96 _mali_internal_clear_bit(nr, addr); in _mali_osk_clear_nonatomic_bit()
104 MALI_STATIC_INLINE void _mali_osk_set_nonatomic_bit(u32 nr, u32 *addr) in _mali_osk_set_nonatomic_bit() argument
106 addr += nr >> 5; /* find the correct word */ in _mali_osk_set_nonatomic_bit()
107 nr = nr & ((1 << 5) - 1); /* The bit number within the word */ in _mali_osk_set_nonatomic_bit()
109 _mali_internal_set_bit(nr, addr); in _mali_osk_set_nonatomic_bit()
119 MALI_STATIC_INLINE u32 _mali_osk_test_bit(u32 nr, u32 *addr) in _mali_osk_test_bit() argument
121 addr += nr >> 5; /* find the correct word */ in _mali_osk_test_bit()
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| /device/soc/rockchip/common/vendor/drivers/gpu/arm/mali400/mali/common/ |
| D | mali_osk_bitops.h | 93 MALI_STATIC_INLINE void _mali_osk_clear_nonatomic_bit(u32 nr, u32 *addr) in _mali_osk_clear_nonatomic_bit() argument
95 addr += nr >> UINT32_BITS_NONATOMICB_BIT; /* find the correct word */ in _mali_osk_clear_nonatomic_bit()
96 nr = nr & ((1 << UINT32_BITS_NONATOMICB_BIT) - 1); /* The bit number within the word */ in _mali_osk_clear_nonatomic_bit()
98 _mali_internal_clear_bit(nr, addr); in _mali_osk_clear_nonatomic_bit()
106 MALI_STATIC_INLINE void _mali_osk_set_nonatomic_bit(u32 nr, u32 *addr) in _mali_osk_set_nonatomic_bit() argument
108 addr += nr >> UINT32_BITS_NONATOMICB_BIT; /* find the correct word */ in _mali_osk_set_nonatomic_bit()
109 nr = nr & ((1 << 5UINT32_BITS_NONATOMICB_BIT) - 1); /* The bit number within the word */ in _mali_osk_set_nonatomic_bit()
111 _mali_internal_set_bit(nr, addr); in _mali_osk_set_nonatomic_bit()
121 MALI_STATIC_INLINE u32 _mali_osk_test_bit(u32 nr, u32 *addr) in _mali_osk_test_bit() argument
123 addr += nr >> UINT32_BITS_NONATOMICB_BIT; /* find the correct word */ in _mali_osk_test_bit()
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| /device/soc/hisilicon/common/platform/wifi/hi3881v100/driver/oal/ |
| D | oal_atomic.h | 75 #define oal_bit_atomic_for_each_set(nr, p_addr, size) for_each_set_bit(nr, p_addr, size) argument
80 #define IS_BIT_SET(nr) (1UL << ((nr) % BITS_PER_LONG)) argument
81 #define BIT_WORD(nr) ((nr) / BITS_PER_LONG) argument
82 #define BITOP_WORD(nr) ((nr) / BITS_PER_LONG) argument
395 static inline hi_void oal_bit_atomic_set(hi_s32 nr, HI_VOLATILE oal_bitops *p_addr) in oal_bit_atomic_set() argument
398 set_bit(nr, p_addr); in oal_bit_atomic_set()
403 const oal_bitops mask = IS_BIT_SET(nr); in oal_bit_atomic_set()
404 oal_bitops *p = ((oal_bitops *)p_addr) + BIT_WORD(nr); in oal_bit_atomic_set()
411 static inline hi_s32 oal_bit_atomic_test(hi_s32 nr, HI_VOLATILE const oal_bitops *p_addr) in oal_bit_atomic_test() argument
414 return test_bit(nr, p_addr); in oal_bit_atomic_test()
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| /device/soc/rockchip/common/vendor/drivers/gpu/arm/midgard/ |
| D | mali_kbase_tlstream.h | 101 void __kbase_tlstream_tl_summary_new_ctx(void *context, u32 nr, u32 tgid);
103 void __kbase_tlstream_tl_summary_new_lpu(void *lpu, u32 nr, u32 fn);
105 void __kbase_tlstream_tl_summary_new_as(void *as, u32 nr);
107 void __kbase_tlstream_tl_new_ctx(void *context, u32 nr, u32 tgid);
108 void __kbase_tlstream_tl_new_atom(void *atom, u32 nr);
182 …ne KBASE_TLSTREAM_TL_SUMMARY_NEW_CTX(context, nr, tgid) __TRACE_IF_ENABLED(tl_summary_new_ctx, con… argument
208 #define KBASE_TLSTREAM_TL_SUMMARY_NEW_LPU(lpu, nr, fn) __TRACE_IF_ENABLED(tl_summary_new_lpu, lpu, … argument
231 #define KBASE_TLSTREAM_TL_SUMMARY_NEW_AS(as, nr) __TRACE_IF_ENABLED(tl_summary_new_as, as, nr) argument
254 #define KBASE_TLSTREAM_TL_NEW_CTX(context, nr, tgid) __TRACE_IF_ENABLED(tl_new_ctx, context, nr, tg… argument
265 #define KBASE_TLSTREAM_TL_NEW_ATOM(atom, nr) __TRACE_IF_ENABLED(tl_new_atom, atom, nr) argument
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| D | mali_kbase_mmu.c | 71 static void kbase_mmu_flush_invalidate(struct kbase_context *kctx, u64 vpfn, size_t nr, bool sync);
526 static void mmu_insert_pages_failure_recovery(struct kbase_context *kctx, u64 vpfn, size_t nr) in mmu_insert_pages_failure_recovery() argument
542 while (nr) { in mmu_insert_pages_failure_recovery()
548 if (count > nr) { in mmu_insert_pages_failure_recovery()
549 count = nr; in mmu_insert_pages_failure_recovery()
566 nr -= count; in mmu_insert_pages_failure_recovery()
577 int kbase_mmu_insert_single_page(struct kbase_context *kctx, u64 vpfn, phys_addr_t phys, size_t nr,… in kbase_mmu_insert_single_page() argument
586 size_t remain = nr; in kbase_mmu_insert_single_page()
595 if (nr == 0) { in kbase_mmu_insert_single_page()
673 kbase_mmu_flush_invalidate(kctx, vpfn, nr, false); in kbase_mmu_insert_single_page()
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| /device/soc/rockchip/common/kernel/drivers/gpu/arm/midgard/ |
| D | mali_kbase_tlstream.h | 109 void __kbase_tlstream_tl_summary_new_ctx(void *context, u32 nr, u32 tgid);
111 void __kbase_tlstream_tl_summary_new_lpu(void *lpu, u32 nr, u32 fn);
113 void __kbase_tlstream_tl_summary_new_as(void *as, u32 nr);
115 void __kbase_tlstream_tl_new_ctx(void *context, u32 nr, u32 tgid);
116 void __kbase_tlstream_tl_new_atom(void *atom, u32 nr);
194 #define KBASE_TLSTREAM_TL_SUMMARY_NEW_CTX(context, nr, tgid) \ argument
195 __TRACE_IF_ENABLED(tl_summary_new_ctx, context, nr, tgid)
221 #define KBASE_TLSTREAM_TL_SUMMARY_NEW_LPU(lpu, nr, fn) \ argument
222 __TRACE_IF_ENABLED(tl_summary_new_lpu, lpu, nr, fn)
246 #define KBASE_TLSTREAM_TL_SUMMARY_NEW_AS(as, nr) \ argument
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| D | mali_kbase_mmu.c | 67 u64 vpfn, size_t nr, bool sync);
564 size_t nr) in mmu_insert_pages_failure_recovery() argument
580 while (nr) { in mmu_insert_pages_failure_recovery()
586 if (count > nr) in mmu_insert_pages_failure_recovery()
587 count = nr; in mmu_insert_pages_failure_recovery()
602 nr -= count; in mmu_insert_pages_failure_recovery()
614 phys_addr_t phys, size_t nr, in kbase_mmu_insert_single_page() argument
624 size_t remain = nr; in kbase_mmu_insert_single_page()
633 if (nr == 0) in kbase_mmu_insert_single_page()
716 kbase_mmu_flush_invalidate(kctx, vpfn, nr, false); in kbase_mmu_insert_single_page()
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| /device/soc/esp/esp32/components/esp_common/include/ |
| D | esp_bit_defs.h | 87 #define BIT(nr) (1UL << (nr)) argument
90 #define BIT64(nr) (1ULL << (nr)) argument
94 #define BIT(nr) (1 << (nr)) argument
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| /device/board/isoftstone/yangfan/kernel/src/driv/media/ispp/ |
| D | stream_v10.c | 71 t = vdev->nr.dbg.timestamp; in rkispp_frame_done_early()
72 seq = vdev->nr.dbg.id; in rkispp_frame_done_early()
404 list = &vdev->nr.list_rd; in nr_free_buf()
405 if (vdev->nr.cur_rd) { in nr_free_buf()
406 list_add_tail(&vdev->nr.cur_rd->list, list); in nr_free_buf()
407 vdev->nr.cur_rd = NULL; in nr_free_buf()
418 list = &vdev->nr.list_wr; in nr_free_buf()
419 if (vdev->nr.cur_wr) in nr_free_buf()
420 vdev->nr.cur_wr = NULL; in nr_free_buf()
424 for (i = 0; i < sizeof(vdev->nr.buf) / in nr_free_buf()
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| /device/soc/rockchip/common/vendor/drivers/gpu/arm/bifrost/mmu/ |
| D | mali_kbase_mmu.c | 70 static void kbase_mmu_flush_invalidate(struct kbase_context *kctx, u64 vpfn, size_t nr, bool sync);
82 static void kbase_mmu_flush_invalidate_no_ctx(struct kbase_device *kbdev, u64 vpfn, size_t nr, bool…
112 …mu_update_pages_no_flush(struct kbase_context *kctx, u64 vpfn, struct tagged_addr *phys, size_t nr,
194 u64 start_pfn, size_t nr, u32 op) in kbase_gpu_mmu_handle_write_faulting_as() argument
199 kbase_mmu_hw_do_operation(kbdev, faulting_as, start_pfn, nr, op, 1); in kbase_gpu_mmu_handle_write_faulting_as()
1101 …se_mmu_insert_single_page(struct kbase_context *kctx, u64 vpfn, struct tagged_addr phys, size_t nr, in kbase_mmu_insert_single_page() argument
1112 size_t remain = nr; in kbase_mmu_insert_single_page()
1126 if (nr == 0) { in kbase_mmu_insert_single_page()
1209 kbase_mmu_flush_invalidate(kctx, start_vpfn, nr, false); in kbase_mmu_insert_single_page()
1214 kbase_mmu_flush_invalidate(kctx, start_vpfn, nr, false); in kbase_mmu_insert_single_page()
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| D | mali_kbase_mmu.h | 107 … struct tagged_addr *phys, size_t nr, unsigned long flags, int group_id);
109 size_t nr, unsigned long flags, int as_nr, int group_id);
110 …se_mmu_insert_single_page(struct kbase_context *kctx, u64 vpfn, struct tagged_addr phys, size_t nr,
113 …wn_pages(struct kbase_device *kbdev, struct kbase_mmu_table *mmut, u64 vpfn, size_t nr, int as_nr);
114 …t kbase_mmu_update_pages(struct kbase_context *kctx, u64 vpfn, struct tagged_addr *phys, size_t nr,
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| /device/soc/rockchip/common/kernel/drivers/gpu/arm/bifrost/mmu/ |
| D | mali_kbase_mmu.c | 148 kbase_mmu_flush_invalidate(struct kbase_context *kctx, u64 vpfn, size_t nr,
164 struct kbase_device *kbdev, u64 vpfn, size_t nr, bool sync, int as_nr,
196 struct tagged_addr *phys, size_t nr,
306 u64 start_pfn, size_t nr, in kbase_gpu_mmu_handle_write_faulting_as() argument
323 .nr = nr, in kbase_gpu_mmu_handle_write_faulting_as()
874 .nr = 0, in kbase_mmu_page_fault_worker()
909 .nr = 0, in kbase_mmu_page_fault_worker()
1017 .nr = new_pages, in kbase_mmu_page_fault_worker()
1369 struct tagged_addr phys, size_t nr, in kbase_mmu_insert_single_page() argument
1381 size_t remain = nr; in kbase_mmu_insert_single_page()
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| D | mali_kbase_mmu.h | 133 struct tagged_addr *phys, size_t nr,
137 struct tagged_addr *phys, size_t nr,
141 struct tagged_addr phys, size_t nr,
147 size_t nr, int as_nr);
149 struct tagged_addr *phys, size_t nr,
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| /device/board/isoftstone/zhiyuan/kernel/driver/drivers/net/wireless/xr829/include/linux/ |
| D | bitops.h | 15 #define BITS_TO_LONGS(nr) DIV_ROUND_UP(nr, BITS_PER_TYPE(long)) argument
225 static __always_inline void assign_bit(long nr, volatile unsigned long *addr, in assign_bit() argument
229 set_bit(nr, addr); in assign_bit()
231 clear_bit(nr, addr); in assign_bit()
234 static __always_inline void __assign_bit(long nr, volatile unsigned long *addr, in __assign_bit() argument
238 __set_bit(nr, addr); in __assign_bit()
240 __clear_bit(nr, addr); in __assign_bit()
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| /device/board/isoftstone/zhiyuan/kernel/driver/include/ |
| D | sunxi-g2d.h | 498 #define SUNXI_G2D_IO(nr) _IO(SUNXI_G2D_IOC_MAGIC, nr) argument
499 #define SUNXI_G2D_IOR(nr, size) _IOR(SUNXI_G2D_IOC_MAGIC, nr, size) argument
500 #define SUNXI_G2D_IOW(nr, size) _IOW(SUNXI_G2D_IOC_MAGIC, nr, size) argument
501 #define SUNXI_G2D_IOWR(nr, size) _IOWR(SUNXI_G2D_IOC_MAGIC, nr, size) argument
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