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Searched refs:portNUM_PROCESSORS (Results 1 – 17 of 17) sorted by relevance

/device/soc/esp/esp32/components/esp_common/src/
Dfreertos_hooks.c32 static esp_freertos_idle_cb_t idle_cb[portNUM_PROCESSORS][MAX_HOOKS]={0};
33 static esp_freertos_tick_cb_t tick_cb[portNUM_PROCESSORS][MAX_HOOKS]={0};
68 if(cpuid >= portNUM_PROCESSORS){
90 if(cpuid >= portNUM_PROCESSORS){
112 if(cpuid >= portNUM_PROCESSORS){
125 for(int m = 0; m < portNUM_PROCESSORS; m++) {
133 if(cpuid >= portNUM_PROCESSORS){
146 for(int m = 0; m < portNUM_PROCESSORS; m++){
Dtask_wdt.c172 for (int x=0; x<portNUM_PROCESSORS; x++) { in task_wdt_isr()
302 for(int i = 0; i < portNUM_PROCESSORS; i++){ in esp_task_wdt_add()
371 for(int i = 0; i < portNUM_PROCESSORS; i++){ in esp_task_wdt_delete()
/device/soc/esp/esp32/components/xtensa/
Dxtensa_intr.c71 n = n * portNUM_PROCESSORS + xPortGetCoreID(); in xt_set_exception_handler()
95 extern xt_handler_table_entry _xt_interrupt_table[XCHAL_NUM_INTERRUPTS*portNUM_PROCESSORS];
109 return (_xt_interrupt_table[intr*portNUM_PROCESSORS+cpu].handler != xt_unhandled_interrupt); in xt_int_has_handler()
129 n = n * portNUM_PROCESSORS + xPortGetCoreID(); in xt_set_interrupt_handler()
155 n = n * portNUM_PROCESSORS + xPortGetCoreID(); in xt_get_interrupt_handler_arg()
Dxtensa_intr_asm.S85 .rept XCHAL_NUM_INTERRUPTS*portNUM_PROCESSORS
118 .rept XCHAL_EXCCAUSE_NUM * portNUM_PROCESSORS
/device/soc/esp/esp32/components/esp32/
Ddport_access.c46 static uint32_t volatile dport_core_state[portNUM_PROCESSORS]; //cpu is already run
49 uint32_t volatile dport_access_start[portNUM_PROCESSORS]; //dport register could be accessed
50 uint32_t volatile dport_access_end[portNUM_PROCESSORS]; //dport register is accessed over
52 static uint32_t volatile dport_access_ref[portNUM_PROCESSORS]; //dport access reference
56 static uint32_t ccount_start[portNUM_PROCESSORS];
57 static uint32_t ccount_end[portNUM_PROCESSORS];
58 static uint32_t ccount_margin[portNUM_PROCESSORS][DPORT_ACCESS_BENCHMARK_STORE_NUM];
Dcrosscore_int.c38 static volatile uint32_t reason[ portNUM_PROCESSORS ];
97 assert(core_id<portNUM_PROCESSORS); in esp_crosscore_int_send()
/device/soc/esp/esp32/components/osal/port/xtensa/
Dport.c85 extern volatile int port_xSchedulerRunning[portNUM_PROCESSORS];
86 unsigned port_interruptNesting[portNUM_PROCESSORS] = {0}; // Interrupt nesting level. Increased/de…
87 BaseType_t port_uxCriticalNesting[portNUM_PROCESSORS] = {0};
88 BaseType_t port_uxOldInterruptState[portNUM_PROCESSORS] = {0};
Dportasm.S44 ….space configISR_STACK_SIZE*portNUM_PROCESSORS /* This allocates stacks for each individual …
48 .space portNUM_PROCESSORS*4 /* One flag for each individual CPU. */
Dxtensa_vectors.S144 #if (portNUM_PROCESSORS == 1)
146 #elif (portNUM_PROCESSORS == 2)
152 movi \scratch,portNUM_PROCESSORS
845 .space (XCHAL_CP_MAX * portNUM_PROCESSORS) << 2
Dxtensa_context.S368 addi a3, a2, (XCHAL_CP_MAX*portNUM_PROCESSORS) << 2 /* a3 = top+1 of owner array */
/device/soc/esp/esp32/components/osal/port/xtensa/include/esp_osal/
Dosal_config.h28 #define portNUM_PROCESSORS 2 macro
30 #define portNUM_PROCESSORS 1 macro
/device/soc/esp/esp32/components/bt/common/include/
Dbt_user_config.h44 …_PINNED_TO_CORE (CONFIG_BT_BLUEDROID_PINNED_TO_CORE < portNUM_PROCESSORS ? CONFIG_BT_…
/device/soc/esp/esp32/components/esp_system/port/soc/esp32/
Ddport_panic_highint_hdl.S42 ….space L4_INTR_STACK_SIZE*portNUM_PROCESSORS /* This allocates stacks for each individual CPU…
/device/soc/esp/esp32/components/esp_wifi/esp32/
Desp_adapter.c388 …task_func, name, stack_depth, param, prio, task_handle, (core_id < portNUM_PROCESSORS ? core_id : … in task_create_pinned_to_core_wrapper()
/device/soc/esp/esp32/components/spi_flash/
Dcache_utils.c361 #if portNUM_PROCESSORS == 2 in spi_flash_cache_enabled()
/device/soc/esp/esp32/components/bt/controller/esp32/
Dbt.c777 …task_func, name, stack_depth, param, prio, task_handle, (core_id < portNUM_PROCESSORS ? core_id : … in task_create_wrapper()
/device/soc/esp/esp32/components/pthread/
Dpthread.c264 if (pthread_cfg->pin_to_core >= 0 && pthread_cfg->pin_to_core < portNUM_PROCESSORS) {