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Searched refs:qsz (Results 1 – 12 of 12) sorted by relevance

/device/qemu/riscv32_virt/liteos_m/board/driver/
Dvirtmmio.c61 unsigned VirtqSize(uint16_t qsz) in VirtqSize() argument
65 ALIGN(sizeof(struct VirtqDesc) * qsz, VIRTQ_ALIGN_AVAIL) + in VirtqSize()
66 ALIGN(sizeof(struct VirtqAvail) + sizeof(uint16_t) * qsz, VIRTQ_ALIGN_USED) + in VirtqSize()
67 sizeof(struct VirtqUsed) + sizeof(struct VirtqUsedElem) * qsz; in VirtqSize()
157 if (num < q->qsz) { in CompleteConfigQueue()
158 PRINT_ERR("queue %u not available: max qsz=%u, requested=%u\n", queue, num, q->qsz); in CompleteConfigQueue()
162 FENCE_WRITE_UINT32(q->qsz, dev->base + VIRTMMIO_REG_QUEUENUM); in CompleteConfigQueue()
171 static VADDR_T CalculateQueueAddr(VADDR_T base, uint16_t qsz, struct Virtq *q) in CalculateQueueAddr() argument
175 q->qsz = qsz; in CalculateQueueAddr()
176 base = ALIGN(base + sizeof(struct VirtqDesc) * qsz, VIRTQ_ALIGN_AVAIL); in CalculateQueueAddr()
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Dvirtnet.c187 nic->tbufRec = malloc(sizeof(struct TbufRecord) * nic->dev.vq[1].qsz); in InitTxFreelist()
193 for (i = 0; i < nic->dev.vq[1].qsz - 1; i++) { in InitTxFreelist()
198 nic->tFreeNum = nic->dev.vq[1].qsz; in InitTxFreelist()
233 nic->dev.vq[0].avail->ring[nic->dev.vq[0].avail->index % nic->dev.vq[0].qsz] = pc->id; in ReleaseRxEntry()
249 nic->rbufRec = calloc(q->qsz, sizeof(struct RbufRecord)); in ConfigRxBuffer()
257 for (i = 0; i < q->qsz; i++) { in ConfigRxBuffer()
279 uint16_t qsz[VIRTQ_NUM_NET]; in ConfigQueue() local
287 qsz[0] = VIRTMMIO_NETIF_DFT_RXQSZ; in ConfigQueue()
288 qsz[1] = VIRTMMIO_NETIF_DFT_TXQSZ; in ConfigQueue()
289 … size = VirtqSize(qsz[0]) + VirtqSize(qsz[1]) + VIRTQ_RXBUF_ALIGN - 1 + qsz[0] * VIRTQ_RXBUF_SIZE; in ConfigQueue()
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Dvirtinput.c125 in->dev.vq[0].avail->index += in->dev.vq[0].qsz; in PopulateEventQ()
164 idx = q->used->ring[q->last % q->qsz].id; in VirtinHandleEv()
171 q->avail->ring[(q->avail->index + add++) % q->qsz] = idx; in VirtinHandleEv()
322 uint16_t qsz[VIRTQ_NUM]; in VirtinInitDev() local
345 qsz[0] = VIRTQ_EVENT_QSZ; in VirtinInitDev()
346 qsz[1] = VIRTQ_STATUS_QSZ; in VirtinInitDev()
347 if (VirtmmioConfigQueue(&in->dev, base, qsz, VIRTQ_NUM) == 0) { in VirtinInitDev()
Dvirtgpu.c185 q->avail->ring[q->avail->index % q->qsz] = 0; in NotifyAndWaitResponse()
250 uint16_t head = q->last % q->qsz; /* `last` record next writable desc entry for request */ in RequestNoResponse()
262 q->avail->ring[q->avail->index % q->qsz] = head; in RequestNoResponse()
441 uint16_t qsz; in PopulateVirtQ() local
445 qsz = VIRTQ_CURSOR_QSZ; in PopulateVirtQ()
447 qsz = VIRTQ_CONTROL_QSZ; in PopulateVirtQ()
451 for (i = 0; i < qsz; i += NORMAL_CMD_ENTRIES) { in PopulateVirtQ()
510 uint16_t qsz[VIRTQ_NUM]; in VirtgpuInitDev() local
536 qsz[0] = VIRTQ_CONTROL_QSZ; in VirtgpuInitDev()
537 qsz[1] = VIRTQ_CURSOR_QSZ; in VirtgpuInitDev()
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Dvirtmmio.h124 uint16_t qsz; member
155 unsigned VirtqSize(uint16_t qsz);
158 VADDR_T VirtmmioConfigQueue(struct VirtmmioDev *dev, VADDR_T base, uint16_t qsz[], int num);
/device/qemu/drivers/virtio/
Dvirtmmio.c56 unsigned VirtqSize(uint16_t qsz) in VirtqSize() argument
60 ALIGN(sizeof(struct VirtqDesc) * qsz, VIRTQ_ALIGN_AVAIL) + in VirtqSize()
61 ALIGN(sizeof(struct VirtqAvail) + sizeof(uint16_t) * qsz, VIRTQ_ALIGN_USED) + in VirtqSize()
62 sizeof(struct VirtqUsed) + sizeof(struct VirtqUsedElem) * qsz; in VirtqSize()
149 if (num < q->qsz) { in CompleteConfigQueue()
150 PRINT_ERR("queue %u not available: max qsz=%u, requested=%u\n", queue, num, q->qsz); in CompleteConfigQueue()
154 WRITE_UINT32(q->qsz, dev->base + VIRTMMIO_REG_QUEUENUM); in CompleteConfigQueue()
163 static VADDR_T CalculateQueueAddr(VADDR_T base, uint16_t qsz, struct Virtq *q) in CalculateQueueAddr() argument
167 q->qsz = qsz; in CalculateQueueAddr()
168 base = ALIGN(base + sizeof(struct VirtqDesc) * qsz, VIRTQ_ALIGN_AVAIL); in CalculateQueueAddr()
[all …]
Dvirtmmio.h113 uint16_t qsz; member
144 unsigned VirtqSize(uint16_t qsz);
147 VADDR_T VirtmmioConfigQueue(struct VirtmmioDev *dev, VADDR_T base, uint16_t qsz[], int len);
Dvirtinput.c123 in->dev.vq[0].avail->index += in->dev.vq[0].qsz; in PopulateEventQ()
152 idx = q->used->ring[q->last % q->qsz].id; in VirtinHandleEv()
158 q->avail->ring[(q->avail->index + add++) % q->qsz] = idx; in VirtinHandleEv()
311 uint16_t qsz[VIRTQ_NUM]; in VirtinInitDev() local
332 qsz[0] = VIRTQ_EVENT_QSZ; in VirtinInitDev()
333 qsz[1] = VIRTQ_STATUS_QSZ; in VirtinInitDev()
334 if (VirtmmioConfigQueue(&in->dev, base, qsz, VIRTQ_NUM) == 0) { in VirtinInitDev()
Dvirtgpu.c184 q->avail->ring[q->avail->index % q->qsz] = 0; in NotifyAndWaitResponse()
249 uint16_t head = q->last % q->qsz; /* `last` record next writable desc entry for request */ in RequestNoResponse()
261 q->avail->ring[q->avail->index % q->qsz] = head; in RequestNoResponse()
438 uint16_t qsz; in PopulateVirtQ() local
442 qsz = VIRTQ_CURSOR_QSZ; in PopulateVirtQ()
444 qsz = VIRTQ_CONTROL_QSZ; in PopulateVirtQ()
448 for (i = 0; i < qsz; i += NORMAL_CMD_ENTRIES) { in PopulateVirtQ()
506 uint16_t qsz[VIRTQ_NUM]; in VirtgpuInitDev() local
528 qsz[0] = VIRTQ_CONTROL_QSZ; in VirtgpuInitDev()
529 qsz[1] = VIRTQ_CURSOR_QSZ; in VirtgpuInitDev()
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Dvirtnet.c143 for (i = 0; i < nic->dev.vq[1].qsz - 1; i++) { in InitTxFreelist()
148 nic->tFreeNum = nic->dev.vq[1].qsz; in InitTxFreelist()
180 for (i = 0; i < q->qsz; i++) { in PopulateRxBuffer()
194 uint16_t qsz[VIRTQ_NUM]; in ConfigQueue() local
197 qsz[0] = VIRTQ_RX_QSZ; in ConfigQueue()
198 qsz[1] = VIRTQ_TX_QSZ; in ConfigQueue()
199 if (VirtmmioConfigQueue(&nic->dev, base, qsz, VIRTQ_NUM) == 0) { in ConfigQueue()
252 trans->avail->ring[trans->avail->index % trans->qsz] = head; in LowLevelOutput()
303 e = &q->used->ring[q->last % q->qsz]; in VirtnetRxHandle()
314 q->avail->ring[(q->avail->index + add++) % q->qsz] = e->id; in VirtnetRxHandle()
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Dvirtrng.c73 q->avail->ring[q->avail->index % q->qsz] = 0; in VirtrngIO()
147 uint16_t qsz; in VirtrngInitDev() local
170 qsz = VIRTQ_REQUEST_QSZ; in VirtrngInitDev()
171 if (VirtmmioConfigQueue(&rng->dev, base, &qsz, 1) == 0) { in VirtrngInitDev()
Dvirtblock.c158 q->avail->ring[q->avail->index % q->qsz] = 0; in VirtblkIO()
201 uint16_t qsz; in VirtblkInitDev() local
220 qsz = VIRTQ_REQUEST_QSZ; in VirtblkInitDev()
221 if (VirtmmioConfigQueue(&blk->dev, base, &qsz, 1) == 0) { in VirtblkInitDev()