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/device/board/unionman/unionpi_tiger/kernel/drivers/isp/drivers/v4l2_dev/src/platform/
Dsystem_am_md.c100 int param_md_init(T_MD_PRM *reg) in param_md_init() argument
138 reg->reg_md_gclk = 0; // u32: clock gate control in param_md_init()
142 reg->reg_md_top_ctrl = 0x3c0204; // u32: md top ntrol in param_md_init()
145 reg->reg_wr_axi_wr_en =1; //u1: axi wr enable in param_md_init()
146 reg->reg_wr_axi_req_en =1; //u1: axi request enable in param_md_init()
147 reg->reg_wr_axi_bypass =0; //u1: bypass axi wr in param_md_init()
148 reg->reg_wr_total_size =57600; //u24: pixels hsize * vsize in param_md_init()
151 reg->reg_wr_base_addr = 0x80000000; //u32: wr axi base address in param_md_init()
155reg->reg_wr_burst_lens= 2; //u3: burst_lens limiation, burst_size: 0: 1x128, … in param_md_init()
156reg->reg_wr_req_th = 4; //u4: fifo depth req_th * 8 *128 bits in fifo. >… in param_md_init()
[all …]
/device/soc/rockchip/common/sdk_linux/drivers/gpu/drm/bridge/analogix/
Danalogix_dp_reg.c26 static void analogix_dp_write(struct analogix_dp_device *dp, u32 reg, u32 val) in analogix_dp_write() argument
30 writel(val, dp->reg_base + reg); in analogix_dp_write()
33 writel(val, dp->reg_base + reg); in analogix_dp_write()
36 static u32 analogix_dp_read(struct analogix_dp_device *dp, u32 reg) in analogix_dp_read() argument
39 readl(dp->reg_base + reg); in analogix_dp_read()
42 return readl(dp->reg_base + reg); in analogix_dp_read()
47 u32 reg; in analogix_dp_enable_video_mute() local
50 reg = analogix_dp_read(dp, ANALOGIX_DP_VIDEO_CTL_1); in analogix_dp_enable_video_mute()
51 reg |= HDCP_VIDEO_MUTE; in analogix_dp_enable_video_mute()
52 analogix_dp_write(dp, ANALOGIX_DP_VIDEO_CTL_1, reg); in analogix_dp_enable_video_mute()
[all …]
/device/board/unionman/unionpi_tiger/kernel/drivers/media/drivers/common/registers/
Dregister_map.c57 static inline int codecio_reg_read(u32 bus_type, u32 reg, u32 *val) in codecio_reg_read() argument
62 (codecio_reg_max[bus_type] < reg)) { in codecio_reg_read()
66 reg); in codecio_reg_read()
70 *val = readl((codecio_reg_map[bus_type] + reg)); in codecio_reg_read()
76 static inline int codecio_reg_write(u32 bus_type, u32 reg, u32 val) in codecio_reg_write() argument
81 (codecio_reg_max[bus_type] < reg)) { in codecio_reg_write()
85 reg); in codecio_reg_write()
89 writel(val, (codecio_reg_map[bus_type] + reg)); in codecio_reg_write()
95 int codecio_read_cbus(unsigned int reg) in codecio_read_cbus() argument
99 ret = codecio_reg_read(CODECIO_CBUS_BASE, reg << 2, &val); in codecio_read_cbus()
[all …]
/device/soc/beken/bk7235/liteos_m/bk_sdk_armino/middleware/driver/sys_ctrl/
Dsys_ctrl.c426 UINT32 reg; in sctrl_mac_ahb_slave_clock_enable() local
428 reg = REG_READ(SCTRL_CONTROL); in sctrl_mac_ahb_slave_clock_enable()
429 REG_WRITE(SCTRL_CONTROL, reg | MAC_HCLK_EN_BIT); in sctrl_mac_ahb_slave_clock_enable()
431 reg = REG_READ(SCTRL_MODEM_CORE_RESET_PHY_HCLK); in sctrl_mac_ahb_slave_clock_enable()
432 REG_WRITE(SCTRL_MODEM_CORE_RESET_PHY_HCLK, reg | MAC_HCLK_EN_BIT); in sctrl_mac_ahb_slave_clock_enable()
438 UINT32 reg; in sctrl_mac_ahb_slave_clock_disable() local
440 reg = REG_READ(SCTRL_CONTROL); in sctrl_mac_ahb_slave_clock_disable()
441 reg &= ~MAC_HCLK_EN_BIT; in sctrl_mac_ahb_slave_clock_disable()
442 REG_WRITE(SCTRL_CONTROL, reg); in sctrl_mac_ahb_slave_clock_disable()
444 reg = REG_READ(SCTRL_MODEM_CORE_RESET_PHY_HCLK); in sctrl_mac_ahb_slave_clock_disable()
[all …]
/device/soc/beken/bk7235/liteos_m/bk_sdk_armino/middleware/driver/sdcard/
Dsdio_driver.c54 UINT32 reg; in beken_sdcard_set_clk_div() local
56 reg = REG_READ(REG_SDCARD_FIFO_THRESHOLD); in beken_sdcard_set_clk_div()
57 reg &= ~(SDCARD_FIFO_SD_RATE_SELECT_MASK << SDCARD_FIFO_SD_RATE_SELECT_POSI); in beken_sdcard_set_clk_div()
58 reg |= ((clkdiv & SDCARD_FIFO_SD_RATE_SELECT_MASK) in beken_sdcard_set_clk_div()
60 REG_WRITE(REG_SDCARD_FIFO_THRESHOLD, reg); in beken_sdcard_set_clk_div()
124 uint32_t reg = REG_READ(REG_SDCARD_FIFO_THRESHOLD); in sdio_clk_gate_config() local
128 reg |= (1<<SDIO_REG0XD_CLK_GATE_ON_POS); in sdio_clk_gate_config()
130 reg &= ~(1<<SDIO_REG0XD_CLK_GATE_ON_POS); in sdio_clk_gate_config()
134 reg &= ~(SDCARD_FIFO_RX_FIFO_RST | SDCARD_FIFO_TX_FIFO_RST | SDCARD_FIFO_SD_STA_RST); in sdio_clk_gate_config()
136 REG_WRITE(REG_SDCARD_FIFO_THRESHOLD, reg); in sdio_clk_gate_config()
[all …]
Dsdcard.c359 uint32 response, reg; in sdcard_cmd1_process() local
380 reg = REG_READ(REG_SDCARD_FIFO_THRESHOLD); in sdcard_cmd1_process()
382 reg |= SDCARD_FIFO_SD_STA_RST; in sdcard_cmd1_process()
384 reg |= 20; in sdcard_cmd1_process()
386 REG_WRITE(REG_SDCARD_FIFO_THRESHOLD, reg); in sdcard_cmd1_process()
738 uint32_t reg = REG_READ(REG_SDCARD_CMD_RSP_INT_MASK); in sdcard_cmd12_process() local
739 reg &= ~(0x1 << SDIO_REG0XA_TX_FIFO_NEED_WRITE_MASK_CG_POS); in sdcard_cmd12_process()
740 REG_WRITE(REG_SDCARD_CMD_RSP_INT_MASK, reg); in sdcard_cmd12_process()
756 UINT32 reg; in sdcard_send_read_stop() local
759 reg = REG_READ(REG_SDCARD_FIFO_THRESHOLD); in sdcard_send_read_stop()
[all …]
/device/soc/amlogic/a311d/soc/amlogic/iomap/
Diomap.c45 inline int aml_reg_read(u32 bus_type, unsigned int reg, unsigned int *val) in aml_reg_read() argument
47 if (bus_type < IO_BUS_MAX && (meson_reg_map[bus_type]) && (meson_reg_max[bus_type] >= reg)) { in aml_reg_read()
48 *val = readl((meson_reg_map[bus_type] + reg)); in aml_reg_read()
56 inline int aml_reg_write(u32 bus_type, unsigned int reg, unsigned int val) in aml_reg_write() argument
58 if (bus_type < IO_BUS_MAX && (meson_reg_map[bus_type]) && (meson_reg_max[bus_type] >= reg)) { in aml_reg_write()
59 writel(val, (meson_reg_map[bus_type] + reg)); in aml_reg_write()
67 int aml_regmap_update_bits(u32 bus_type, unsigned int reg, unsigned int mask, unsigned int val) in aml_regmap_update_bits() argument
72 ret = aml_reg_read(bus_type, reg, &orig); in aml_regmap_update_bits()
74 pr_err("read bus reg %x error %d\n", reg, ret); in aml_regmap_update_bits()
79 ret = aml_reg_write(bus_type, reg, tmp); in aml_regmap_update_bits()
[all …]
/device/board/unionman/unionpi_tiger/kernel/drivers/media/drivers/include/linux/amlogic/
Diomap.h30 extern inline int aml_reg_read(u32 bus_type, u32 reg, u32 *val);
31 extern inline int aml_reg_write(u32 bus_type, u32 reg, u32 val);
33 unsigned int reg, unsigned int mask,
38 extern int aml_read_cbus(unsigned int reg);
41 extern void aml_write_cbus(unsigned int reg, unsigned int val);
44 extern void aml_cbus_update_bits(unsigned int reg,
50 extern int aml_read_aobus(unsigned int reg);
53 extern void aml_write_aobus(unsigned int reg, unsigned int val);
56 extern void aml_aobus_update_bits(unsigned int reg,
64 extern int aml_read_vcbus(unsigned int reg);
[all …]
/device/soc/amlogic/a311d/soc/include/linux/amlogic/
Diomap.h30 extern inline int aml_reg_read(u32 bus_type, u32 reg, u32 *val);
31 extern inline int aml_reg_write(u32 bus_type, u32 reg, u32 val);
32 extern int aml_regmap_update_bits(u32 bus_type, unsigned int reg, unsigned int mask, unsigned int v…
36 extern int aml_read_cbus(unsigned int reg);
38 extern void aml_write_cbus(unsigned int reg, unsigned int val);
40 extern void aml_cbus_update_bits(unsigned int reg, unsigned int mask, unsigned int val);
45 extern int aml_read_aobus(unsigned int reg);
47 extern void aml_write_aobus(unsigned int reg, unsigned int val);
49 extern void aml_aobus_update_bits(unsigned int reg, unsigned int mask, unsigned int val);
54 extern int aml_read_vcbus(unsigned int reg);
[all …]
/device/soc/winnermicro/wm800/board/platform/drivers/gpio/
Dwm_gpio.c42 u32 reg = 0; in GPIOA_IRQHandler() local
45 reg = tls_reg_read32(HR_GPIO_MIS); in GPIOA_IRQHandler()
48 if (reg & BIT(i)) { in GPIOA_IRQHandler()
65 u32 reg = 0; in GPIOB_IRQHandler() local
67 reg = tls_reg_read32(HR_GPIO_MIS + TLS_IO_AB_OFFSET); in GPIOB_IRQHandler()
70 if (reg & BIT(i - WM_IO_PB_00)) { in GPIOB_IRQHandler()
151 u32 reg; in tls_gpio_read() local
165 reg = tls_reg_read32(HR_GPIO_DATA + offset); in tls_gpio_read()
167 if (reg & (0x1 << pin)) in tls_gpio_read()
188 u32 reg; in tls_gpio_write() local
[all …]
/device/board/unionman/unionpi_tiger/kernel/drivers/media/drivers/include/linux/amlogic/media/registers/
Dregister_map.h20 int codecio_read_cbus(unsigned int reg);
21 void codecio_write_cbus(unsigned int reg, unsigned int val);
22 int codecio_read_dosbus(unsigned int reg);
23 void codecio_write_dosbus(unsigned int reg, unsigned int val);
24 int codecio_read_hiubus(unsigned int reg);
25 void codecio_write_hiubus(unsigned int reg, unsigned int val);
26 int codecio_read_aobus(unsigned int reg);
27 void codecio_write_aobus(unsigned int reg, unsigned int val);
28 int codecio_read_vcbus(unsigned int reg);
29 void codecio_write_vcbus(unsigned int reg, unsigned int val);
[all …]
/device/soc/rockchip/common/vendor/drivers/gpu/arm/bifrost/
Dmali_kbase_mem_linux.c98 struct kbase_va_region *reg, u64 offset_bytes,
107 struct kbase_va_region *const reg,
120 struct kbase_va_region *reg; in kbase_find_event_mem_region() local
124 list_for_each_entry(reg, &kctx->csf.event_pages_head, link) in kbase_find_event_mem_region()
126 if ((reg->start_pfn <= gpu_pfn) && in kbase_find_event_mem_region()
127 (gpu_pfn < (reg->start_pfn + reg->nr_pages))) { in kbase_find_event_mem_region()
128 if (WARN_ON(reg->flags & KBASE_REG_FREE)) { in kbase_find_event_mem_region()
132 if (WARN_ON(!(reg->flags & KBASE_REG_CSF_EVENT))) { in kbase_find_event_mem_region()
136 return reg; in kbase_find_event_mem_region()
180 struct kbase_va_region *reg, in kbase_phy_alloc_mapping_init() argument
[all …]
Dmali_kbase_mem.h135 struct kbase_va_region *reg; member
457 static inline bool kbase_is_region_free(struct kbase_va_region *reg) in kbase_is_region_free() argument
459 return (!reg || (reg->flags & KBASE_REG_FREE)); in kbase_is_region_free()
462 static inline bool kbase_is_region_invalid(struct kbase_va_region *reg) in kbase_is_region_invalid() argument
464 return (!reg || (reg->flags & KBASE_REG_VA_FREED)); in kbase_is_region_invalid()
467 static inline bool kbase_is_region_invalid_or_free(struct kbase_va_region *reg) in kbase_is_region_invalid_or_free() argument
472 return (kbase_is_region_invalid(reg) || kbase_is_region_free(reg)); in kbase_is_region_invalid_or_free()
475 int kbase_remove_va_region(struct kbase_va_region *reg);
476 static inline void kbase_region_refcnt_free(struct kbase_va_region *reg) in kbase_region_refcnt_free() argument
479 if (reg->start_pfn) { in kbase_region_refcnt_free()
[all …]
Dmali_kbase_mem.c172 struct kbase_va_region *reg; in find_region_enclosing_range_rbtree() local
180 reg = rb_entry(rbnode, struct kbase_va_region, rblink); in find_region_enclosing_range_rbtree()
181 tmp_start_pfn = reg->start_pfn; in find_region_enclosing_range_rbtree()
182 tmp_end_pfn = reg->start_pfn + reg->nr_pages; in find_region_enclosing_range_rbtree()
190 return reg; in find_region_enclosing_range_rbtree()
201 struct kbase_va_region *reg; in kbase_find_region_enclosing_address() local
208 reg = rb_entry(rbnode, struct kbase_va_region, rblink); in kbase_find_region_enclosing_address()
209 tmp_start_pfn = reg->start_pfn; in kbase_find_region_enclosing_address()
210 tmp_end_pfn = reg->start_pfn + reg->nr_pages; in kbase_find_region_enclosing_address()
218 return reg; in kbase_find_region_enclosing_address()
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/device/board/isoftstone/zhiyuan/kernel/driver/drivers/mmc/
Dsunxi-mmc-panic.c59 #define mmc_mreadl(reg_base, reg) \
61 int val = readl(reg_base + SDXC_##reg);\
65 #define mmc_mwritel(reg_base, reg, value) \
68 writel((value), reg_base + SDXC_##reg);\
69 val = readl(reg_base + SDXC_##reg);\
76 #define mmc_mreadl(reg_base, reg) \ argument
78 int val = readl(reg_base + SDXC_##reg);\
82 #define mmc_mwritel(reg_base, reg, value) \ argument
85 writel((value), reg_base + SDXC_##reg);\
404 static int sunxi_mmc_mchk_r1_rdy(char *reg, int to_ns) in sunxi_mmc_mchk_r1_rdy() argument
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/device/soc/rockchip/common/kernel/drivers/gpu/arm/midgard/
Dmali_kbase_mem_linux.c64 struct kbase_va_region *reg,
81 struct kbase_va_region *reg,
91 struct kbase_va_region *reg; in kbase_mem_alloc() local
149 reg = kbase_alloc_free_region(kctx, 0, va_pages, zone); in kbase_mem_alloc()
150 if (!reg) { in kbase_mem_alloc()
155 if (kbase_update_region_flags(kctx, reg, *flags) != 0) in kbase_mem_alloc()
158 if (kbase_reg_prepare_native(reg, kctx) != 0) { in kbase_mem_alloc()
164 reg->extent = extent; in kbase_mem_alloc()
166 reg->extent = 0; in kbase_mem_alloc()
168 if (kbase_alloc_phy_pages(reg, va_pages, commit_pages) != 0) { in kbase_mem_alloc()
[all …]
Dmali_kbase_mem.c47 struct kbase_va_region *reg) in kbase_reg_flags_to_rbtree() argument
51 switch (reg->flags & KBASE_REG_ZONE_MASK) { in kbase_reg_flags_to_rbtree()
136 struct kbase_va_region *reg = NULL; in kbase_region_tracker_find_region_enclosing_range_free() local
148 reg = rb_entry(rbnode, struct kbase_va_region, rblink); in kbase_region_tracker_find_region_enclosing_range_free()
149 tmp_start_pfn = reg->start_pfn; in kbase_region_tracker_find_region_enclosing_range_free()
150 tmp_end_pfn = reg->start_pfn + reg->nr_pages; in kbase_region_tracker_find_region_enclosing_range_free()
159 return reg; in kbase_region_tracker_find_region_enclosing_range_free()
169 struct kbase_va_region *reg; in kbase_region_tracker_find_region_enclosing_address() local
184 reg = rb_entry(rbnode, struct kbase_va_region, rblink); in kbase_region_tracker_find_region_enclosing_address()
185 tmp_start_pfn = reg->start_pfn; in kbase_region_tracker_find_region_enclosing_address()
[all …]
/device/soc/rockchip/common/vendor/drivers/gpu/arm/midgard/
Dmali_kbase_mem_linux.c58 static void kbase_mem_shrink_cpu_mapping(struct kbase_context *kctx, struct kbase_va_region *reg, u…
74 static int kbase_mem_shrink_gpu_mapping(struct kbase_context *kctx, struct kbase_va_region *reg, u6…
83 struct kbase_va_region *reg; in kbase_mem_alloc() local
140 reg = kbase_alloc_free_region(kctx, 0, va_pages, zone); in kbase_mem_alloc()
141 if (!reg) { in kbase_mem_alloc()
146 if (kbase_update_region_flags(kctx, reg, *flags) != 0) { in kbase_mem_alloc()
150 if (kbase_reg_prepare_native(reg, kctx) != 0) { in kbase_mem_alloc()
156 reg->extent = extent; in kbase_mem_alloc()
158 reg->extent = 0; in kbase_mem_alloc()
161 if (kbase_alloc_phy_pages(reg, va_pages, commit_pages) != 0) { in kbase_mem_alloc()
[all …]
Dmali_kbase_mem.c42 … struct rb_root *kbase_reg_flags_to_rbtree(struct kbase_context *kctx, struct kbase_va_region *reg) in kbase_reg_flags_to_rbtree() argument
46 switch (reg->flags & KBASE_REG_ZONE_MASK) { in kbase_reg_flags_to_rbtree()
132 struct kbase_va_region *reg = NULL; in kbase_region_tracker_find_region_enclosing_range_free() local
144 reg = rb_entry(rbnode, struct kbase_va_region, rblink); in kbase_region_tracker_find_region_enclosing_range_free()
145 tmp_start_pfn = reg->start_pfn; in kbase_region_tracker_find_region_enclosing_range_free()
146 tmp_end_pfn = reg->start_pfn + reg->nr_pages; in kbase_region_tracker_find_region_enclosing_range_free()
154 return reg; in kbase_region_tracker_find_region_enclosing_range_free()
165 struct kbase_va_region *reg; in kbase_region_tracker_find_region_enclosing_address() local
180 reg = rb_entry(rbnode, struct kbase_va_region, rblink); in kbase_region_tracker_find_region_enclosing_address()
181 tmp_start_pfn = reg->start_pfn; in kbase_region_tracker_find_region_enclosing_address()
[all …]
/device/soc/rockchip/common/kernel/drivers/gpu/arm/bifrost/
Dmali_kbase_mem_linux.c96 struct kbase_va_region *reg, u64 offset_bytes, size_t size,
104 struct kbase_va_region *reg,
116 struct kbase_va_region *reg; in kbase_find_event_mem_region() local
120 list_for_each_entry(reg, &kctx->csf.event_pages_head, link) { in kbase_find_event_mem_region()
121 if ((reg->start_pfn <= gpu_pfn) && in kbase_find_event_mem_region()
122 (gpu_pfn < (reg->start_pfn + reg->nr_pages))) { in kbase_find_event_mem_region()
123 if (WARN_ON(reg->flags & KBASE_REG_FREE)) in kbase_find_event_mem_region()
126 if (WARN_ON(!(reg->flags & KBASE_REG_CSF_EVENT))) in kbase_find_event_mem_region()
129 return reg; in kbase_find_event_mem_region()
173 struct kbase_va_region *reg, size_t vsize, size_t size) in kbase_phy_alloc_mapping_init() argument
[all …]
Dmali_kbase_mem.c177 struct kbase_va_region *reg; in find_region_enclosing_range_rbtree() local
185 reg = rb_entry(rbnode, struct kbase_va_region, rblink); in find_region_enclosing_range_rbtree()
186 tmp_start_pfn = reg->start_pfn; in find_region_enclosing_range_rbtree()
187 tmp_end_pfn = reg->start_pfn + reg->nr_pages; in find_region_enclosing_range_rbtree()
196 return reg; in find_region_enclosing_range_rbtree()
207 struct kbase_va_region *reg; in kbase_find_region_enclosing_address() local
214 reg = rb_entry(rbnode, struct kbase_va_region, rblink); in kbase_find_region_enclosing_address()
215 tmp_start_pfn = reg->start_pfn; in kbase_find_region_enclosing_address()
216 tmp_end_pfn = reg->start_pfn + reg->nr_pages; in kbase_find_region_enclosing_address()
225 return reg; in kbase_find_region_enclosing_address()
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/device/board/hisilicon/hispark_aries/uboot/secureboot_release/ddr_init/boot/
Dinit_regs.c49 static inline void reg_read(struct regentry *reg, unsigned int *ret) in reg_read() argument
55 bit_start_r = ((reg->attr&R_REG_BIT_MASK)>>R_REG_BIT_OFFSET); in reg_read()
56 bit_num_r = ((reg->attr&R_BIT_MASK)>>R_BIT_OFFSET)+1; in reg_read()
57 reg_val_r = (*(volatile unsigned *) (reg->reg_addr)); in reg_read()
64 *ret = ((reg_val_r == reg->value)?0:1); in reg_read()
67 static inline void reg_write(struct regentry *reg) in reg_write() argument
74 delay_2 = reg->delay; in reg_write()
75 bit_start_w = ((reg->attr&W_REG_BIT_MASK)>>W_REG_BIT_OFFSET); in reg_write()
76 bit_num_w = ((reg->attr&W_BIT_MASK)>>W_BIT_OFFSET)+1; in reg_write()
77 reg_val_w = (*(volatile unsigned *) (reg->reg_addr)); in reg_write()
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/device/soc/hisilicon/common/platform/wifi/hi3881v100/driver/oal/
Doal_sdio_comm.h112 #define hisdio_short_pkt_set(reg, num) do {(reg) = (((reg) & 0xFFFFFF00) | (((num) & 0xFF)));} w… argument
113 #define hisdio_large_pkt_set(reg, num) do {(reg) = (((reg) & 0xFFFF00FF) | (((num) & 0xFF) << 8)… argument
114 #define hisdio_reserve_pkt_set(reg, num) do {(reg) = (((reg) & 0xFF00FFFF) | (((num) & 0xFF) << 16… argument
115 #define hisdio_comm_reg_seq_set(reg, num) do {(reg) = (((reg) & 0x00FFFFFF) | (((num) & 0xFF) << 24… argument
117 #define hisdio_short_pkt_get(reg) ((reg) & 0xFF) argument
118 #define hisdio_large_pkt_get(reg) (((reg) >> 8) & 0xFF) argument
119 #define hisdio_mgmt_pkt_get(reg) (((reg) >> 16) & 0xFF) argument
120 #define hisdio_comm_reg_seq_pkt_get(reg) (((reg) >> 24) & 0xFF) argument
/device/board/hisilicon/hispark_taurus/uboot/secureboot_release/ddr_init/boot/
Dinit_regs.c50 static inline void reg_read(const struct regentry *reg, unsigned int *ret) in reg_read() argument
56 bit_start_r = ((reg->attr&R_REG_BIT_MASK)>>R_REG_BIT_OFFSET); in reg_read()
57 bit_num_r = ((reg->attr&R_BIT_MASK)>>R_BIT_OFFSET)+1; in reg_read()
58 reg_val_r = (*(volatile unsigned *)((uintptr_t)(reg->reg_addr))); in reg_read()
65 *ret = ((reg_val_r == reg->value)?0:1); in reg_read()
68 static inline void reg_write(const struct regentry *reg) in reg_write() argument
75 delay_2 = reg->delay; in reg_write()
76 bit_start_w = ((reg->attr&W_REG_BIT_MASK)>>W_REG_BIT_OFFSET); in reg_write()
77 bit_num_w = ((reg->attr&W_BIT_MASK)>>W_BIT_OFFSET)+1; in reg_write()
78 reg_val_w = (*(volatile unsigned *)((uintptr_t)(reg->reg_addr))); in reg_write()
[all …]
/device/board/isoftstone/zhiyuan/kernel/driver/drivers/video/sunxi/disp2/disp/de/lowlevel_v33x/de330/
Dde_fcc.c153 struct fcc_reg *reg = get_fcc_reg(priv); in de_fcc_enable() local
157 tmp = reg->ctl.dwval & 0x170; in de_fcc_enable()
160 reg->ctl.dwval = tmp; in de_fcc_enable()
170 struct fcc_reg *reg = get_fcc_reg(priv); in de_fcc_set_size() local
175 reg->size.dwval = tmp; in de_fcc_set_size()
186 struct fcc_reg *reg = get_fcc_reg(priv); in de_fcc_set_window() local
189 tmp = reg->ctl.dwval & 0x71; in de_fcc_set_window()
191 reg->ctl.dwval = tmp; in de_fcc_set_window()
194 reg->win0.dwval = tmp; in de_fcc_set_window()
197 reg->win1.dwval = tmp; in de_fcc_set_window()
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