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Searched refs:regCfg100 (Results 1 – 3 of 3) sorted by relevance

/device/soc/hisilicon/common/platform/i2s/
Di2s_aiao_hi35xx.c287 i2sCfg->regCfg100.aiaoSrstReq, i2sCfg->regCfg100.aiaoCken, i2sCfg->regCfg100.aiaoFsclkDiv, in CfgSetI2sCrgCfg100()
288 i2sCfg->regCfg100.aiaoBclkDiv); in CfgSetI2sCrgCfg100()
293 value |= (i2sCfg->regCfg100.aiaoSrstReq << I2S_AIAO_SRST_REQ_SHIFT); in CfgSetI2sCrgCfg100()
297 value |= (i2sCfg->regCfg100.aiaoCken << I2S_AIAO_CKEN_SHIFT); in CfgSetI2sCrgCfg100()
301 value |= (i2sCfg->regCfg100.aiaoFsclkDiv << I2S_AIAO_FSCLK_DIV_SHIFT); in CfgSetI2sCrgCfg100()
305 value |= (i2sCfg->regCfg100.aiaoBclkDiv << I2S_AIAO_BCLK_DIV_SHIFT); in CfgSetI2sCrgCfg100()
377 i2sCfg->regCfg100.aiaoSrstReq, i2sCfg->regCfg100.aiaoCken, i2sCfg->regCfg100.aiaoFsclkDiv, in CfgSetI2sCrgCfg108()
378 i2sCfg->regCfg100.aiaoBclkDiv); in CfgSetI2sCrgCfg108()
383 value |= (i2sCfg->regCfg100.aiaoSrstReq << I2S_AIAO_SRST_REQ_SHIFT); in CfgSetI2sCrgCfg108()
387 value |= (i2sCfg->regCfg100.aiaoCken << I2S_AIAO_CKEN_SHIFT); in CfgSetI2sCrgCfg108()
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Di2s_hi35xx.c242 if (Hi35xxSetCfgAiaoFsclkDiv(&i2sCfg->regCfg100.aiaoFsclkDiv, (cfg->bclk / rate)) != 0) { in Hi35xxI2sSetCfg()
246 if (Hi35xxSetCfgAiaoBclkDiv(&i2sCfg->regCfg100.aiaoBclkDiv, (cfg->mclk / cfg->bclk)) != 0) { in Hi35xxI2sSetCfg()
251 i2sCfg->regCfg100.aiaoSrstReq = I2S_AIAO_SRST_REQ_NO_RESET; in Hi35xxI2sSetCfg()
252 i2sCfg->regCfg100.aiaoCken = I2S_AIAO_CKEN_OPEN; in Hi35xxI2sSetCfg()
Di2s_hi35xx.h115 struct I2sCfgCfg100 regCfg100; member