Searched refs:reg_gpio_irq_risc1_en (Results 1 – 2 of 2) sorted by relevance
356 BM_SET(reg_gpio_irq_risc1_en(pin), pin & 0xff); in gpio_gpio2risc1_irq_en()366 BM_CLR(reg_gpio_irq_risc1_en(pin), pin & 0xff); in gpio_gpio2risc1_irq_dis()
134 #define reg_gpio_irq_risc1_en(i) REG_ADDR8(0x140340 + ((i) >> 8)) // reg_irq_mask: FLD_IRQ_… macro