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Searched refs:top_haddr (Results 1 – 4 of 4) sorted by relevance

/device/board/isoftstone/zhiyuan/kernel/driver/drivers/video/sunxi/disp2/disp/de/lowlevel_v3x/
Dde_rtmx_type.h227 union __vi_lay_top_haddr_reg_t top_haddr[3]; member
355 union __ui_lay_top_haddr_reg_t top_haddr; member
Dde_rtmx.c984 haddr = rtmx[sel].ui_ovl[unum]->top_haddr.dwval; in de_rtmx_set_lay_haddr()
985 rtmx[sel].ui_ovl[unum]->top_haddr.dwval = in de_rtmx_set_lay_haddr()
996 haddr = rtmx[sel].vi_ovl[chno]->top_haddr[0].dwval; in de_rtmx_set_lay_haddr()
997 rtmx[sel].vi_ovl[chno]->top_haddr[0].dwval = in de_rtmx_set_lay_haddr()
999 haddr = rtmx[sel].vi_ovl[chno]->top_haddr[1].dwval; in de_rtmx_set_lay_haddr()
1000 rtmx[sel].vi_ovl[chno]->top_haddr[1].dwval = in de_rtmx_set_lay_haddr()
1002 haddr = rtmx[sel].vi_ovl[chno]->top_haddr[2].dwval; in de_rtmx_set_lay_haddr()
1003 rtmx[sel].vi_ovl[chno]->top_haddr[2].dwval = in de_rtmx_set_lay_haddr()
2364 tmp = rtmx[sel].ui_ovl[unum]->top_haddr.dwval & (0xff << layno); in de_rtmx_get_lay_address()
2374 tmp = rtmx[sel].vi_ovl[chno]->top_haddr[0].dwval in de_rtmx_get_lay_address()
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/device/board/isoftstone/zhiyuan/kernel/driver/drivers/video/sunxi/disp2/disp/de/lowlevel_v33x/de330/
Dde_ovl.c457 reg->top_haddr.bits.haddr_lay0 = (u32)(addr >> 32); in de_ovl_u_set_lay_layout()
460 reg->top_haddr.bits.haddr_lay1 = (u32)(addr >> 32); in de_ovl_u_set_lay_layout()
463 reg->top_haddr.bits.haddr_lay2 = (u32)(addr >> 32); in de_ovl_u_set_lay_layout()
466 reg->top_haddr.bits.haddr_lay3 = (u32)(addr >> 32); in de_ovl_u_set_lay_layout()
Dde_ovl_type.h252 union ovl_u_haddr_reg top_haddr; member