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Searched refs:CPG_PLL2CR (Results 1 – 3 of 3) sorted by relevance

/kernel/linux/linux-5.10/drivers/clk/renesas/
Dclk-sh73a0.c32 #define CPG_PLL2CR 0x2c macro
103 enable_reg += CPG_PLL2CR; in sh73a0_cpg_register_clock()
Dclk-r8a73a4.c30 #define CPG_PLL2CR 0x2c macro
115 cr = CPG_PLL2CR; in r8a73a4_cpg_register_clock()
Drcar-gen3-cpg.c29 #define CPG_PLL2CR 0x002c macro
591 value = readl(base + CPG_PLL2CR); in rcar_gen3_cpg_clk_register()