Home
last modified time | relevance | path

Searched refs:GRBM_SOFT_RESET (Results 1 – 17 of 17) sorted by relevance

/kernel/linux/linux-5.10/drivers/gpu/drm/radeon/
Dni.c1665 WREG32(GRBM_SOFT_RESET, (SOFT_RESET_CP | in cayman_cp_resume()
1671 RREG32(GRBM_SOFT_RESET); in cayman_cp_resume()
1673 WREG32(GRBM_SOFT_RESET, 0); in cayman_cp_resume()
1674 RREG32(GRBM_SOFT_RESET); in cayman_cp_resume()
1920 tmp = RREG32(GRBM_SOFT_RESET); in cayman_gpu_soft_reset()
1923 WREG32(GRBM_SOFT_RESET, tmp); in cayman_gpu_soft_reset()
1924 tmp = RREG32(GRBM_SOFT_RESET); in cayman_gpu_soft_reset()
1929 WREG32(GRBM_SOFT_RESET, tmp); in cayman_gpu_soft_reset()
1930 tmp = RREG32(GRBM_SOFT_RESET); in cayman_gpu_soft_reset()
Drv770.c1108 WREG32(GRBM_SOFT_RESET, SOFT_RESET_CP); in rv770_cp_load_microcode()
1109 RREG32(GRBM_SOFT_RESET); in rv770_cp_load_microcode()
1111 WREG32(GRBM_SOFT_RESET, 0); in rv770_cp_load_microcode()
Devergreen.c3071 WREG32(GRBM_SOFT_RESET, (SOFT_RESET_CP | in evergreen_cp_resume()
3077 RREG32(GRBM_SOFT_RESET); in evergreen_cp_resume()
3079 WREG32(GRBM_SOFT_RESET, 0); in evergreen_cp_resume()
3080 RREG32(GRBM_SOFT_RESET); in evergreen_cp_resume()
3973 tmp = RREG32(GRBM_SOFT_RESET); in evergreen_gpu_soft_reset()
3976 WREG32(GRBM_SOFT_RESET, tmp); in evergreen_gpu_soft_reset()
3977 tmp = RREG32(GRBM_SOFT_RESET); in evergreen_gpu_soft_reset()
3982 WREG32(GRBM_SOFT_RESET, tmp); in evergreen_gpu_soft_reset()
3983 tmp = RREG32(GRBM_SOFT_RESET); in evergreen_gpu_soft_reset()
Dsi.c3951 tmp = RREG32(GRBM_SOFT_RESET); in si_gpu_soft_reset()
3954 WREG32(GRBM_SOFT_RESET, tmp); in si_gpu_soft_reset()
3955 tmp = RREG32(GRBM_SOFT_RESET); in si_gpu_soft_reset()
3960 WREG32(GRBM_SOFT_RESET, tmp); in si_gpu_soft_reset()
3961 tmp = RREG32(GRBM_SOFT_RESET); in si_gpu_soft_reset()
5809 u32 tmp = RREG32(GRBM_SOFT_RESET); in si_rlc_reset()
5812 WREG32(GRBM_SOFT_RESET, tmp); in si_rlc_reset()
5815 WREG32(GRBM_SOFT_RESET, tmp); in si_rlc_reset()
Dr600.c2660 WREG32(GRBM_SOFT_RESET, SOFT_RESET_CP); in r600_cp_load_microcode()
2661 RREG32(GRBM_SOFT_RESET); in r600_cp_load_microcode()
2663 WREG32(GRBM_SOFT_RESET, 0); in r600_cp_load_microcode()
2723 WREG32(GRBM_SOFT_RESET, SOFT_RESET_CP); in r600_cp_resume()
2724 RREG32(GRBM_SOFT_RESET); in r600_cp_resume()
2726 WREG32(GRBM_SOFT_RESET, 0); in r600_cp_resume()
Drv770d.h401 #define GRBM_SOFT_RESET 0x8020 macro
Dnid.h280 #define GRBM_SOFT_RESET 0x8020 macro
Dsid.h982 #define GRBM_SOFT_RESET 0x8020 macro
Dcikd.h1075 #define GRBM_SOFT_RESET 0x8020 macro
Dcik.c5019 tmp = RREG32(GRBM_SOFT_RESET); in cik_gpu_soft_reset()
5022 WREG32(GRBM_SOFT_RESET, tmp); in cik_gpu_soft_reset()
5023 tmp = RREG32(GRBM_SOFT_RESET); in cik_gpu_soft_reset()
5028 WREG32(GRBM_SOFT_RESET, tmp); in cik_gpu_soft_reset()
5029 tmp = RREG32(GRBM_SOFT_RESET); in cik_gpu_soft_reset()
Devergreend.h828 #define GRBM_SOFT_RESET 0x8020 macro
Dr600d.h295 #define GRBM_SOFT_RESET 0x8020 macro
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/amdgpu/
Dgfx_v8_0.c4094 WREG32_FIELD(GRBM_SOFT_RESET, SOFT_RESET_RLC, 1); in gfx_v8_0_rlc_reset()
4097 WREG32_FIELD(GRBM_SOFT_RESET, SOFT_RESET_RLC, 0); in gfx_v8_0_rlc_reset()
4979 GRBM_SOFT_RESET, SOFT_RESET_CP, 1); in gfx_v8_0_check_soft_reset()
4981 GRBM_SOFT_RESET, SOFT_RESET_GFX, 1); in gfx_v8_0_check_soft_reset()
4990 GRBM_SOFT_RESET, SOFT_RESET_RLC, 1); in gfx_v8_0_check_soft_reset()
4995 grbm_soft_reset = REG_SET_FIELD(grbm_soft_reset, GRBM_SOFT_RESET, in gfx_v8_0_check_soft_reset()
4997 grbm_soft_reset = REG_SET_FIELD(grbm_soft_reset, GRBM_SOFT_RESET, in gfx_v8_0_check_soft_reset()
4999 grbm_soft_reset = REG_SET_FIELD(grbm_soft_reset, GRBM_SOFT_RESET, in gfx_v8_0_check_soft_reset()
5039 if (REG_GET_FIELD(grbm_soft_reset, GRBM_SOFT_RESET, SOFT_RESET_CP) || in gfx_v8_0_pre_soft_reset()
5040 REG_GET_FIELD(grbm_soft_reset, GRBM_SOFT_RESET, SOFT_RESET_GFX)) in gfx_v8_0_pre_soft_reset()
[all …]
Dgfx_v9_0.c3023 WREG32_FIELD15(GC, 0, GRBM_SOFT_RESET, SOFT_RESET_RLC, 1); in gfx_v9_0_rlc_reset()
3025 WREG32_FIELD15(GC, 0, GRBM_SOFT_RESET, SOFT_RESET_RLC, 0); in gfx_v9_0_rlc_reset()
4034 GRBM_SOFT_RESET, SOFT_RESET_CP, 1); in gfx_v9_0_soft_reset()
4036 GRBM_SOFT_RESET, SOFT_RESET_GFX, 1); in gfx_v9_0_soft_reset()
4041 GRBM_SOFT_RESET, SOFT_RESET_CP, 1); in gfx_v9_0_soft_reset()
4048 GRBM_SOFT_RESET, SOFT_RESET_RLC, 1); in gfx_v9_0_soft_reset()
Dgfx_v10_0.c4883 WREG32_FIELD15(GC, 0, GRBM_SOFT_RESET, SOFT_RESET_RLC, 1); in gfx_v10_0_rlc_reset()
4885 WREG32_FIELD15(GC, 0, GRBM_SOFT_RESET, SOFT_RESET_RLC, 0); in gfx_v10_0_rlc_reset()
7132 GRBM_SOFT_RESET, SOFT_RESET_CP, in gfx_v10_0_soft_reset()
7135 GRBM_SOFT_RESET, SOFT_RESET_GFX, in gfx_v10_0_soft_reset()
7141 GRBM_SOFT_RESET, SOFT_RESET_CP, in gfx_v10_0_soft_reset()
7152 GRBM_SOFT_RESET, in gfx_v10_0_soft_reset()
7159 GRBM_SOFT_RESET, in gfx_v10_0_soft_reset()
Dsid.h980 #define GRBM_SOFT_RESET 0x2008 macro
Dgfx_v6_0.c2496 WREG32_FIELD(GRBM_SOFT_RESET, SOFT_RESET_RLC, 1); in gfx_v6_0_rlc_reset()
2498 WREG32_FIELD(GRBM_SOFT_RESET, SOFT_RESET_RLC, 0); in gfx_v6_0_rlc_reset()