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Searched refs:I915_MAX_PLANES (Results 1 – 7 of 7) sorted by relevance

/kernel/linux/linux-5.10/drivers/gpu/drm/i915/display/
Dintel_atomic_plane.c363 struct skl_ddb_entry entries_y[I915_MAX_PLANES], in skl_next_plane_to_commit() argument
364 struct skl_ddb_entry entries_uv[I915_MAX_PLANES], in skl_next_plane_to_commit() argument
385 I915_MAX_PLANES, plane_id) || in skl_next_plane_to_commit()
388 I915_MAX_PLANES, plane_id)) in skl_next_plane_to_commit()
430 struct skl_ddb_entry entries_y[I915_MAX_PLANES]; in skl_update_planes_on_crtc()
431 struct skl_ddb_entry entries_uv[I915_MAX_PLANES]; in skl_update_planes_on_crtc()
Dintel_display_types.h679 struct skl_plane_wm planes[I915_MAX_PLANES];
698 u16 plane[I915_MAX_PLANES];
740 struct skl_ddb_entry plane_ddb_y[I915_MAX_PLANES];
741 struct skl_ddb_entry plane_ddb_uv[I915_MAX_PLANES];
996 int min_cdclk[I915_MAX_PLANES];
998 u32 data_rate[I915_MAX_PLANES];
Dintel_display.h183 I915_MAX_PLANES, enumerator
187 for ((__p) = PLANE_PRIMARY; (__p) < I915_MAX_PLANES; (__p)++) \
Dintel_display.c14085 struct skl_ddb_entry ddb_y[I915_MAX_PLANES]; in verify_wm_state()
14086 struct skl_ddb_entry ddb_uv[I915_MAX_PLANES]; in verify_wm_state()
/kernel/linux/linux-5.10/drivers/gpu/drm/i915/gvt/
Dreg.h92 (PLANE_SPRITE0) : (I915_MAX_PLANES))); })
/kernel/linux/linux-5.10/drivers/gpu/drm/i915/
Di915_drv.h740 u16 plane[I915_MAX_PLANES];
751 u8 plane[I915_MAX_PLANES];
1279 BUILD_BUG_ON(I915_MAX_PLANES > INTEL_FRONTBUFFER_BITS_PER_PIPE); \
Dintel_pm.c4800 u16 total[I915_MAX_PLANES] = {}; in skl_allocate_pipe_ddb()
4801 u16 uv_total[I915_MAX_PLANES] = {}; in skl_allocate_pipe_ddb()
4805 u64 plane_data_rate[I915_MAX_PLANES] = {}; in skl_allocate_pipe_ddb()
4806 u64 uv_plane_data_rate[I915_MAX_PLANES] = {}; in skl_allocate_pipe_ddb()