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Searched refs:PLL4 (Results 1 – 13 of 13) sorted by relevance

/kernel/linux/linux-5.10/include/dt-bindings/clock/
Dqcom,lcc-ipq806x.h9 #define PLL4 0 macro
Dqcom,lcc-mdm9615.h11 #define PLL4 0 macro
Dqcom,lcc-msm8960.h9 #define PLL4 0 macro
Dstm32mp1-clks.h186 #define PLL4 179 macro
/kernel/linux/linux-5.10/arch/arm/boot/dts/
Dstm32mp157c-odyssey.dts35 assigned-clock-rates = <125000000>; /* Clock PLL4 to 750Mhz in ATF/U-Boot */
/kernel/linux/linux-5.10/drivers/clk/qcom/
Dlcc-ipq806x.c394 [PLL4] = &pll4.clkr,
Dlcc-mdm9615.c481 [PLL4] = &pll4.clkr,
Dlcc-msm8960.c479 [PLL4] = &pll4.clkr,
/kernel/linux/linux-5.10/drivers/net/wireless/ath/ath9k/
Dreg.h1377 #define PLL4 0x1618c macro
Dhw.c745 while ((REG_READ(ah, PLL4) & PLL4_MEAS_DONE) == 0) { in ar9003_get_pll_sqsum_dvc()
/kernel/linux/linux-5.10/arch/arm64/boot/dts/ti/
Dk3-am65-main.dtsi861 * Set vp2 clk (DPI_1_IN_CLK) mux to PLL4 via
/kernel/linux/linux-5.10/drivers/clk/
Dclk-stm32mp1.c1689 PLL(PLL4, "pll4", "ref4", CLK_IGNORE_UNUSED, RCC_PLL4CR),
/kernel/linux/patches/linux-5.10/imx8mm_patch/patches/drivers/
D0015_linux_drivers_clk.patch5213 + * VIDEOPLL - PLL4
5490 + * VIDEOPLL - PLL4