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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/display/bridge/
Drenesas,dw-hdmi.txt1 Renesas Gen3 DWC HDMI TX Encoder
4 The HDMI transmitter is a Synopsys DesignWare HDMI 1.4 TX controller IP
7 These DT bindings follow the Synopsys DWC HDMI TX bindings defined in
15 - "renesas,r8a774a1-hdmi" for R8A774A1 (RZ/G2M) compatible HDMI TX
16 - "renesas,r8a774b1-hdmi" for R8A774B1 (RZ/G2N) compatible HDMI TX
17 - "renesas,r8a774e1-hdmi" for R8A774E1 (RZ/G2H) compatible HDMI TX
18 - "renesas,r8a7795-hdmi" for R8A7795 (R-Car H3) compatible HDMI TX
19 - "renesas,r8a7796-hdmi" for R8A7796 (R-Car M3-W) compatible HDMI TX
20 - "renesas,r8a77961-hdmi" for R8A77961 (R-Car M3-W+) compatible HDMI TX
21 - "renesas,r8a77965-hdmi" for R8A77965 (R-Car M3-N) compatible HDMI TX
[all …]
Ddw_hdmi.txt1 Synopsys DesignWare HDMI TX Encoder
5 TX Encoder (DWC HDMI TX). It doesn't constitue a device tree binding
13 - reg: Memory mapped base address and length of the DWC HDMI TX registers.
19 - interrupts: Reference to the DWC HDMI TX interrupt.
24 - clock-names: The DWC HDMI TX uses the following clocks.
30 - ports: The connectivity of the DWC HDMI TX with the rest of the system is
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/net/
Dmicrel-ksz90x1.txt51 - txen-skew-ps : Skew control of TX CTL pad
56 - txd0-skew-ps : Skew control of TX data 0 pad
57 - txd1-skew-ps : Skew control of TX data 1 pad
58 - txd2-skew-ps : Skew control of TX data 2 pad
59 - txd3-skew-ps : Skew control of TX data 3 pad
73 - txc-skew-ps : Skew control of TX clock pad
78 - txen-skew-ps : Skew control of TX CTL pad
83 - txd0-skew-ps : Skew control of TX data 0 pad
84 - txd1-skew-ps : Skew control of TX data 1 pad
85 - txd2-skew-ps : Skew control of TX data 2 pad
[all …]
Dxilinx_axienet.txt7 segments of memory for buffering TX and RX, as well as the capability of
8 offloading TX/RX checksum calculation off the processor.
24 - interrupts : Should be a list of 2 or 3 interrupts: TX DMA, RX DMA,
26 specified, the TX/RX DMA interrupts should be on that node
37 - xlnx,txcsum : 0 or empty for disabling TX checksum offload,
38 1 to enable partial TX checksum offload,
39 2 to enable full TX checksum offload
49 device (DMA registers and DMA TX/RX interrupts) rather
Dlantiq,xrx200-net.txt9 - interrupts : TX and RX DMA interrupts. Use interrupt-names "tx" for
10 : the TX interrupt and "rx" for the RX interrupt.
/kernel/linux/linux-5.10/drivers/spi/
Dspi-loopback-test.c85 .tx_buf = TX(0),
99 .tx_buf = TX(PAGE_SIZE - 4),
112 .tx_buf = TX(0),
137 .tx_buf = TX(0),
141 .tx_buf = TX(SPI_TEST_MAX_SIZE_HALF),
154 .tx_buf = TX(64),
158 .tx_buf = TX(0),
172 .tx_buf = TX(0),
175 .tx_buf = TX(64),
188 .tx_buf = TX(0),
[all …]
/kernel/linux/linux-5.10/Documentation/input/devices/
Dwalkera0701.rst24 Cable: (walkera TX to parport)
26 Walkera WK-0701 TX S-VIDEO connector::
28 (back side of TX)
45 walkera0701 module, check dmesg for error messages. Connect TX to PC by
46 cable and run jstest /dev/input/js0 to see values from TX. If no value can
47 be changed by TX "joystick", check output from /proc/interrupts. Value for
48 (usually irq7) parport must increase if TX is on.
113 directly controlled from TX). Binary representations are the same as in first
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/dma/
Dste-dma40.txt60 bidirectional, i.e. the same for RX and TX operations:
111 49: Crypto Accelerator 1 TX or Hash Accelerator 1 TX
112 50: Hash Accelerator 1 TX
113 51: memcpy TX (to be used by the DMA driver for memcpy operations)
124 62: Crypto Accelerator 0 TX or Hash Accelerator 0 TX
125 63: Hash Accelerator 0 TX
/kernel/linux/linux-5.10/Documentation/networking/
Dmac80211-auth-assoc-deauth.txt31 mac80211->driver: TX directed probe request
35 mac80211->driver: TX auth frame
39 mac80211->driver: TX auth frame
59 mac80211->driver: TX assoc
86 mac80211->driver: TX deauth/disassoc
Ddriver.rst45 And then at the end of your TX reclamation event handling::
73 For example, this means that it is not allowed for your TX
74 mitigation scheme to let TX packets "hang out" in the TX
75 ring unreclaimed forever if no new TX packets are sent.
Daf_xdp.rst25 TX ring. A socket can receive packets on the RX ring and it can send
26 packets on the TX ring. These rings are registered and sized with the
28 to have at least one of these rings for each socket. An RX or TX
30 UMEM. RX and TX can share the same UMEM so that a packet does not have
31 to be copied between RX and TX. Moreover, if a packet needs to be kept
48 space, for either TX or RX. Thus, the frame addrs appearing in the
50 TX ring. In summary, the RX and FILL rings are used for the RX path
51 and the TX and COMPLETION rings are used for the TX path.
65 process has to create its own socket with associated RX and TX rings,
129 TX. All rings are single-producer/single-consumer, so the user-space
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/sound/
Dnvidia,tegra30-ahub.txt61 For TX CIFs, the numbers indicate the bit position within the AHUB routing
62 registers (APBIF 0..3 TX, I2S 0..5 TX, DAM 0..2 TX, SPDIF TX 0..1).
/kernel/linux/linux-5.10/arch/arm64/boot/dts/amlogic/
Dmeson-gxbb-nanopi-k2.dts197 gpio-line-names = "UART TX", "UART RX", "Power Control", "Power Key In",
210 "Eth RX D3", "Eth RGMII TX Clk", "Eth TX En",
211 "Eth TX D0", "Eth TX D1", "Eth TX D2", "Eth TX D3",
246 "Bluetooth UART TX", "Bluetooth UART RX",
Dmeson-gxbb-odroidc2.dts255 gpio-line-names = "UART TX", "UART RX", "VCCK En", "TF 3V3/1V8 En",
268 "Eth RX D3", "Eth RGMII TX Clk", "Eth TX En",
269 "Eth TX D0", "Eth TX D1", "Eth TX D2", "Eth TX D3",
/kernel/linux/linux-5.10/drivers/usb/chipidea/
Dudc.c60 return num + ((dir == TX) ? 16 : 0); in hw_ep_bit()
126 (dir == TX) ? ENDPTCTRL_TXE : ENDPTCTRL_RXE, 0); in hw_ep_disable()
143 if (dir == TX) { in hw_ep_enable()
176 u32 mask = (dir == TX) ? ENDPTCTRL_TXS : ENDPTCTRL_RXS; in hw_ep_get_halt()
228 u32 mask_xs = (dir == TX) ? ENDPTCTRL_TXS : ENDPTCTRL_RXS; in hw_ep_set_halt()
229 u32 mask_xr = (dir == TX) ? ENDPTCTRL_TXR : ENDPTCTRL_RXR; in hw_ep_set_halt()
374 if (hwep->type == USB_ENDPOINT_XFER_ISOC && hwep->dir == TX) { in add_td_to_list()
420 return ((ep->dir == TX) ? USB_ENDPOINT_DIR_MASK : 0) | ep->num; in _usb_addr()
454 if (hwreq->req.zero && hwreq->req.length && hwep->dir == TX in prepare_td_for_non_sg()
701 if (hwep->dir == TX) { in _hardware_dequeue()
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/media/i2c/
Dtc358743.txt1 * Toshiba TC358743 HDMI-RX to MIPI CSI2-TX Bridge
3 The Toshiba TC358743 HDMI-RX to MIPI CSI2-TX (H2C) is a bridge that converts
4 a HDMI stream to MIPI CSI-2 TX. It is programmable through I2C.
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/display/imx/
Dhdmi.txt1 Freescale i.MX6 DWC HDMI TX Encoder
4 The HDMI transmitter is a Synopsys DesignWare HDMI 1.4 TX controller IP
7 These DT bindings follow the Synopsys DWC HDMI TX bindings defined in
/kernel/linux/linux-5.10/Documentation/networking/device_drivers/ethernet/ti/
Dtlan.rst31 0e11 ae32 Compaq Netelligent 10/100 TX PCI UTP
34 0e11 ae40 Compaq Netelligent Dual 10/100 TX PCI UTP
35 0e11 ae43 Compaq Netelligent Integrated 10/100 TX UTP
36 0e11 b011 Compaq Netelligent 10/100 TX Embedded UTP
38 0e11 b030 Compaq Netelligent 10/100 TX UTP
/kernel/linux/linux-5.10/Documentation/userspace-api/media/cec/
Dcec-ioc-receive.rst179 :ref:`CEC_TX_STATUS_ARB_LOST <CEC-TX-STATUS-ARB-LOST>` status bit is set.
185 :ref:`CEC_TX_STATUS_NACK <CEC-TX-STATUS-NACK>` status bit is set.
191 :ref:`CEC_TX_STATUS_LOW_DRIVE <CEC-TX-STATUS-LOW-DRIVE>` status bit is set.
197 valid if the :ref:`CEC_TX_STATUS_ERROR <CEC-TX-STATUS-ERROR>` status bit is set.
241 * .. _`CEC-TX-STATUS-OK`:
246 exclusive with :ref:`CEC_TX_STATUS_MAX_RETRIES <CEC-TX-STATUS-MAX-RETRIES>`.
249 * .. _`CEC-TX-STATUS-ARB-LOST`:
256 * .. _`CEC-TX-STATUS-NACK`:
264 * .. _`CEC-TX-STATUS-LOW-DRIVE`:
272 * .. _`CEC-TX-STATUS-ERROR`:
[all …]
/kernel/linux/linux-5.10/sound/soc/fsl/
Dfsl_ssi.c56 #define TX 1 macro
402 int dir = tx ? TX : RX; in fsl_ssi_config_enable()
422 srcr = vals[RX].srcr | vals[TX].srcr; in fsl_ssi_config_enable()
423 stcr = vals[RX].stcr | vals[TX].stcr; in fsl_ssi_config_enable()
424 sier = vals[RX].sier | vals[TX].sier; in fsl_ssi_config_enable()
506 int adir = tx ? RX : TX; in fsl_ssi_config_disable()
507 int dir = tx ? TX : RX; in fsl_ssi_config_disable()
588 vals[TX].sier = SSI_SIER_TFE0_EN | FSLSSI_SIER_DBG_TX_FLAGS; in fsl_ssi_setup_regvals()
589 vals[TX].stcr = SSI_STCR_TFEN0; in fsl_ssi_setup_regvals()
590 vals[TX].scr = SSI_SCR_SSIEN | SSI_SCR_TE; in fsl_ssi_setup_regvals()
[all …]
Dfsl_sai.c52 int adir = (dir == TX) ? RX : TX; in fsl_sai_dir_is_synced()
353 int adir = tx ? RX : TX; in fsl_sai_set_bclk()
354 int dir = tx ? TX : RX; in fsl_sai_set_bclk()
445 int adir = tx ? RX : TX; in fsl_sai_hw_params()
550 bool tx = dir == TX; in fsl_sai_config_disable()
587 int adir = tx ? RX : TX; in fsl_sai_trigger()
588 int dir = tx ? TX : RX; in fsl_sai_trigger()
597 sai->synchronous[TX] ? FSL_SAI_CR2_SYNC : 0); in fsl_sai_trigger()
1070 sai->synchronous[TX] = false; in fsl_sai_probe()
1085 sai->synchronous[TX] = true; in fsl_sai_probe()
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/mailbox/
Dhisilicon,hi6220-mailbox.txt23 slot_id: Slot id used either for TX or RX
26 TX/RX interrupt to application processor,
36 flag" mode or IRQ generated mode to acknowledge a TX
/kernel/linux/linux-5.10/Documentation/networking/device_drivers/ethernet/stmicro/
Dstmmac.rst78 - Programmable TX and RX Watchdog and Coalesce Settings
84 - Frame Preemption for TX and RX
87 - Multiple Scheduling Algorithms (TX: WRR, DWRR, WFQ, SP, CBS, EST, TBS;
173 This parameter changes the default LPI TX Expiration time in milliseconds.
308 To enter in TX LPI mode the driver needs to have a software timer that enable
380 9) Core is able to perform TX Checksum and/or RX Checksum in HW::
414 20) Limit the maximum TX and RX FIFO size::
419 21) Use the specified number of TX and RX Queues::
424 22) Use the specified TX and RX scheduling algorithm::
429 23) Internal TX and RX Queue parameters::
[all …]
/kernel/linux/linux-5.10/drivers/net/ethernet/3com/
DKconfig92 3C990-TX, 3CR990-TX-95, 3CR990-TX-97, 3CR990-FX-95, 3CR990-FX-97,
94 3CR990-FX-97 Server, 3C990B-TX-M, 3C990BSVR
/kernel/linux/linux-5.10/arch/arm/boot/dts/
Dsama5d3_can.dtsi20 …AT91_PIOD 15 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PD15 periph C TX, conflicts with CTS0, SPI0_NPCS…
28 AT91_PIOB 15 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB15 periph B TX, conflicts with GCOL */

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