Searched refs:base_clk (Results 1 – 12 of 12) sorted by relevance
| /kernel/linux/linux-5.10/drivers/mmc/host/ |
| D | sdhci-pic32.c | 48 struct clk *base_clk; member
55 return clk_get_rate(sdhci_pdata->base_clk); in pic32_sdhci_get_max_clock()
179 sdhci_pdata->base_clk = devm_clk_get(&pdev->dev, "base_clk"); in pic32_sdhci_probe()
180 if (IS_ERR(sdhci_pdata->base_clk)) { in pic32_sdhci_probe()
181 ret = PTR_ERR(sdhci_pdata->base_clk); in pic32_sdhci_probe()
186 ret = clk_prepare_enable(sdhci_pdata->base_clk); in pic32_sdhci_probe()
210 clk_disable_unprepare(sdhci_pdata->base_clk); in pic32_sdhci_probe()
228 clk_disable_unprepare(sdhci_pdata->base_clk); in pic32_sdhci_remove()
|
| D | sdhci-sprd.c | 191 static inline u32 sdhci_sprd_calc_div(u32 base_clk, u32 clk) in sdhci_sprd_calc_div() argument
196 if (base_clk <= clk * 2) in sdhci_sprd_calc_div()
199 div = (u32) (base_clk / (clk * 2)); in sdhci_sprd_calc_div()
201 if ((base_clk / div) > (clk * 2)) in sdhci_sprd_calc_div()
|
| /kernel/linux/linux-5.10/drivers/clk/sunxi/ |
| D | clk-a10-pll2.c | 42 struct clk **clks, *base_clk, *prediv_clk; in sun4i_pll2_setup() local
95 base_clk = clk_register_composite(NULL, "pll2-base", in sun4i_pll2_setup()
101 if (IS_ERR(base_clk)) { in sun4i_pll2_setup()
106 parent = __clk_get_name(base_clk); in sun4i_pll2_setup()
|
| /kernel/linux/linux-5.10/drivers/pwm/ |
| D | pwm-samsung.c | 88 struct clk *base_clk; member
158 rate = clk_get_rate(chip->base_clk); in pwm_samsung_get_tin_rate()
549 chip->base_clk = devm_clk_get(&pdev->dev, "timers"); in pwm_samsung_probe()
550 if (IS_ERR(chip->base_clk)) { in pwm_samsung_probe()
552 return PTR_ERR(chip->base_clk); in pwm_samsung_probe()
555 ret = clk_prepare_enable(chip->base_clk); in pwm_samsung_probe()
574 clk_disable_unprepare(chip->base_clk); in pwm_samsung_probe()
579 clk_get_rate(chip->base_clk), in pwm_samsung_probe()
595 clk_disable_unprepare(chip->base_clk); in pwm_samsung_remove()
|
| /kernel/linux/linux-5.10/drivers/spi/ |
| D | spi-pic32-sqi.c | 141 struct clk *base_clk; /* drives spi clock */ member
170 div = clk_get_rate(sqi->base_clk) / (2 * sck); in pic32_sqi_set_clk_rate()
603 sqi->base_clk = devm_clk_get(&pdev->dev, "spi_ck"); in pic32_sqi_probe()
604 if (IS_ERR(sqi->base_clk)) { in pic32_sqi_probe()
605 ret = PTR_ERR(sqi->base_clk); in pic32_sqi_probe()
616 ret = clk_prepare_enable(sqi->base_clk); in pic32_sqi_probe()
645 master->max_speed_hz = clk_get_rate(sqi->base_clk); in pic32_sqi_probe()
673 clk_disable_unprepare(sqi->base_clk); in pic32_sqi_probe()
690 clk_disable_unprepare(sqi->base_clk); in pic32_sqi_remove()
|
| D | spi-bcm-qspi.c | 204 u32 base_clk; member
574 spbr = qspi->base_clk / (2 * xp->speed_hz); in bcm_qspi_hw_set_parms()
601 qspi->base_clk = MSPI_BASE_FREQ * 4; in bcm_qspi_hw_set_parms()
1421 qspi->base_clk = clk_get_rate(qspi->clk); in bcm_qspi_probe()
1423 qspi->base_clk = MSPI_BASE_FREQ; in bcm_qspi_probe()
1437 qspi->max_speed_hz = qspi->base_clk / (bcm_qspi_spbr_min(qspi) * 2); in bcm_qspi_probe()
|
| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/mmc/ |
| D | microchip,sdhci-pic32.txt | 9 - clock-names: Should be "base_clk", "sys_clk".
24 clock-names = "base_clk", "sys_clk";
|
| /kernel/linux/linux-5.10/arch/arm/boot/dts/ |
| D | nspire.dtsi | 34 base_clk: base_clk { label
42 clocks = <&base_clk>;
|
| D | nspire-classic.dtsi | 46 &base_clk {
|
| D | nspire-cx.dts | 38 &base_clk {
|
| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/clock/ |
| D | nspire-clock.txt | 23 clocks = <&base_clk>;
|
| /kernel/linux/linux-5.10/arch/mips/boot/dts/pic32/ |
| D | pic32mzda.dtsi | 233 clock-names = "base_clk", "sys_clk";
|