Searched refs:frame_ctrl (Results 1 – 9 of 9) sorted by relevance
102 u32 frame_ctrl; member268 ch->frame_ctrl &= ~PITCH_MASK; in dcss_dpr_addr_set()269 ch->frame_ctrl |= (((u32)pitch << PITCH_POS) & PITCH_MASK); in dcss_dpr_addr_set()349 dcss_dpr_write(ch, ch->frame_ctrl, DCSS_DPR_FRAME_CTRL0); in dcss_dpr_enable()551 ch->frame_ctrl &= ~(HFLIP_EN | VFLIP_EN | ROT_ENC_MASK); in dcss_dpr_set_rotation()553 ch->frame_ctrl |= rotation & DRM_MODE_REFLECT_X ? HFLIP_EN : 0; in dcss_dpr_set_rotation()554 ch->frame_ctrl |= rotation & DRM_MODE_REFLECT_Y ? VFLIP_EN : 0; in dcss_dpr_set_rotation()557 ch->frame_ctrl |= 1 << ROT_ENC_POS; in dcss_dpr_set_rotation()559 ch->frame_ctrl |= 2 << ROT_ENC_POS; in dcss_dpr_set_rotation()561 ch->frame_ctrl |= 3 << ROT_ENC_POS; in dcss_dpr_set_rotation()
207 uint32_t frame_ctrl; in msm_hdmi_bridge_mode_set() local247 frame_ctrl = 0; in msm_hdmi_bridge_mode_set()249 frame_ctrl |= HDMI_FRAME_CTRL_HSYNC_LOW; in msm_hdmi_bridge_mode_set()251 frame_ctrl |= HDMI_FRAME_CTRL_VSYNC_LOW; in msm_hdmi_bridge_mode_set()253 frame_ctrl |= HDMI_FRAME_CTRL_INTERLACED_EN; in msm_hdmi_bridge_mode_set()254 DBG("frame_ctrl=%08x", frame_ctrl); in msm_hdmi_bridge_mode_set()255 hdmi_write(hdmi, REG_HDMI_FRAME_CTRL, frame_ctrl); in msm_hdmi_bridge_mode_set()
584 __le16 frame_ctrl; member642 __le16 frame_ctrl; member
279 u16 frame_ctrl; member300 u16 frame_ctrl; member
1093 unsigned int frame_ctrl; in pch_gbe_tx_queue() local1097 frame_ctrl = 0; in pch_gbe_tx_queue()1099 frame_ctrl |= PCH_GBE_TXD_CTRL_APAD; in pch_gbe_tx_queue()1101 frame_ctrl |= PCH_GBE_TXD_CTRL_TCPIP_ACC_OFF; in pch_gbe_tx_queue()1109 frame_ctrl |= PCH_GBE_TXD_CTRL_APAD | in pch_gbe_tx_queue()1180 tx_desc->tx_frame_ctrl = (frame_ctrl); in pch_gbe_tx_queue()
431 __le16 frame_ctrl; member
3305 u32 frame_ctrl; member
1459 __le16 frame_ctrl; member
11347 ch->frame_ctrl &= ~PITCH_MASK;11348 ch->frame_ctrl |= (((u32)pitch << PITCH_POS) & PITCH_MASK);