| /kernel/linux/linux-5.10/arch/powerpc/kernel/ |
| D | rtas-proc.c | 513 int num_states = 0; in ppc_rtas_process_sensor() local
522 num_states = sizeof(key_switch) / sizeof(char *); in ppc_rtas_process_sensor()
523 if (state < num_states) { in ppc_rtas_process_sensor()
530 num_states = sizeof(enclosure_switch) / sizeof(char *); in ppc_rtas_process_sensor()
531 if (state < num_states) { in ppc_rtas_process_sensor()
543 num_states = sizeof(lid_status) / sizeof(char *); in ppc_rtas_process_sensor()
544 if (state < num_states) { in ppc_rtas_process_sensor()
551 num_states = sizeof(power_source) / sizeof(char *); in ppc_rtas_process_sensor()
552 if (state < num_states) { in ppc_rtas_process_sensor()
563 num_states = sizeof(battery_remaining) / sizeof(char *); in ppc_rtas_process_sensor()
[all …]
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| /kernel/linux/linux-5.10/net/netfilter/ipvs/ |
| D | ip_vs_proto_ah_esp.c | 119 .num_states = 1,
141 .num_states = 1,
|
| D | ip_vs_proto_udp.c | 485 .num_states = IP_VS_UDP_S_LAST,
|
| D | ip_vs_proto_sctp.c | 577 .num_states = IP_VS_SCTP_S_LAST,
|
| D | ip_vs_proto_tcp.c | 728 .num_states = IP_VS_TCP_S_LAST,
|
| D | ip_vs_sync.c | 1001 if (state >= pp->num_states) { in ip_vs_process_message_v0()
1160 if (state >= pp->num_states) { in ip_vs_proc_sync_conn()
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| /kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/dcn30/ |
| D | dcn30_resource.c | 182 .num_states = 1,
1802 dcn3_0_soc.num_states = in init_soc_bounding_box()
1803 le32_to_cpu(bb->num_states); in init_soc_bounding_box()
1805 for (i = 0; i < dcn3_0_soc.num_states; i++) { in init_soc_bounding_box()
1982 if (vlevel < context->bw_ctx.dml.soc.num_states) in dcn30_internal_validate_bw()
1985 if (fast_validate || vlevel == context->bw_ctx.dml.soc.num_states || in dcn30_internal_validate_bw()
1998 if (vlevel < context->bw_ctx.dml.soc.num_states) { in dcn30_internal_validate_bw()
2021 if (vlevel == context->bw_ctx.dml.soc.num_states) in dcn30_internal_validate_bw()
2186 vba->ValidationStatus[vba->soc.num_states] = DML_FAIL_DSC_VALIDATION_FAILURE; in dcn30_internal_validate_bw()
2399 …_status_message(context->bw_ctx.dml.vba.ValidationStatus[context->bw_ctx.dml.vba.soc.num_states])); in dcn30_validate_bandwidth()
[all …]
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| /kernel/linux/linux-5.10/drivers/gpu/drm/amd/amdgpu/ |
| D | amdgpu_socbb.h | 78 uint32_t num_states; member
|
| /kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/dcn20/ |
| D | dcn20_resource.c | 299 .num_states = 5,
410 .num_states = 5,
2715 for (vlevel_split = vlevel; vlevel <= context->bw_ctx.dml.soc.num_states; vlevel++)
2720 if (vlevel > context->bw_ctx.dml.soc.num_states)
2867 if (vlevel > context->bw_ctx.dml.soc.num_states)
2938 context->bw_ctx.dml.vba.ValidationStatus[context->bw_ctx.dml.vba.soc.num_states] =
3177 …_status_message(context->bw_ctx.dml.vba.ValidationStatus[context->bw_ctx.dml.vba.soc.num_states]));
3426 for (i = 0; i < bb->num_states; i++) {
3461 for (i = bb->num_states - 1; i > 1; i--) {
3482 bb->num_states--;
[all …]
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| D | dcn20_resource.h | 102 struct pp_smu_nv_clock_table *max_clocks, unsigned int *uclk_states, unsigned int num_states);
|
| /kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/dcn21/ |
| D | dcn21_resource.c | 304 .num_states = 8
1035 ASSERT(vlevel < dml->soc.num_states); in calculate_wm_set_for_vlevel()
1214 …_status_message(context->bw_ctx.dml.vba.ValidationStatus[context->bw_ctx.dml.vba.soc.num_states])); in dcn21_validate_bandwidth_fp()
1420 for (closest_clk_lvl = 0, j = dcn2_1_soc.num_states - 1; j >= 0; j--) { in update_bw_bounding_box()
1444 dcn2_1_soc.num_states = clk_table->num_entries; in update_bw_bounding_box()
1446 …dcn2_1_soc.clock_limits[dcn2_1_soc.num_states] = dcn2_1_soc.clock_limits[dcn2_1_soc.num_states - 1… in update_bw_bounding_box()
1447 dcn2_1_soc.clock_limits[dcn2_1_soc.num_states].state = dcn2_1_soc.num_states; in update_bw_bounding_box()
|
| /kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/ |
| D | dm_pp_smu.h | 229 unsigned int *clock_values_in_khz, unsigned int *num_states);
|
| /kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/dml/dcn30/ |
| D | display_mode_vba_30.c | 2056 v->soc.clock_limits[mode_lib->soc.num_states - 1].dispclk_mhz, in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
3952 for (i = 0; i < v->soc.num_states; i++) { in dml30_ModeSupportAndSystemConfigurationFull()
3961 …utODMCombine >= v->MaxDispclk[i] && v->MaxDispclk[i] == v->MaxDispclk[mode_lib->soc.num_states - 1] in dml30_ModeSupportAndSystemConfigurationFull()
3962 && v->MaxDppclk[i] == v->MaxDppclk[mode_lib->soc.num_states - 1])) { in dml30_ModeSupportAndSystemConfigurationFull()
3967 …MCombine2To1 >= v->MaxDispclk[i] && v->MaxDispclk[i] == v->MaxDispclk[mode_lib->soc.num_states - 1] in dml30_ModeSupportAndSystemConfigurationFull()
3968 && v->MaxDppclk[i] == v->MaxDppclk[mode_lib->soc.num_states - 1])) { in dml30_ModeSupportAndSystemConfigurationFull()
3973 …MCombine4To1 >= v->MaxDispclk[i] && v->MaxDispclk[i] == v->MaxDispclk[mode_lib->soc.num_states - 1] in dml30_ModeSupportAndSystemConfigurationFull()
3974 && v->MaxDppclk[i] == v->MaxDppclk[mode_lib->soc.num_states - 1])) { in dml30_ModeSupportAndSystemConfigurationFull()
4082 …(v->MaxDispclk[i] == v->MaxDispclk[v->soc.num_states - 1] && v->MaxDppclk[i] == v->MaxDppclk[v->so… in dml30_ModeSupportAndSystemConfigurationFull()
4108 for (i = 0; i < v->soc.num_states; i++) { in dml30_ModeSupportAndSystemConfigurationFull()
[all …]
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| /kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/dml/dcn20/ |
| D | display_mode_vba_20.c | 1260 mode_lib->vba.soc.clock_limits[mode_lib->vba.soc.num_states].dispclk_mhz, in dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2598 for (k = 0; k <= mode_lib->vba.soc.num_states; k++) in dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
3441 for (i = 0; i <= mode_lib->vba.soc.num_states; i++) { in dml20_ModeSupportAndSystemConfigurationFull()
3523 for (i = 0; i <= mode_lib->vba.soc.num_states; i++) { in dml20_ModeSupportAndSystemConfigurationFull()
3874 for (i = 0; i <= mode_lib->vba.soc.num_states; i++) { in dml20_ModeSupportAndSystemConfigurationFull()
3889 && i == mode_lib->vba.soc.num_states) in dml20_ModeSupportAndSystemConfigurationFull()
3896 && i == mode_lib->vba.soc.num_states) in dml20_ModeSupportAndSystemConfigurationFull()
3970 if (i != mode_lib->vba.soc.num_states) { in dml20_ModeSupportAndSystemConfigurationFull()
4002 for (i = 0; i <= mode_lib->vba.soc.num_states; i++) { in dml20_ModeSupportAndSystemConfigurationFull()
4019 for (i = 0; i <= mode_lib->vba.soc.num_states; i++) { in dml20_ModeSupportAndSystemConfigurationFull()
[all …]
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| D | display_mode_vba_20v2.c | 1320 mode_lib->vba.soc.clock_limits[mode_lib->vba.soc.num_states].dispclk_mhz, in dml20v2_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
2671 for (k = 0; k <= mode_lib->vba.soc.num_states; k++) in dml20v2_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
3514 for (i = 0; i <= mode_lib->vba.soc.num_states; i++) { in dml20v2_ModeSupportAndSystemConfigurationFull()
3596 for (i = 0; i <= mode_lib->vba.soc.num_states; i++) { in dml20v2_ModeSupportAndSystemConfigurationFull()
3947 for (i = 0; i <= mode_lib->vba.soc.num_states; i++) { in dml20v2_ModeSupportAndSystemConfigurationFull()
3949 mode_lib->vba.MaxDispclk[mode_lib->vba.soc.num_states], in dml20v2_ModeSupportAndSystemConfigurationFull()
3966 && i == mode_lib->vba.soc.num_states) in dml20v2_ModeSupportAndSystemConfigurationFull()
3973 && i == mode_lib->vba.soc.num_states) in dml20v2_ModeSupportAndSystemConfigurationFull()
4050 if (i != mode_lib->vba.soc.num_states) { in dml20v2_ModeSupportAndSystemConfigurationFull()
4082 for (i = 0; i <= mode_lib->vba.soc.num_states; i++) { in dml20v2_ModeSupportAndSystemConfigurationFull()
[all …]
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| /kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/dml/dcn21/ |
| D | display_mode_vba_21.c | 1639 mode_lib->vba.soc.clock_limits[mode_lib->vba.soc.num_states - 1].dispclk_mhz, in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
3547 for (i = 0; i <= mode_lib->vba.soc.num_states; i++) { in dml21_ModeSupportAndSystemConfigurationFull()
3589 for (i = 0; i <= mode_lib->vba.soc.num_states; i++) { in dml21_ModeSupportAndSystemConfigurationFull()
3943 for (i = 0; i <= mode_lib->vba.soc.num_states; i++) { in dml21_ModeSupportAndSystemConfigurationFull()
3945 mode_lib->vba.MaxDispclk[mode_lib->vba.soc.num_states], in dml21_ModeSupportAndSystemConfigurationFull()
3967 && i == mode_lib->vba.soc.num_states) in dml21_ModeSupportAndSystemConfigurationFull()
3974 && i == mode_lib->vba.soc.num_states) in dml21_ModeSupportAndSystemConfigurationFull()
4051 if (i != mode_lib->vba.soc.num_states) { in dml21_ModeSupportAndSystemConfigurationFull()
4083 for (i = 0; i <= mode_lib->vba.soc.num_states; i++) { in dml21_ModeSupportAndSystemConfigurationFull()
4100 for (i = 0; i <= mode_lib->vba.soc.num_states; i++) { in dml21_ModeSupportAndSystemConfigurationFull()
[all …]
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| /kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/dml/ |
| D | display_mode_structs.h | 74 unsigned int num_states; member
|
| D | display_mode_lib.c | 258 for (i = mode_lib->vba.soc.num_states; i >= 0; i--) { in dml_log_mode_support_params()
|
| D | display_mode_vba.c | 245 for (i = 0; i < mode_lib->vba.soc.num_states; i++) in fetch_socbb_params()
263 for (i = 0; i <= mode_lib->vba.soc.num_states; i++) { in fetch_socbb_params()
|
| /kernel/linux/linux-5.10/drivers/gpu/drm/amd/pm/inc/ |
| D | amdgpu_smu.h | 507 int (*get_uclk_dpm_states)(struct smu_context *smu, uint32_t *clocks_in_khz, uint32_t *num_states);
801 unsigned int *num_states);
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| /kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/amdgpu_dm/ |
| D | amdgpu_dm_pp_smu.c | 836 unsigned int *clock_values_in_khz, unsigned int *num_states) in pp_nv_get_uclk_dpm_states() argument
849 clock_values_in_khz, num_states)) in pp_nv_get_uclk_dpm_states()
|
| /kernel/linux/linux-5.10/drivers/gpu/drm/amd/pm/swsmu/smu11/ |
| D | navi10_ppt.c | 1761 … navi10_get_uclk_dpm_states(struct smu_context *smu, uint32_t *clocks_in_khz, uint32_t *num_states) in navi10_get_uclk_dpm_states() argument
1769 if (!clocks_in_khz || !num_states || !table_context->driver_pptable) in navi10_get_uclk_dpm_states()
1779 *num_states = num_discrete_levels; in navi10_get_uclk_dpm_states()
|
| D | sienna_cichlid_ppt.c | 1591 …cichlid_get_uclk_dpm_states(struct smu_context *smu, uint32_t *clocks_in_khz, uint32_t *num_states) in sienna_cichlid_get_uclk_dpm_states() argument
1599 if (!clocks_in_khz || !num_states || !table_context->driver_pptable) in sienna_cichlid_get_uclk_dpm_states()
1609 *num_states = num_discrete_levels; in sienna_cichlid_get_uclk_dpm_states()
|
| /kernel/linux/linux-5.10/drivers/gpu/drm/amd/pm/swsmu/ |
| D | amdgpu_smu.c | 2624 unsigned int *num_states) in smu_get_uclk_dpm_states() argument
2634 ret = smu->ppt_funcs->get_uclk_dpm_states(smu, clock_values_in_khz, num_states); in smu_get_uclk_dpm_states()
|
| /kernel/linux/linux-5.10/sound/soc/ |
| D | soc-pcm.c | 2913 int num_states) in snd_soc_dpcm_check_state() argument
2928 for (i = 0; i < num_states; i++) { in snd_soc_dpcm_check_state()
|