Searched refs:postdiv1 (Results 1 – 10 of 10) sorted by relevance
| /kernel/linux/linux-5.10/drivers/clk/pistachio/ |
| D | clk-pll.c | 240 (params->postdiv1 != old_postdiv1 || in pll_gf40lp_frac_set_rate()
244 if (params->postdiv2 > params->postdiv1) in pll_gf40lp_frac_set_rate()
253 (params->postdiv1 << PLL_FRAC_CTRL2_POSTDIV1_SHIFT) | in pll_gf40lp_frac_set_rate()
273 u64 val, prediv, fbdiv, frac, postdiv1, postdiv2, rate; in pll_gf40lp_frac_recalc_rate() local
280 postdiv1 = (val >> PLL_FRAC_CTRL2_POSTDIV1_SHIFT) & in pll_gf40lp_frac_recalc_rate()
293 rate = do_div_round_closest(rate, (prediv * postdiv1 * postdiv2) << 24); in pll_gf40lp_frac_recalc_rate()
386 (params->postdiv1 != old_postdiv1 || in pll_gf40lp_laint_set_rate()
390 if (params->postdiv2 > params->postdiv1) in pll_gf40lp_laint_set_rate()
399 (params->postdiv1 << PLL_INT_CTRL1_POSTDIV1_SHIFT) | in pll_gf40lp_laint_set_rate()
413 u32 val, prediv, fbdiv, postdiv1, postdiv2; in pll_gf40lp_laint_recalc_rate() local
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| D | clk.h | 99 unsigned long long postdiv1; member
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| /kernel/linux/linux-5.10/drivers/clk/rockchip/ |
| D | clk-pll.c | 147 rate->postdiv1 = ((pllcon >> RK3036_PLLCON0_POSTDIV1_SHIFT) in rockchip_rk3036_pll_get_params()
183 do_div(rate64, cur.postdiv1); in rockchip_rk3036_pll_recalc_rate()
201 __func__, rate->rate, rate->fbdiv, rate->postdiv1, rate->refdiv, in rockchip_rk3036_pll_set_params()
216 HIWORD_UPDATE(rate->postdiv1, RK3036_PLLCON0_POSTDIV1_MASK, in rockchip_rk3036_pll_set_params()
318 cur.fbdiv, cur.postdiv1, cur.refdiv, cur.postdiv2, in rockchip_rk3036_pll_init()
321 rate->fbdiv, rate->postdiv1, rate->refdiv, rate->postdiv2, in rockchip_rk3036_pll_init()
324 if (rate->fbdiv != cur.fbdiv || rate->postdiv1 != cur.postdiv1 || in rockchip_rk3036_pll_init()
631 rate->postdiv1 = ((pllcon >> RK3399_PLLCON1_POSTDIV1_SHIFT) in rockchip_rk3399_pll_get_params()
665 do_div(rate64, cur.postdiv1); in rockchip_rk3399_pll_recalc_rate()
683 __func__, rate->rate, rate->fbdiv, rate->postdiv1, rate->refdiv, in rockchip_rk3399_pll_set_params()
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| D | clk.h | 203 .postdiv1 = _postdiv1, \
252 unsigned int postdiv1; member
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| /kernel/linux/linux-5.10/drivers/gpu/drm/msm/dsi/pll/ |
| D | dsi_pll_28nm_8960.c | 55 u8 postdiv1; member
347 cached_state->postdiv1 = in dsi_pll_28nm_save_state()
373 cached_state->postdiv1); in dsi_pll_28nm_restore_state()
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| D | dsi_pll_28nm.c | 65 u8 postdiv1; member
447 cached_state->postdiv1 = in dsi_pll_28nm_save_state()
471 cached_state->postdiv1); in dsi_pll_28nm_restore_state()
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| /kernel/linux/linux-5.10/drivers/clk/ |
| D | clk-bm1880.c | 478 u32 postdiv1, postdiv2, denominator; in bm1880_pll_rate_calc() local
482 postdiv1 = (regval >> 8) & 0x7; in bm1880_pll_rate_calc()
486 denominator = refdiv * postdiv1 * postdiv2; in bm1880_pll_rate_calc()
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| /kernel/linux/patches/linux-5.10/yangfan_patch/ |
| D | drivers.patch | 881 + u32 *postdiv1,
888 + for (*postdiv1 = 1; *postdiv1 <= 7; (*postdiv1)++) {
890 + freq = fout_hz * (*postdiv1) * (*postdiv2);
898 + pr_err("CANNOT FIND postdiv1/2 to make fout in range from 800M to 2000M,fout = %lu\n",
901 + *postdiv1 = 1;
913 + /* FIXME set postdiv1/2 always 1*/
916 + u32 f_frac, postdiv1, postdiv2;
922 + rockchip_pll_clk_set_postdiv(fout_hz, &postdiv1, &postdiv2, &foutvco);
923 + rate_table->postdiv1 = postdiv1;
936 + pr_debug("fin = %lu, fout = %lu, clk_gcd = %lu, refdiv = %u, fbdiv = %u, postdiv1 = %u, postdiv2…
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| /kernel/linux/patches/linux-5.10/hispark_taurus_patch/ |
| D | hispark_taurus.patch | 17103 + intf_sync_attr.user_intf_sync_attr.user_sync_pll.postdiv1 = 7;
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| /kernel/linux/patches/linux-4.19/hispark_taurus_patch/ |
| D | hispark_taurus.patch | 300140 + intf_sync_attr.user_intf_sync_attr.user_sync_pll.postdiv1 = 7;
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