Searched refs:reference_div (Results 1 – 12 of 12) sorted by relevance
122 p1pll->reference_div = RREG32_PLL(RADEON_PPLL_REF_DIV) & 0x3ff; in radeon_read_clocks_OF()123 if (p1pll->reference_div < 2) in radeon_read_clocks_OF()124 p1pll->reference_div = 12; in radeon_read_clocks_OF()125 p2pll->reference_div = p1pll->reference_div; in radeon_read_clocks_OF()151 spll->reference_div = mpll->reference_div = in radeon_read_clocks_OF()198 if (p1pll->reference_div < 2) { in radeon_get_clock_info()202 p1pll->reference_div = in radeon_get_clock_info()205 p1pll->reference_div = tmp & RADEON_PPLL_REF_DIV_MASK; in radeon_get_clock_info()206 if (p1pll->reference_div < 2) in radeon_get_clock_info()207 p1pll->reference_div = 12; in radeon_get_clock_info()[all …]
741 uint32_t reference_div = 0; in radeon_set_pll() local820 &reference_div, &post_divider); in radeon_set_pll()833 reference_div, in radeon_set_pll()836 pll_ref_div = reference_div; in radeon_set_pll()
991 ref_div_min = pll->reference_div; in radeon_compute_pll_avivo()997 ref_div_max = pll->reference_div; in radeon_compute_pll_avivo()1156 min_ref_div = max_ref_div = pll->reference_div; in radeon_compute_pll_legacy()
170 uint32_t reference_div; member
750 p1pll->reference_div = RBIOS16(pll_info + 0x10); in radeon_combios_get_clock_info()767 spll->reference_div = RBIOS16(pll_info + 0x1c); in radeon_combios_get_clock_info()782 mpll->reference_div = RBIOS16(pll_info + 0x28); in radeon_combios_get_clock_info()
1150 p1pll->reference_div = 0; in radeon_atom_get_clock_info()1196 spll->reference_div = 0; in radeon_atom_get_clock_info()1223 mpll->reference_div = 0; in radeon_atom_get_clock_info()
1097 pll->reference_div = radeon_crtc->pll_reference_div; in atombios_crtc_set_pll()
142 ref_div_min = pll->reference_div; in amdgpu_pll_compute()148 ref_div_max = pll->reference_div; in amdgpu_pll_compute()
420 spll->reference_div = 0; in amdgpu_atomfirmware_get_clock_info()443 mpll->reference_div = 0; in amdgpu_atomfirmware_get_clock_info()
196 uint32_t reference_div; member
578 ppll->reference_div = 0; in amdgpu_atombios_get_clock_info()618 spll->reference_div = 0; in amdgpu_atombios_get_clock_info()645 mpll->reference_div = 0; in amdgpu_atombios_get_clock_info()
851 pll->reference_div = amdgpu_crtc->pll_reference_div; in amdgpu_atombios_crtc_set_pll()