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Searched refs:scl_data (Results 1 – 23 of 23) sorted by relevance

/kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/dcn10/
Ddcn10_dpp_dscl.c298 const struct scaler_data *scl_data, in dpp1_dscl_set_scl_filter() argument
305 uint32_t h_2tap_sharp_factor = scl_data->sharpness.horz; in dpp1_dscl_set_scl_filter()
306 uint32_t v_2tap_sharp_factor = scl_data->sharpness.vert; in dpp1_dscl_set_scl_filter()
313 h_2tap_hardcode_coef_en = scl_data->taps.h_taps < 3 in dpp1_dscl_set_scl_filter()
314 && scl_data->taps.h_taps_c < 3 in dpp1_dscl_set_scl_filter()
315 && (scl_data->taps.h_taps > 1 && scl_data->taps.h_taps_c > 1); in dpp1_dscl_set_scl_filter()
316 v_2tap_hardcode_coef_en = scl_data->taps.v_taps < 3 in dpp1_dscl_set_scl_filter()
317 && scl_data->taps.v_taps_c < 3 in dpp1_dscl_set_scl_filter()
318 && (scl_data->taps.v_taps > 1 && scl_data->taps.v_taps_c > 1); in dpp1_dscl_set_scl_filter()
335 scl_data->taps.h_taps, scl_data->ratios.horz); in dpp1_dscl_set_scl_filter()
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Ddcn10_dpp.c134 struct scaler_data *scl_data, in dpp1_get_optimal_number_of_taps() argument
138 if (scl_data->format == PIXEL_FORMAT_FP16 && in dpp1_get_optimal_number_of_taps()
140 scl_data->ratios.horz.value != dc_fixpt_one.value && in dpp1_get_optimal_number_of_taps()
141 scl_data->ratios.vert.value != dc_fixpt_one.value) in dpp1_get_optimal_number_of_taps()
144 if (scl_data->viewport.width > scl_data->h_active && in dpp1_get_optimal_number_of_taps()
146 scl_data->viewport.width > dpp->ctx->dc->debug.max_downscale_src_width) in dpp1_get_optimal_number_of_taps()
152 if (scl_data->ratios.horz.value == (4ll << 32)) in dpp1_get_optimal_number_of_taps()
153 scl_data->ratios.horz.value--; in dpp1_get_optimal_number_of_taps()
154 if (scl_data->ratios.vert.value == (4ll << 32)) in dpp1_get_optimal_number_of_taps()
155 scl_data->ratios.vert.value--; in dpp1_get_optimal_number_of_taps()
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Ddcn10_hw_sequencer.c2278 switch (pipe_ctx->plane_res.scl_data.format) { in dcn10_get_surface_visual_confirm_color()
2320 switch (top_pipe_ctx->plane_res.scl_data.format) { in dcn10_get_hdr_visual_confirm_color()
2461 pipe_ctx->plane_res.scl_data.lb_params.alpha_en = per_pixel_alpha; in update_scaler()
2462 pipe_ctx->plane_res.scl_data.lb_params.depth = LB_PIXEL_DEPTH_30BPP; in update_scaler()
2465 pipe_ctx->plane_res.dpp, &pipe_ctx->plane_res.scl_data); in update_scaler()
2555 size.surface_size = pipe_ctx->plane_res.scl_data.viewport; in dcn10_update_dchubp_dpp()
2579 &pipe_ctx->plane_res.scl_data.viewport, in dcn10_update_dchubp_dpp()
2580 &pipe_ctx->plane_res.scl_data.viewport_c); in dcn10_update_dchubp_dpp()
2804 …if (memcmp(&old_pipe->plane_res.scl_data, &new_pipe->plane_res.scl_data, sizeof(struct scaler_data… in dcn10_disconnect_pipes()
2808 …if (memcmp(&old_pipe->plane_res.scl_data.viewport, &new_pipe->plane_res.scl_data.viewport, sizeof(… in dcn10_disconnect_pipes()
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Ddcn10_dpp.h1359 struct scaler_data scl_data; member
1390 const struct scaler_data *scl_data,
1482 const struct scaler_data *scl_data);
1505 struct scaler_data *scl_data,
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/dcn30/
Ddcn30_dpp.c377 struct scaler_data *scl_data, in dpp3_get_optimal_number_of_taps() argument
386 if (scl_data->viewport.width != scl_data->h_active && in dpp3_get_optimal_number_of_taps()
387 scl_data->viewport.height != scl_data->v_active && in dpp3_get_optimal_number_of_taps()
389 scl_data->format == PIXEL_FORMAT_FP16) in dpp3_get_optimal_number_of_taps()
392 if (scl_data->viewport.width > scl_data->h_active && in dpp3_get_optimal_number_of_taps()
394 scl_data->viewport.width > dpp->ctx->dc->debug.max_downscale_src_width) in dpp3_get_optimal_number_of_taps()
403 if (dc_fixpt_ceil(scl_data->ratios.horz) > 1) in dpp3_get_optimal_number_of_taps()
404 scl_data->taps.h_taps = min(2 * dc_fixpt_ceil(scl_data->ratios.horz), 8); in dpp3_get_optimal_number_of_taps()
406 scl_data->taps.h_taps = 4; in dpp3_get_optimal_number_of_taps()
408 scl_data->taps.h_taps = in_taps->h_taps; in dpp3_get_optimal_number_of_taps()
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Ddcn30_dpp.h557 struct scaler_data scl_data; member
Ddcn30_resource.c2034 && memcmp(&mpo_pipe->plane_res.scl_data.recout, in dcn30_internal_validate_bw()
2035 &pipe->plane_res.scl_data.recout, in dcn30_internal_validate_bw()
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/dce60/
Ddce60_hw_sequencer.c151 default_adjust.surface_pixel_format = pipe_ctx->plane_res.scl_data.format; in dce60_set_default_colors()
158 default_adjust.lb_color_depth = pipe_ctx->plane_res.scl_data.lb_params.depth; in dce60_set_default_colors()
202 switch (pipe_ctx->plane_res.scl_data.format) { in dce60_get_surface_visual_confirm_color()
248 pipe_ctx->plane_res.scl_data.lb_params.depth, in dce60_program_scaler()
266 &pipe_ctx->plane_res.scl_data); in dce60_program_scaler()
312 pipe_ctx->plane_res.scl_data.lb_params.alpha_en = pipe_ctx->bottom_pipe != 0; in dce60_program_front_end_for_pipe()
371 pipe_ctx->plane_res.scl_data.viewport.width, in dce60_program_front_end_for_pipe()
372 pipe_ctx->plane_res.scl_data.viewport.height, in dce60_program_front_end_for_pipe()
373 pipe_ctx->plane_res.scl_data.viewport.x, in dce60_program_front_end_for_pipe()
374 pipe_ctx->plane_res.scl_data.viewport.y, in dce60_program_front_end_for_pipe()
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/kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/dcn20/
Ddcn20_dpp.c269 const struct scaler_data *scl_data, in dscl2_calc_lb_num_partitions() argument
277 int line_size = scl_data->viewport.width < scl_data->recout.width ? in dscl2_calc_lb_num_partitions()
278 scl_data->viewport.width : scl_data->recout.width; in dscl2_calc_lb_num_partitions()
279 int line_size_c = scl_data->viewport_c.width < scl_data->recout.width ? in dscl2_calc_lb_num_partitions()
280 scl_data->viewport_c.width : scl_data->recout.width; in dscl2_calc_lb_num_partitions()
314 if (scl_data->lb_params.alpha_en in dscl2_calc_lb_num_partitions()
Ddcn20_hwseq.c1308 …if (memcmp(&old_pipe->plane_res.scl_data, &new_pipe->plane_res.scl_data, sizeof(struct scaler_data… in dcn20_detect_pipe_changes()
1311 …if (memcmp(&old_pipe->plane_res.scl_data.viewport, &new_pipe->plane_res.scl_data.viewport, sizeof(… in dcn20_detect_pipe_changes()
1312 || memcmp(&old_pipe->plane_res.scl_data.viewport_c, in dcn20_detect_pipe_changes()
1313 &new_pipe->plane_res.scl_data.viewport_c, sizeof(struct rect))) in dcn20_detect_pipe_changes()
1451 pipe_ctx->plane_res.scl_data.lb_params.alpha_en = pipe_ctx->plane_state->per_pixel_alpha; in dcn20_update_dchubp_dpp()
1452 ASSERT(pipe_ctx->plane_res.scl_data.lb_params.depth == LB_PIXEL_DEPTH_30BPP); in dcn20_update_dchubp_dpp()
1455 pipe_ctx->plane_res.dpp, &pipe_ctx->plane_res.scl_data); in dcn20_update_dchubp_dpp()
1465 &pipe_ctx->plane_res.scl_data.viewport, in dcn20_update_dchubp_dpp()
1466 &pipe_ctx->plane_res.scl_data.viewport_c); in dcn20_update_dchubp_dpp()
1543 size.surface_size = pipe_ctx->plane_res.scl_data.viewport; in dcn20_update_dchubp_dpp()
Ddcn20_dpp.h695 struct scaler_data scl_data; member
748 const struct scaler_data *scl_data,
Ddcn20_resource.c1892 struct scaler_data *sd = &prev_odm_pipe->plane_res.scl_data; in dcn20_split_stream_for_odm()
1909 sd = &next_odm_pipe->plane_res.scl_data; in dcn20_split_stream_for_odm()
2268 struct scaler_data *scl = &res_ctx->pipe_ctx[i].plane_res.scl_data;
2323 pipes[pipe_cnt].pipe.dest.full_recout_width += split_pipe->plane_res.scl_data.recout.width;
2328 pipes[pipe_cnt].pipe.dest.full_recout_width += split_pipe->plane_res.scl_data.recout.width;
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/dce/
Ddce_transform.c1179 struct scaler_data *scl_data, in dce_transform_get_optimal_number_of_taps() argument
1183 int pixel_width = scl_data->viewport.width; in dce_transform_get_optimal_number_of_taps()
1187 (scl_data->viewport.width > scl_data->recout.width)) in dce_transform_get_optimal_number_of_taps()
1188 pixel_width = scl_data->recout.width; in dce_transform_get_optimal_number_of_taps()
1192 scl_data->lb_params.depth, in dce_transform_get_optimal_number_of_taps()
1208 scl_data->taps.h_taps = decide_taps(scl_data->ratios.horz, in_taps->h_taps, false); in dce_transform_get_optimal_number_of_taps()
1209 scl_data->taps.v_taps = decide_taps(scl_data->ratios.vert, in_taps->v_taps, false); in dce_transform_get_optimal_number_of_taps()
1210 scl_data->taps.h_taps_c = decide_taps(scl_data->ratios.horz_c, in_taps->h_taps, true); in dce_transform_get_optimal_number_of_taps()
1211 scl_data->taps.v_taps_c = decide_taps(scl_data->ratios.vert_c, in_taps->v_taps, true); in dce_transform_get_optimal_number_of_taps()
1213 if (!IDENTITY_RATIO(scl_data->ratios.vert)) { in dce_transform_get_optimal_number_of_taps()
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Ddce_transform.h672 struct scaler_data *scl_data,
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/calcs/
Ddcn_calcs.c340 input->src.viewport_width = pipe->plane_res.scl_data.viewport.width; in pipe_ctx_to_e2e_pipe_params()
341 input->src.viewport_height = pipe->plane_res.scl_data.viewport.height; in pipe_ctx_to_e2e_pipe_params()
342 input->src.data_pitch = pipe->plane_res.scl_data.viewport.width; in pipe_ctx_to_e2e_pipe_params()
343 input->src.data_pitch_c = pipe->plane_res.scl_data.viewport.width; in pipe_ctx_to_e2e_pipe_params()
398 input->scale_taps.htaps = pipe->plane_res.scl_data.taps.h_taps; in pipe_ctx_to_e2e_pipe_params()
399 input->scale_ratio_depth.hscl_ratio = pipe->plane_res.scl_data.ratios.horz.value/4294967296.0; in pipe_ctx_to_e2e_pipe_params()
400 input->scale_ratio_depth.vscl_ratio = pipe->plane_res.scl_data.ratios.vert.value/4294967296.0; in pipe_ctx_to_e2e_pipe_params()
401 input->scale_ratio_depth.vinit = pipe->plane_res.scl_data.inits.v.value/4294967296.0; in pipe_ctx_to_e2e_pipe_params()
404 input->scale_taps.vtaps = pipe->plane_res.scl_data.taps.v_taps; in pipe_ctx_to_e2e_pipe_params()
405 input->scale_taps.vtaps_c = pipe->plane_res.scl_data.taps.v_taps_c; in pipe_ctx_to_e2e_pipe_params()
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Ddce_calcs.c2799 data->src_width[num_displays + 4] = bw_int_to_fixed(pipe[i].plane_res.scl_data.viewport.width); in populate_initial_data()
2801 data->src_height[num_displays + 4] = bw_int_to_fixed(pipe[i].plane_res.scl_data.viewport.height); in populate_initial_data()
2802 data->h_taps[num_displays + 4] = bw_int_to_fixed(pipe[i].plane_res.scl_data.taps.h_taps); in populate_initial_data()
2803 data->v_taps[num_displays + 4] = bw_int_to_fixed(pipe[i].plane_res.scl_data.taps.v_taps); in populate_initial_data()
2804 …data->h_scale_ratio[num_displays + 4] = fixed31_32_to_bw_fixed(pipe[i].plane_res.scl_data.ratios.h… in populate_initial_data()
2805 …data->v_scale_ratio[num_displays + 4] = fixed31_32_to_bw_fixed(pipe[i].plane_res.scl_data.ratios.v… in populate_initial_data()
2853 …data->src_height[num_displays * 2 + j] = bw_int_to_fixed(pipe[i].bottom_pipe->plane_res.scl_data.v… in populate_initial_data()
2854 …data->src_width[num_displays * 2 + j] = bw_int_to_fixed(pipe[i].bottom_pipe->plane_res.scl_data.vi… in populate_initial_data()
2857 …data->h_taps[num_displays * 2 + j] = bw_int_to_fixed(pipe[i].bottom_pipe->plane_res.scl_data.taps.… in populate_initial_data()
2858 …data->v_taps[num_displays * 2 + j] = bw_int_to_fixed(pipe[i].bottom_pipe->plane_res.scl_data.taps.… in populate_initial_data()
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/kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/core/
Ddc_resource.c654 struct scaler_data *data = &pipe_ctx->plane_res.scl_data; in calculate_viewport()
774 struct scaler_data *data = &pipe_ctx->plane_res.scl_data; in calculate_recout()
850 pipe_ctx->plane_res.scl_data.ratios.horz = dc_fixpt_from_fraction( in calculate_scaling_ratios()
853 pipe_ctx->plane_res.scl_data.ratios.vert = dc_fixpt_from_fraction( in calculate_scaling_ratios()
858 pipe_ctx->plane_res.scl_data.ratios.horz.value *= 2; in calculate_scaling_ratios()
860 pipe_ctx->plane_res.scl_data.ratios.vert.value *= 2; in calculate_scaling_ratios()
862 pipe_ctx->plane_res.scl_data.ratios.vert.value = div64_s64( in calculate_scaling_ratios()
863 pipe_ctx->plane_res.scl_data.ratios.vert.value * in_h, out_h); in calculate_scaling_ratios()
864 pipe_ctx->plane_res.scl_data.ratios.horz.value = div64_s64( in calculate_scaling_ratios()
865 pipe_ctx->plane_res.scl_data.ratios.horz.value * in_w, out_w); in calculate_scaling_ratios()
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Ddc.c475 pipes->plane_res.scl_data.lb_params.depth, in dc_stream_set_dither_option()
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/dce110/
Ddce110_transform_v.c50 const struct scaler_data *scl_data, in calculate_viewport() argument
55 luma_viewport->x = scl_data->viewport.x - scl_data->viewport.x % 2; in calculate_viewport()
56 luma_viewport->y = scl_data->viewport.y - scl_data->viewport.y % 2; in calculate_viewport()
58 scl_data->viewport.width - scl_data->viewport.width % 2; in calculate_viewport()
60 scl_data->viewport.height - scl_data->viewport.height % 2; in calculate_viewport()
66 if (scl_data->format == PIXEL_FORMAT_420BPP8) { in calculate_viewport()
Ddce110_hw_sequencer.c1272 switch (pipe_ctx->plane_res.scl_data.format) { in get_surface_visual_confirm_color()
1322 pipe_ctx->plane_res.scl_data.lb_params.depth, in program_scaler()
1340 &pipe_ctx->plane_res.scl_data); in program_scaler()
1494 pipe_ctx->plane_res.scl_data.lb_params.alpha_en = pipe_ctx->bottom_pipe != 0; in apply_single_controller_ctx_to_hw()
2189 default_adjust.surface_pixel_format = pipe_ctx->plane_res.scl_data.format; in set_default_colors()
2196 default_adjust.lb_color_depth = pipe_ctx->plane_res.scl_data.lb_params.depth; in set_default_colors()
2580 pipe_ctx->plane_res.scl_data.lb_params.alpha_en = pipe_ctx->bottom_pipe != 0; in dce110_program_front_end_for_pipe()
2639 pipe_ctx->plane_res.scl_data.viewport.width, in dce110_program_front_end_for_pipe()
2640 pipe_ctx->plane_res.scl_data.viewport.height, in dce110_program_front_end_for_pipe()
2641 pipe_ctx->plane_res.scl_data.viewport.x, in dce110_program_front_end_for_pipe()
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/kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/inc/hw/
Dtransform.h190 const struct scaler_data *scl_data);
199 struct scaler_data *scl_data,
301 const struct scaler_data *scl_data,
Ddpp.h144 const struct scaler_data *scl_data);
153 struct scaler_data *scl_data,
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/inc/
Dcore_types.h277 struct scaler_data scl_data; member