| /kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/calcs/ |
| D | dcn_calc_auto.c | 40 void scaler_settings_calculation(struct dcn_bw_internal_vars *v) in scaler_settings_calculation() argument
43 for (k = 0; k <= v->number_of_active_planes - 1; k++) { in scaler_settings_calculation()
44 if (v->allow_different_hratio_vratio == dcn_bw_yes) { in scaler_settings_calculation()
45 if (v->source_scan[k] == dcn_bw_hor) { in scaler_settings_calculation()
46 v->h_ratio[k] = v->viewport_width[k] / v->scaler_rec_out_width[k]; in scaler_settings_calculation()
47 v->v_ratio[k] = v->viewport_height[k] / v->scaler_recout_height[k]; in scaler_settings_calculation()
50 v->h_ratio[k] = v->viewport_height[k] / v->scaler_rec_out_width[k]; in scaler_settings_calculation()
51 v->v_ratio[k] = v->viewport_width[k] / v->scaler_recout_height[k]; in scaler_settings_calculation()
55 if (v->source_scan[k] == dcn_bw_hor) { in scaler_settings_calculation()
56 …v->h_ratio[k] =dcn_bw_max2(v->viewport_width[k] / v->scaler_rec_out_width[k], v->viewport_height[k… in scaler_settings_calculation()
[all …]
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| /kernel/linux/linux-5.10/drivers/media/platform/ |
| D | imx-pxp.h | 19 #define BF_PXP_CTRL_SFTRST(v) \ argument
20 (((v) << 31) & BM_PXP_CTRL_SFTRST)
22 #define BF_PXP_CTRL_CLKGATE(v) \ argument
23 (((v) << 30) & BM_PXP_CTRL_CLKGATE)
25 #define BF_PXP_CTRL_RSVD4(v) \ argument
26 (((v) << 29) & BM_PXP_CTRL_RSVD4)
28 #define BF_PXP_CTRL_EN_REPEAT(v) \ argument
29 (((v) << 28) & BM_PXP_CTRL_EN_REPEAT)
31 #define BF_PXP_CTRL_ENABLE_ROTATE1(v) \ argument
32 (((v) << 27) & BM_PXP_CTRL_ENABLE_ROTATE1)
[all …]
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| /kernel/linux/linux-5.10/include/asm-generic/ |
| D | atomic-long.h | 27 atomic_long_read(const atomic_long_t *v) in atomic_long_read() argument
29 return atomic64_read(v); in atomic_long_read()
33 atomic_long_read_acquire(const atomic_long_t *v) in atomic_long_read_acquire() argument
35 return atomic64_read_acquire(v); in atomic_long_read_acquire()
39 atomic_long_set(atomic_long_t *v, long i) in atomic_long_set() argument
41 atomic64_set(v, i); in atomic_long_set()
45 atomic_long_set_release(atomic_long_t *v, long i) in atomic_long_set_release() argument
47 atomic64_set_release(v, i); in atomic_long_set_release()
51 atomic_long_add(long i, atomic_long_t *v) in atomic_long_add() argument
53 atomic64_add(i, v); in atomic_long_add()
[all …]
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| D | atomic-instrumented.h | 25 atomic_read(const atomic_t *v) in atomic_read() argument
27 instrument_atomic_read(v, sizeof(*v)); in atomic_read()
28 return arch_atomic_read(v); in atomic_read()
34 atomic_read_acquire(const atomic_t *v) in atomic_read_acquire() argument
36 instrument_atomic_read(v, sizeof(*v)); in atomic_read_acquire()
37 return arch_atomic_read_acquire(v); in atomic_read_acquire()
43 atomic_set(atomic_t *v, int i) in atomic_set() argument
45 instrument_atomic_write(v, sizeof(*v)); in atomic_set()
46 arch_atomic_set(v, i); in atomic_set()
52 atomic_set_release(atomic_t *v, int i) in atomic_set_release() argument
[all …]
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| /kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/dml/dcn30/ |
| D | display_mode_vba_30.c | 1921 struct vba_vars_st *v = &mode_lib->vba; in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() local
1924 unsigned int PrefetchMode = v->PrefetchModePerState[v->VoltageLevel][v->maxMpcComb]; in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1931 v->WritebackDISPCLK = 0.0; in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1932 v->DISPCLKWithRamping = 0; in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1933 v->DISPCLKWithoutRamping = 0; in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1934 v->GlobalDPPCLK = 0.0; in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1936 v->IdealSDPPortBandwidthPerState[v->VoltageLevel][v->maxMpcComb] = dml_min3( in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1937 v->ReturnBusWidth * v->DCFCLK, in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1938 v->DRAMSpeedPerState[v->VoltageLevel] * v->NumberOfChannels * v->DRAMChannelWidth, in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1939 v->FabricClockPerState[v->VoltageLevel] * v->FabricDatapathToDCNDataReturn); in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
[all …]
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| /kernel/linux/linux-5.10/drivers/gpu/host1x/hw/ |
| D | hw_host1x01_uclass.h | 48 static inline u32 host1x_uclass_incr_syncpt_cond_f(u32 v) in host1x_uclass_incr_syncpt_cond_f() argument
50 return (v & 0xff) << 8; in host1x_uclass_incr_syncpt_cond_f()
52 #define HOST1X_UCLASS_INCR_SYNCPT_COND_F(v) \ argument
53 host1x_uclass_incr_syncpt_cond_f(v)
54 static inline u32 host1x_uclass_incr_syncpt_indx_f(u32 v) in host1x_uclass_incr_syncpt_indx_f() argument
56 return (v & 0xff) << 0; in host1x_uclass_incr_syncpt_indx_f()
58 #define HOST1X_UCLASS_INCR_SYNCPT_INDX_F(v) \ argument
59 host1x_uclass_incr_syncpt_indx_f(v)
66 static inline u32 host1x_uclass_wait_syncpt_indx_f(u32 v) in host1x_uclass_wait_syncpt_indx_f() argument
68 return (v & 0xff) << 24; in host1x_uclass_wait_syncpt_indx_f()
[all …]
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| D | hw_host1x04_uclass.h | 48 static inline u32 host1x_uclass_incr_syncpt_cond_f(u32 v) in host1x_uclass_incr_syncpt_cond_f() argument
50 return (v & 0xff) << 8; in host1x_uclass_incr_syncpt_cond_f()
52 #define HOST1X_UCLASS_INCR_SYNCPT_COND_F(v) \ argument
53 host1x_uclass_incr_syncpt_cond_f(v)
54 static inline u32 host1x_uclass_incr_syncpt_indx_f(u32 v) in host1x_uclass_incr_syncpt_indx_f() argument
56 return (v & 0xff) << 0; in host1x_uclass_incr_syncpt_indx_f()
58 #define HOST1X_UCLASS_INCR_SYNCPT_INDX_F(v) \ argument
59 host1x_uclass_incr_syncpt_indx_f(v)
66 static inline u32 host1x_uclass_wait_syncpt_indx_f(u32 v) in host1x_uclass_wait_syncpt_indx_f() argument
68 return (v & 0xff) << 24; in host1x_uclass_wait_syncpt_indx_f()
[all …]
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| D | hw_host1x02_uclass.h | 48 static inline u32 host1x_uclass_incr_syncpt_cond_f(u32 v) in host1x_uclass_incr_syncpt_cond_f() argument
50 return (v & 0xff) << 8; in host1x_uclass_incr_syncpt_cond_f()
52 #define HOST1X_UCLASS_INCR_SYNCPT_COND_F(v) \ argument
53 host1x_uclass_incr_syncpt_cond_f(v)
54 static inline u32 host1x_uclass_incr_syncpt_indx_f(u32 v) in host1x_uclass_incr_syncpt_indx_f() argument
56 return (v & 0xff) << 0; in host1x_uclass_incr_syncpt_indx_f()
58 #define HOST1X_UCLASS_INCR_SYNCPT_INDX_F(v) \ argument
59 host1x_uclass_incr_syncpt_indx_f(v)
66 static inline u32 host1x_uclass_wait_syncpt_indx_f(u32 v) in host1x_uclass_wait_syncpt_indx_f() argument
68 return (v & 0xff) << 24; in host1x_uclass_wait_syncpt_indx_f()
[all …]
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| D | hw_host1x06_uclass.h | 48 static inline u32 host1x_uclass_incr_syncpt_cond_f(u32 v) in host1x_uclass_incr_syncpt_cond_f() argument
50 return (v & 0xff) << 10; in host1x_uclass_incr_syncpt_cond_f()
52 #define HOST1X_UCLASS_INCR_SYNCPT_COND_F(v) \ argument
53 host1x_uclass_incr_syncpt_cond_f(v)
54 static inline u32 host1x_uclass_incr_syncpt_indx_f(u32 v) in host1x_uclass_incr_syncpt_indx_f() argument
56 return (v & 0xff) << 0; in host1x_uclass_incr_syncpt_indx_f()
58 #define HOST1X_UCLASS_INCR_SYNCPT_INDX_F(v) \ argument
59 host1x_uclass_incr_syncpt_indx_f(v)
66 static inline u32 host1x_uclass_wait_syncpt_indx_f(u32 v) in host1x_uclass_wait_syncpt_indx_f() argument
68 return (v & 0xff) << 24; in host1x_uclass_wait_syncpt_indx_f()
[all …]
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| D | hw_host1x07_uclass.h | 48 static inline u32 host1x_uclass_incr_syncpt_cond_f(u32 v) in host1x_uclass_incr_syncpt_cond_f() argument
50 return (v & 0xff) << 10; in host1x_uclass_incr_syncpt_cond_f()
52 #define HOST1X_UCLASS_INCR_SYNCPT_COND_F(v) \ argument
53 host1x_uclass_incr_syncpt_cond_f(v)
54 static inline u32 host1x_uclass_incr_syncpt_indx_f(u32 v) in host1x_uclass_incr_syncpt_indx_f() argument
56 return (v & 0xff) << 0; in host1x_uclass_incr_syncpt_indx_f()
58 #define HOST1X_UCLASS_INCR_SYNCPT_INDX_F(v) \ argument
59 host1x_uclass_incr_syncpt_indx_f(v)
66 static inline u32 host1x_uclass_wait_syncpt_indx_f(u32 v) in host1x_uclass_wait_syncpt_indx_f() argument
68 return (v & 0xff) << 24; in host1x_uclass_wait_syncpt_indx_f()
[all …]
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| D | hw_host1x05_uclass.h | 48 static inline u32 host1x_uclass_incr_syncpt_cond_f(u32 v) in host1x_uclass_incr_syncpt_cond_f() argument
50 return (v & 0xff) << 8; in host1x_uclass_incr_syncpt_cond_f()
52 #define HOST1X_UCLASS_INCR_SYNCPT_COND_F(v) \ argument
53 host1x_uclass_incr_syncpt_cond_f(v)
54 static inline u32 host1x_uclass_incr_syncpt_indx_f(u32 v) in host1x_uclass_incr_syncpt_indx_f() argument
56 return (v & 0xff) << 0; in host1x_uclass_incr_syncpt_indx_f()
58 #define HOST1X_UCLASS_INCR_SYNCPT_INDX_F(v) \ argument
59 host1x_uclass_incr_syncpt_indx_f(v)
66 static inline u32 host1x_uclass_wait_syncpt_indx_f(u32 v) in host1x_uclass_wait_syncpt_indx_f() argument
68 return (v & 0xff) << 24; in host1x_uclass_wait_syncpt_indx_f()
[all …]
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| /kernel/linux/linux-5.10/drivers/iio/adc/ |
| D | stm32-dfsdm.h | 48 #define DFSDM_CHCFGR1_SITP(v) FIELD_PREP(DFSDM_CHCFGR1_SITP_MASK, v) argument
50 #define DFSDM_CHCFGR1_SPICKSEL(v) FIELD_PREP(DFSDM_CHCFGR1_SPICKSEL_MASK, v) argument
52 #define DFSDM_CHCFGR1_SCDEN(v) FIELD_PREP(DFSDM_CHCFGR1_SCDEN_MASK, v) argument
54 #define DFSDM_CHCFGR1_CKABEN(v) FIELD_PREP(DFSDM_CHCFGR1_CKABEN_MASK, v) argument
56 #define DFSDM_CHCFGR1_CHEN(v) FIELD_PREP(DFSDM_CHCFGR1_CHEN_MASK, v) argument
58 #define DFSDM_CHCFGR1_CHINSEL(v) FIELD_PREP(DFSDM_CHCFGR1_CHINSEL_MASK, v) argument
60 #define DFSDM_CHCFGR1_DATMPX(v) FIELD_PREP(DFSDM_CHCFGR1_DATMPX_MASK, v) argument
62 #define DFSDM_CHCFGR1_DATPACK(v) FIELD_PREP(DFSDM_CHCFGR1_DATPACK_MASK, v) argument
64 #define DFSDM_CHCFGR1_CKOUTDIV(v) FIELD_PREP(DFSDM_CHCFGR1_CKOUTDIV_MASK, v) argument
66 #define DFSDM_CHCFGR1_CKOUTSRC(v) FIELD_PREP(DFSDM_CHCFGR1_CKOUTSRC_MASK, v) argument
[all …]
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| /kernel/linux/linux-5.10/arch/sh/mm/ |
| D | flush-sh4.c | 16 reg_size_t aligned_start, v, cnt, end; in sh4__flush_wback_region() local
19 v = aligned_start & ~(L1_CACHE_BYTES-1); in sh4__flush_wback_region()
22 cnt = (end - v) / L1_CACHE_BYTES; in sh4__flush_wback_region()
25 __ocbwb(v); v += L1_CACHE_BYTES; in sh4__flush_wback_region()
26 __ocbwb(v); v += L1_CACHE_BYTES; in sh4__flush_wback_region()
27 __ocbwb(v); v += L1_CACHE_BYTES; in sh4__flush_wback_region()
28 __ocbwb(v); v += L1_CACHE_BYTES; in sh4__flush_wback_region()
29 __ocbwb(v); v += L1_CACHE_BYTES; in sh4__flush_wback_region()
30 __ocbwb(v); v += L1_CACHE_BYTES; in sh4__flush_wback_region()
31 __ocbwb(v); v += L1_CACHE_BYTES; in sh4__flush_wback_region()
[all …]
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| /kernel/linux/linux-5.10/arch/x86/lib/ |
| D | atomic64_386_32.S | 27 IRQ_SAVE v;
32 IRQ_RESTORE v; \
35 #define v %ecx macro
37 movl (v), %eax
38 movl 4(v), %edx
41 #undef v
43 #define v %esi macro
45 movl %ebx, (v)
46 movl %ecx, 4(v)
49 #undef v
[all …]
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| /kernel/linux/linux-5.10/sound/soc/qcom/ |
| D | lpass-lpaif-reg.h | 11 #define LPAIF_I2SCTL_REG_ADDR(v, addr, port) \ argument
12 (v->i2sctrl_reg_base + (addr) + v->i2sctrl_reg_stride * (port))
14 #define LPAIF_I2SCTL_REG(v, port) LPAIF_I2SCTL_REG_ADDR(v, 0x0, (port)) argument
68 #define LPAIF_IRQ_REG_ADDR(v, addr, port) \ argument
69 (v->irq_reg_base + (addr) + v->irq_reg_stride * (port))
73 #define LPAIF_IRQEN_REG(v, port) LPAIF_IRQ_REG_ADDR(v, 0x0, (port)) argument
74 #define LPAIF_IRQSTAT_REG(v, port) LPAIF_IRQ_REG_ADDR(v, 0x4, (port)) argument
75 #define LPAIF_IRQCLEAR_REG(v, port) LPAIF_IRQ_REG_ADDR(v, 0xC, (port)) argument
78 #define LPASS_HDMITX_APP_IRQ_REG_ADDR(v, addr) \ argument
79 ((v->hdmi_irq_reg_base) + (addr))
[all …]
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| /kernel/linux/linux-5.10/arch/ia64/include/asm/ |
| D | atomic.h | 24 #define atomic_read(v) READ_ONCE((v)->counter) argument
25 #define atomic64_read(v) READ_ONCE((v)->counter) argument
27 #define atomic_set(v,i) WRITE_ONCE(((v)->counter), (i)) argument
28 #define atomic64_set(v,i) WRITE_ONCE(((v)->counter), (i)) argument
32 ia64_atomic_##op (int i, atomic_t *v) \
38 CMPXCHG_BUGCHECK(v); \
39 old = atomic_read(v); \
41 } while (ia64_cmpxchg(acq, v, old, new, sizeof(atomic_t)) != old); \
47 ia64_atomic_fetch_##op (int i, atomic_t *v) \
53 CMPXCHG_BUGCHECK(v); \
[all …]
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| /kernel/linux/linux-5.10/drivers/md/ |
| D | dm-verity-target.c | 46 struct dm_verity *v; member
80 static sector_t verity_map_sector(struct dm_verity *v, sector_t bi_sector) in verity_map_sector() argument
82 return v->data_start + dm_target_offset(v->ti, bi_sector); in verity_map_sector()
91 static sector_t verity_position_at_level(struct dm_verity *v, sector_t block, in verity_position_at_level() argument
94 return block >> (level * v->hash_per_block_bits); in verity_position_at_level()
97 static int verity_hash_update(struct dm_verity *v, struct ahash_request *req, in verity_hash_update() argument
128 static int verity_hash_init(struct dm_verity *v, struct ahash_request *req, in verity_hash_init() argument
133 ahash_request_set_tfm(req, v->tfm); in verity_hash_init()
146 if (likely(v->salt_size && (v->version >= 1))) in verity_hash_init()
147 r = verity_hash_update(v, req, v->salt, v->salt_size, wait); in verity_hash_init()
[all …]
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| /kernel/linux/linux-5.10/drivers/staging/media/hantro/ |
| D | hantro_g1_mpeg2_dec.c | 23 #define G1_REG_DEC_E(v) ((v) ? BIT(0) : 0) argument
25 #define G1_REG_DEC_AXI_RD_ID(v) (((v) << 24) & GENMASK(31, 24)) argument
26 #define G1_REG_DEC_TIMEOUT_E(v) ((v) ? BIT(23) : 0) argument
27 #define G1_REG_DEC_STRSWAP32_E(v) ((v) ? BIT(22) : 0) argument
28 #define G1_REG_DEC_STRENDIAN_E(v) ((v) ? BIT(21) : 0) argument
29 #define G1_REG_DEC_INSWAP32_E(v) ((v) ? BIT(20) : 0) argument
30 #define G1_REG_DEC_OUTSWAP32_E(v) ((v) ? BIT(19) : 0) argument
31 #define G1_REG_DEC_DATA_DISC_E(v) ((v) ? BIT(18) : 0) argument
32 #define G1_REG_DEC_LATENCY(v) (((v) << 11) & GENMASK(16, 11)) argument
33 #define G1_REG_DEC_CLK_GATE_E(v) ((v) ? BIT(10) : 0) argument
[all …]
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| D | rk3399_vpu_hw_mpeg2_dec.c | 23 #define VDPU_REG_DEC_E(v) ((v) ? BIT(0) : 0) argument
25 #define VDPU_REG_DEC_ADV_PRE_DIS(v) ((v) ? BIT(11) : 0) argument
26 #define VDPU_REG_DEC_SCMD_DIS(v) ((v) ? BIT(10) : 0) argument
27 #define VDPU_REG_FILTERING_DIS(v) ((v) ? BIT(8) : 0) argument
28 #define VDPU_REG_DEC_LATENCY(v) (((v) << 1) & GENMASK(6, 1)) argument
30 #define VDPU_REG_INIT_QP(v) (((v) << 25) & GENMASK(30, 25)) argument
31 #define VDPU_REG_STREAM_LEN(v) (((v) << 0) & GENMASK(23, 0)) argument
33 #define VDPU_REG_APF_THRESHOLD(v) (((v) << 17) & GENMASK(30, 17)) argument
34 #define VDPU_REG_STARTMB_X(v) (((v) << 8) & GENMASK(16, 8)) argument
35 #define VDPU_REG_STARTMB_Y(v) (((v) << 0) & GENMASK(7, 0)) argument
[all …]
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| /kernel/linux/linux-5.10/include/linux/ |
| D | atomic-arch-fallback.h | 82 arch_atomic_read_acquire(const atomic_t *v) in arch_atomic_read_acquire() argument
84 return smp_load_acquire(&(v)->counter); in arch_atomic_read_acquire()
91 arch_atomic_set_release(atomic_t *v, int i) in arch_atomic_set_release() argument
93 smp_store_release(&(v)->counter, i); in arch_atomic_set_release()
106 arch_atomic_add_return_acquire(int i, atomic_t *v) in arch_atomic_add_return_acquire() argument
108 int ret = arch_atomic_add_return_relaxed(i, v); in arch_atomic_add_return_acquire()
117 arch_atomic_add_return_release(int i, atomic_t *v) in arch_atomic_add_return_release() argument
120 return arch_atomic_add_return_relaxed(i, v); in arch_atomic_add_return_release()
127 arch_atomic_add_return(int i, atomic_t *v) in arch_atomic_add_return() argument
131 ret = arch_atomic_add_return_relaxed(i, v); in arch_atomic_add_return()
[all …]
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| D | atomic-fallback.h | 85 atomic_read_acquire(const atomic_t *v) in atomic_read_acquire() argument
87 return smp_load_acquire(&(v)->counter); in atomic_read_acquire()
97 atomic_set_release(atomic_t *v, int i) in atomic_set_release() argument
99 smp_store_release(&(v)->counter, i); in atomic_set_release()
119 atomic_add_return_acquire(int i, atomic_t *v) in atomic_add_return_acquire() argument
121 int ret = atomic_add_return_relaxed(i, v); in atomic_add_return_acquire()
130 atomic_add_return_release(int i, atomic_t *v) in atomic_add_return_release() argument
133 return atomic_add_return_relaxed(i, v); in atomic_add_return_release()
140 atomic_add_return(int i, atomic_t *v) in atomic_add_return() argument
144 ret = atomic_add_return_relaxed(i, v); in atomic_add_return()
[all …]
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| /kernel/linux/linux-5.10/arch/powerpc/include/asm/ |
| D | atomic.h | 25 static __inline__ int atomic_read(const atomic_t *v) in atomic_read() argument
29 __asm__ __volatile__("lwz%U1%X1 %0,%1" : "=r"(t) : "m"(v->counter)); in atomic_read()
34 static __inline__ void atomic_set(atomic_t *v, int i) in atomic_set() argument
36 __asm__ __volatile__("stw%U0%X0 %1,%0" : "=m"(v->counter) : "r"(i)); in atomic_set()
40 static __inline__ void atomic_##op(int a, atomic_t *v) \
49 : "=&r" (t), "+m" (v->counter) \
50 : "r" (a), "r" (&v->counter) \
55 static inline int atomic_##op##_return_relaxed(int a, atomic_t *v) \
64 : "=&r" (t), "+m" (v->counter) \
65 : "r" (a), "r" (&v->counter) \
[all …]
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| /kernel/linux/linux-5.10/drivers/gpu/drm/exynos/ |
| D | regs-scaler.h | 206 #define SCALER_SRC_CFG_SET_BYTE_SWAP(v) SCALER_SET(v, 6, 5) argument
208 #define SCALER_SRC_CFG_SET_COLOR_FORMAT(v) SCALER_SET(v, 4, 0) argument
232 #define SCALER_SRC_SPAN_SET_C_SPAN(v) SCALER_SET(v, 29, 16) argument
234 #define SCALER_SRC_SPAN_SET_Y_SPAN(v) SCALER_SET(v, 13, 0) argument
238 #define SCALER_SRC_Y_POS_SET_YH_POS(v) SCALER_SET(v, 31, 16) argument
240 #define SCALER_SRC_Y_POS_SET_YV_POS(v) SCALER_SET(v, 15, 0) argument
244 #define SCALER_SRC_WH_SET_WIDTH(v) SCALER_SET(v, 29, 16) argument
246 #define SCALER_SRC_WH_SET_HEIGHT(v) SCALER_SET(v, 13, 0) argument
250 #define SCALER_SRC_C_POS_SET_CH_POS(v) SCALER_SET(v, 31, 16) argument
252 #define SCALER_SRC_C_POS_SET_CV_POS(v) SCALER_SET(v, 15, 0) argument
[all …]
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| /kernel/linux/linux-5.10/arch/x86/include/asm/ |
| D | atomic64_64.h | 20 static inline s64 arch_atomic64_read(const atomic64_t *v) in arch_atomic64_read() argument
22 return __READ_ONCE((v)->counter); in arch_atomic64_read()
32 static inline void arch_atomic64_set(atomic64_t *v, s64 i) in arch_atomic64_set() argument
34 __WRITE_ONCE(v->counter, i); in arch_atomic64_set()
44 static __always_inline void arch_atomic64_add(s64 i, atomic64_t *v) in arch_atomic64_add() argument
47 : "=m" (v->counter) in arch_atomic64_add()
48 : "er" (i), "m" (v->counter) : "memory"); in arch_atomic64_add()
58 static inline void arch_atomic64_sub(s64 i, atomic64_t *v) in arch_atomic64_sub() argument
61 : "=m" (v->counter) in arch_atomic64_sub()
62 : "er" (i), "m" (v->counter) : "memory"); in arch_atomic64_sub()
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| /kernel/linux/linux-5.10/lib/crypto/ |
| D | blake2s-generic.c | 48 u32 v[16]; in blake2s_compress_generic() local
58 memcpy(v, state->h, 32); in blake2s_compress_generic()
59 v[ 8] = BLAKE2S_IV0; in blake2s_compress_generic()
60 v[ 9] = BLAKE2S_IV1; in blake2s_compress_generic()
61 v[10] = BLAKE2S_IV2; in blake2s_compress_generic()
62 v[11] = BLAKE2S_IV3; in blake2s_compress_generic()
63 v[12] = BLAKE2S_IV4 ^ state->t[0]; in blake2s_compress_generic()
64 v[13] = BLAKE2S_IV5 ^ state->t[1]; in blake2s_compress_generic()
65 v[14] = BLAKE2S_IV6 ^ state->f[0]; in blake2s_compress_generic()
66 v[15] = BLAKE2S_IV7 ^ state->f[1]; in blake2s_compress_generic()
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