Searched refs:vddc_dependency_on_dispclk (Results 1 – 7 of 7) sorted by relevance
2215 btc_apply_voltage_dependency_rules(&rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk, in btc_apply_state_adjust_rules()2224 btc_apply_voltage_dependency_rules(&rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk, in btc_apply_state_adjust_rules()2233 btc_apply_voltage_dependency_rules(&rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk, in btc_apply_state_adjust_rules()2584 rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries = in btc_dpm_init()2588 if (!rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries) { in btc_dpm_init()2592 rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.count = 4; in btc_dpm_init()2593 rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[0].clk = 0; in btc_dpm_init()2594 rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[0].v = 0; in btc_dpm_init()2595 rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[1].clk = 36000; in btc_dpm_init()2596 rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[1].v = 800; in btc_dpm_init()[all …]
883 btc_apply_voltage_dependency_rules(&rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk, in ni_apply_state_adjust_rules()4078 rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries = in ni_dpm_init()4082 if (!rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries) { in ni_dpm_init()4086 rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.count = 4; in ni_dpm_init()4087 rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[0].clk = 0; in ni_dpm_init()4088 rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[0].v = 0; in ni_dpm_init()4089 rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[1].clk = 36000; in ni_dpm_init()4090 rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[1].v = 720; in ni_dpm_init()4091 rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[2].clk = 54000; in ni_dpm_init()4092 rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[2].v = 810; in ni_dpm_init()[all …]
3147 btc_apply_voltage_dependency_rules(&rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk, in si_apply_state_adjust_rules()5142 for (i = 0; i < rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.count; i++) { in si_is_state_ulv_compatible()5144 rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[i].clk) { in si_is_state_ulv_compatible()5146 rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[i].v) in si_is_state_ulv_compatible()6942 rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries = in si_dpm_init()6946 if (!rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries) { in si_dpm_init()6950 rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.count = 4; in si_dpm_init()6951 rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[0].clk = 0; in si_dpm_init()6952 rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[0].v = 0; in si_dpm_init()6953 rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[1].clk = 36000; in si_dpm_init()[all …]
3771 &rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk; in ci_apply_disp_minimum_voltage_request()5056 &rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk); in ci_patch_dependency_tables_with_leakage()5655 kfree(rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries); in ci_dpm_fini()5772 rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries = in ci_dpm_init()5776 if (!rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries) { in ci_dpm_init()5780 rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.count = 4; in ci_dpm_init()5781 rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[0].clk = 0; in ci_dpm_init()5782 rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[0].v = 0; in ci_dpm_init()5783 rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[1].clk = 36000; in ci_dpm_init()5784 rdev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[1].v = 720; in ci_dpm_init()[all …]
1479 struct radeon_clock_voltage_dependency_table vddc_dependency_on_dispclk; member
3602 btc_apply_voltage_dependency_rules(&adev->pm.dpm.dyn_state.vddc_dependency_on_dispclk, in si_apply_state_adjust_rules()5601 for (i = 0; i < adev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.count; i++) { in si_is_state_ulv_compatible()5603 adev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[i].clk) { in si_is_state_ulv_compatible()5605 adev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[i].v) in si_is_state_ulv_compatible()7348 adev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries = in si_dpm_init()7352 if (!adev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries) { in si_dpm_init()7356 adev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.count = 4; in si_dpm_init()7357 adev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[0].clk = 0; in si_dpm_init()7358 adev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[0].v = 0; in si_dpm_init()7359 adev->pm.dpm.dyn_state.vddc_dependency_on_dispclk.entries[1].clk = 36000; in si_dpm_init()[all …]
212 struct amdgpu_clock_voltage_dependency_table vddc_dependency_on_dispclk; member