| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Lanai/ |
| D | LanaiAluCode.h | 122 case ISD::ADDE: in isdToLanaiAluCode()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 233 ADDE, SUBE, enumerator
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| D | TargetLowering.h | 2256 case ISD::ADDE: in isCommutativeBinOp()
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| /third_party/pcre2/pcre2/src/sljit/ |
| D | sljitNativePPC_32.c | 125 return push_inst(compiler, ADDE | D(dst) | A(src1) | B(src2)); in emit_single_op()
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| D | sljitNativePPC_64.c | 258 return push_inst(compiler, ADDE | D(dst) | A(src1) | B(src2)); in emit_single_op()
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| D | sljitNativeARM_64.c | 72 #define ADDE 0x8b200000 macro
2112 FAIL_IF(push_inst(compiler, ADDE | (0x3 << 13) | RD(dst_reg) | RN(SLJIT_SP) | RM(dst_reg))); in sljit_get_local_base()
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| D | sljitNativePPC_common.c | 141 #define ADDE (HI(31) | LO(138)) macro
2133 …PTR_FAIL_IF(push_inst(compiler, ADDE | RC(ALT_SET_FLAGS) | D(TMP_REG1) | A(TMP_ZERO) | B(TMP_ZERO)… in sljit_emit_jump()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/ |
| D | MipsSEISelDAGToDAG.cpp | 220 assert(Opc == ISD::ADDE && "ISD::ADDE not in a chain of ADDE nodes!"); in selectAddE()
764 case ISD::ADDE: { in trySelect()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
| D | ARMISelLowering.h | 105 ADDE, // Add using carry enumerator
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| D | ARMISelLowering.cpp | 1584 case ARMISD::ADDE: return "ARMISD::ADDE"; in getTargetNodeName()
4507 return DAG.getNode(ARMISD::ADDE, DL, DAG.getVTList(VT, MVT::i32), in ConvertCarryFlagToBooleanCarry()
8840 Result = DAG.getNode(ARMISD::ADDE, DL, VTs, Op.getOperand(0), in LowerADDSUBCARRY()
11387 assert((AddeSubeNode->getOpcode() == ARMISD::ADDE || in AddCombineTo64bitMLAL()
11397 if ((AddeSubeNode->getOpcode() == ARMISD::ADDE && in AddCombineTo64bitMLAL()
11416 if (AddeSubeNode->getOpcode() == ARMISD::ADDE && in AddCombineTo64bitMLAL()
11595 (AddeNode->getOpcode() == ARMISD::ADDE) && in PerformUMLALCombine()
11616 if (LHS->getOpcode() == ARMISD::ADDE && in PerformAddcSubcCombine()
11656 unsigned Opcode = (N->getOpcode() == ARMISD::ADDE) ? ARMISD::SUBE in PerformAddeSubeCombine()
11657 : ARMISD::ADDE; in PerformAddeSubeCombine()
[all …]
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Sparc/ |
| D | SparcISelLowering.cpp | 1549 setOperationAction(ISD::ADDE, MVT::i32, Custom); in SparcTargetLowering()
1555 setOperationAction(ISD::ADDE, MVT::i64, Custom); in SparcTargetLowering()
2904 case ISD::ADDC: hiOpc = ISD::ADDE; break; in LowerADDC_ADDE_SUBC_SUBE()
2905 case ISD::ADDE: hasChain = true; break; in LowerADDC_ADDE_SUBC_SUBE()
3053 case ISD::ADDE: in LowerOperation()
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| D | SparcInstrInfo.td | 715 defm ADDE : F3_12<"addxcc", 0b011000, adde, IntRegs, i32, simm13Op>;
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAGDumper.cpp | 290 case ISD::ADDE: return "adde"; in getOperationName()
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| D | LegalizeIntegerTypes.cpp | 148 case ISD::ADDE: in PromoteIntegerResult()
1889 case ISD::ADDE: in ExpandIntegerResult()
2296 Hi = DAG.getNode(ISD::ADDE, dl, VTList, HiOps); in ExpandIntRes_ADDSUB()
2393 Hi = DAG.getNode(ISD::ADDE, dl, VTList, HiOps); in ExpandIntRes_ADDSUBC()
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| D | TargetLowering.cpp | 5876 isOperationLegalOrCustom(ISD::ADDE, VT)); in expandMUL_LOHI()
5892 Hi = DAG.getNode(ISD::ADDE, dl, DAG.getVTList(HiLoVT, MVT::Glue), Hi, Zero, in expandMUL_LOHI()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUISelDAGToDAG.cpp | 758 case ISD::ADDE: in Select()
1003 bool ConsumeCarry = (Opcode == ISD::ADDE || Opcode == ISD::SUBE); in SelectADD_SUB_I64()
1006 bool IsAdd = Opcode == ISD::ADD || Opcode == ISD::ADDC || Opcode == ISD::ADDE; in SelectADD_SUB_I64()
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| D | R600ISelLowering.cpp | 262 setOperationAction(ISD::ADDE, VT, Expand); in R600TargetLowering()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/ |
| D | TargetLoweringBase.cpp | 679 setOperationAction(ISD::ADDE, VT, Expand); in initActions()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/WebAssembly/ |
| D | WebAssemblyISelLowering.cpp | 115 ISD::SRL_PARTS, ISD::ADDC, ISD::ADDE, ISD::SUBC, ISD::SUBE}) { in WebAssemblyTargetLowering()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AVR/ |
| D | AVRISelLowering.cpp | 70 setOperationAction(ISD::ADDE, VT, Legal); in AVRTargetLowering()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/PowerPC/ |
| D | PPCGenFastISel.inc | 1837 // FastEmit functions for ISD::ADDE.
1842 return fastEmitInst_rr(PPC::ADDE, &PPC::GPRCRegClass, Op0, Op0IsKill, Op1, Op1IsKill);
3280 case ISD::ADDE: return fastEmit_ISD_ADDE_rr(VT, RetVT, Op0, Op0IsKill, Op1, Op1IsKill);
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| D | PPCGenMCCodeEmitter.inc | 286 UINT64_C(2080375060), // ADDE
4843 case PPC::ADDE:
6696 CEFBS_None, // ADDE = 273
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/Target/ |
| D | TargetSelectionDAG.td | 379 def adde : SDNode<"ISD::ADDE" , SDTIntBinOp,
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| D | AArch64ISelLowering.cpp | 336 setOperationAction(ISD::ADDE, MVT::i32, Custom); in AArch64TargetLowering()
340 setOperationAction(ISD::ADDE, MVT::i64, Custom); in AArch64TargetLowering()
2443 case ISD::ADDE: in LowerADDC_ADDE_SUBC_SUBE()
3185 case ISD::ADDE: in LowerOperation()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/Mips/ |
| D | MipsGenFastISel.inc | 1353 // FastEmit functions for ISD::ADDE.
3408 case ISD::ADDE: return fastEmit_ISD_ADDE_rr(VT, RetVT, Op0, Op0IsKill, Op1, Op1IsKill);
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