/third_party/vk-gl-cts/framework/delibs/decpp/ |
D | deDefs.hpp | 174 #define DE_ARRAY_BEGIN(ARR) (&(ARR)[0]) argument 177 #define DE_ARRAY_END(ARR) (DE_ARRAY_BEGIN(ARR) + DE_LENGTH_OF_ARRAY(ARR)) argument
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/third_party/nghttp2/tests/ |
D | nghttp2_test_helper.h | 41 #define ARRLEN(ARR) (sizeof(ARR) / sizeof(ARR[0])) argument
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/third_party/mesa3d/src/compiler/glsl/tests/ |
D | sampler_types_test.cpp | 39 #define T(TYPE, DIM, DATA_TYPE, ARR, SHAD, COMPS) \ argument 46 ARR; \
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/third_party/vk-gl-cts/modules/glshared/ |
D | glsFboUtil.hpp | 62 #define GLS_ARRAY_RANGE(ARR) { DE_ARRAY_BEGIN(ARR), DE_ARRAY_END(ARR) } argument
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/third_party/mesa3d/src/gallium/tests/graw/vertex-shader/ |
D | vert-arr.txt | 20 ARR ADDR[0].x, TEMP[0]
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/third_party/mesa3d/src/gallium/auxiliary/tgsi/ |
D | tgsi_opcode_tmp.h | 93 OP11(ARR)
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D | tgsi_info_opcodes.h | 62 OPCODE(1, 1, COMP, ARR)
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/third_party/skia/third_party/externals/opengl-registry/extensions/NV/ |
D | NV_vertex_program2_option.txt | 164 <ARLop> ::= "ARR" 247 ABS, ADD, ADDRESS, ALIAS, ARA, ARL, ARR, ATTRIB, BRA, CAL, COS, 328 ARR[C] v a address register load (round) 572 applies to the integer results generated by the ARA, ARL, and ARR 662 - ARR (address register load with round), 738 Section 2.14.5.29, ARR: Address Register Load (with round) 740 The ARR instruction loads a single vector operand and performs a
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D | NV_vertex_program3.txt | 192 ABS, ADD, ADDRESS, ALIAS, ARA, ARL, ARR, ATTRIB, BRA, CAL, COS, 312 ARR X - v a address register load (round) 521 applies to the integer results generated by the ARA, ARL, and ARR
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D | NV_vertex_program2.txt | 83 * ARR: Operates like ARL, except that float-to-int conversion is done 933 | "ARR" | "ARRC" 1446 ARR[C] v av address register load (with round) 2007 Section 2.14.3.5, ARR: Address Register Load (with round) 2009 The ARR instruction loads a single vector operand and performs a 2012 representable address register components. The ARR instruction applies 2034 The ARR instruction is available only in the VP2 execution environment. 3479 address register and ARA, ARL, and ARR 3494 ARL/ARR/ARA all can update condition code. 3500 "ARR" as using IEEE round to nearest even
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/third_party/openGLES/extensions/NV/ |
D | NV_vertex_program2_option.txt | 164 <ARLop> ::= "ARR" 247 ABS, ADD, ADDRESS, ALIAS, ARA, ARL, ARR, ATTRIB, BRA, CAL, COS, 328 ARR[C] v a address register load (round) 572 applies to the integer results generated by the ARA, ARL, and ARR 662 - ARR (address register load with round), 738 Section 2.14.5.29, ARR: Address Register Load (with round) 740 The ARR instruction loads a single vector operand and performs a
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D | NV_vertex_program3.txt | 192 ABS, ADD, ADDRESS, ALIAS, ARA, ARL, ARR, ATTRIB, BRA, CAL, COS, 312 ARR X - v a address register load (round) 521 applies to the integer results generated by the ARA, ARL, and ARR
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D | NV_vertex_program2.txt | 83 * ARR: Operates like ARL, except that float-to-int conversion is done 933 | "ARR" | "ARRC" 1446 ARR[C] v av address register load (with round) 2007 Section 2.14.3.5, ARR: Address Register Load (with round) 2009 The ARR instruction loads a single vector operand and performs a 2012 representable address register components. The ARR instruction applies 2034 The ARR instruction is available only in the VP2 execution environment. 3479 address register and ARA, ARL, and ARR 3494 ARL/ARR/ARA all can update condition code. 3500 "ARR" as using IEEE round to nearest even
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/third_party/vk-gl-cts/modules/gles3/functional/ |
D | es3fTransformFeedbackTests.cpp | 1029 #define ITER(ARR) { ARR, DE_LENGTH_OF_ARRAY(ARR) } in iterate() argument
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D | es3fUniformApiTests.cpp | 1096 #define ARRAY_CHOICE(ARR) ((ARR)[rnd.getInt(0, DE_LENGTH_OF_ARRAY(ARR)-1)]) in randomFeatures() argument
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/third_party/vk-gl-cts/modules/gles2/functional/ |
D | es2fUniformApiTests.cpp | 926 #define ARRAY_CHOICE(ARR) ((ARR)[rnd.getInt(0, DE_LENGTH_OF_ARRAY(ARR)-1)]) in randomFeatures() argument
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/third_party/mesa3d/docs/relnotes/ |
D | 7.10.rst | 159 - r600g: translate ARR instruction for evergreen 2009 - r600g: translate ARR instruction
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D | 19.1.0.rst | 4561 - tgsi_to_nir: Fix the TGSI ARR translation by converting the result to
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/third_party/mesa3d/docs/gallium/ |
D | tgsi.rst | 632 .. opcode:: ARR - Address Register Load With Round
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