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Searched refs:ArgValue (Results 1 – 15 of 15) sorted by relevance

/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Transforms/Scalar/
DLowerExpectIntrinsic.cpp67 Value *ArgValue = CI->getArgOperand(0); in handleSwitchExpect() local
84 SI.setCondition(ArgValue); in handleSwitchExpect()
283 Value *ArgValue = CI->getArgOperand(0); in handleBrSelExpect() local
304 CmpI->setOperand(0, ArgValue); in handleBrSelExpect()
306 BSI.setCondition(ArgValue); in handleBrSelExpect()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/BPF/
DBPFISelLowering.cpp242 SDValue ArgValue = DAG.getCopyFromReg(Chain, DL, VReg, RegVT); in LowerFormalArguments() local
247 ArgValue = DAG.getNode(ISD::AssertSext, DL, RegVT, ArgValue, in LowerFormalArguments()
250 ArgValue = DAG.getNode(ISD::AssertZext, DL, RegVT, ArgValue, in LowerFormalArguments()
254 ArgValue = DAG.getNode(ISD::TRUNCATE, DL, VA.getValVT(), ArgValue); in LowerFormalArguments()
256 InVals.push_back(ArgValue); in LowerFormalArguments()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AVR/
DAVRISelLowering.cpp1065 SDValue ArgValue; in LowerFormalArguments() local
1081 ArgValue = DAG.getCopyFromReg(Chain, dl, Reg, RegVT); in LowerFormalArguments()
1095 ArgValue = DAG.getNode(ISD::BITCAST, dl, VA.getValVT(), ArgValue); in LowerFormalArguments()
1098 ArgValue = DAG.getNode(ISD::AssertSext, dl, RegVT, ArgValue, in LowerFormalArguments()
1100 ArgValue = DAG.getNode(ISD::TRUNCATE, dl, VA.getValVT(), ArgValue); in LowerFormalArguments()
1103 ArgValue = DAG.getNode(ISD::AssertZext, dl, RegVT, ArgValue, in LowerFormalArguments()
1105 ArgValue = DAG.getNode(ISD::TRUNCATE, dl, VA.getValVT(), ArgValue); in LowerFormalArguments()
1109 InVals.push_back(ArgValue); in LowerFormalArguments()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/RISCV/
DRISCVISelLowering.cpp1923 SDValue ArgValue; in LowerFormalArguments() local
1927 ArgValue = unpackF64OnRV32DSoftABI(DAG, Chain, VA, DL); in LowerFormalArguments()
1929 ArgValue = unpackFromRegLoc(DAG, Chain, VA, DL); in LowerFormalArguments()
1931 ArgValue = unpackFromMemLoc(DAG, Chain, VA, DL); in LowerFormalArguments()
1937 InVals.push_back(DAG.getLoad(VA.getValVT(), DL, Chain, ArgValue, in LowerFormalArguments()
1944 SDValue Address = DAG.getNode(ISD::ADD, DL, PtrVT, ArgValue, in LowerFormalArguments()
1952 InVals.push_back(ArgValue); in LowerFormalArguments()
1997 SDValue ArgValue = DAG.getCopyFromReg(Chain, DL, Reg, XLenVT); in LowerFormalArguments() local
2000 SDValue Store = DAG.getStore(Chain, DL, ArgValue, PtrOff, in LowerFormalArguments()
2166 SDValue ArgValue = OutVals[i]; in LowerCall() local
[all …]
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Lanai/
DLanaiISelLowering.cpp465 SDValue ArgValue = DAG.getCopyFromReg(Chain, DL, VReg, RegVT); in LowerCCCArguments() local
471 ArgValue = DAG.getNode(ISD::AssertSext, DL, RegVT, ArgValue, in LowerCCCArguments()
474 ArgValue = DAG.getNode(ISD::AssertZext, DL, RegVT, ArgValue, in LowerCCCArguments()
478 ArgValue = DAG.getNode(ISD::TRUNCATE, DL, VA.getValVT(), ArgValue); in LowerCCCArguments()
480 InVals.push_back(ArgValue); in LowerCCCArguments()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/MSP430/
DMSP430ISelLowering.cpp656 SDValue ArgValue = DAG.getCopyFromReg(Chain, dl, VReg, RegVT); in LowerCCCArguments() local
662 ArgValue = DAG.getNode(ISD::AssertSext, dl, RegVT, ArgValue, in LowerCCCArguments()
665 ArgValue = DAG.getNode(ISD::AssertZext, dl, RegVT, ArgValue, in LowerCCCArguments()
669 ArgValue = DAG.getNode(ISD::TRUNCATE, dl, VA.getValVT(), ArgValue); in LowerCCCArguments()
671 InVals.push_back(ArgValue); in LowerCCCArguments()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/
DMipsISelLowering.cpp3657 SDValue ArgValue = DAG.getCopyFromReg(Chain, DL, Reg, RegVT); in LowerFormalArguments() local
3659 ArgValue = UnpackFromArgumentSlot(ArgValue, VA, Ins[i].ArgVT, DL, DAG); in LowerFormalArguments()
3666 ArgValue = DAG.getNode(ISD::BITCAST, DL, ValVT, ArgValue); in LowerFormalArguments()
3673 std::swap(ArgValue, ArgValue2); in LowerFormalArguments()
3674 ArgValue = DAG.getNode(MipsISD::BuildPairF64, DL, MVT::f64, in LowerFormalArguments()
3675 ArgValue, ArgValue2); in LowerFormalArguments()
3678 InVals.push_back(ArgValue); in LowerFormalArguments()
3700 SDValue ArgValue = DAG.getLoad( in LowerFormalArguments() local
3703 OutChains.push_back(ArgValue.getValue(1)); in LowerFormalArguments()
3705 ArgValue = UnpackFromArgumentSlot(ArgValue, VA, Ins[i].ArgVT, DL, DAG); in LowerFormalArguments()
[all …]
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/SystemZ/
DSystemZISelLowering.cpp1349 SDValue ArgValue; in LowerFormalArguments() local
1387 ArgValue = DAG.getCopyFromReg(Chain, DL, VReg, LocVT); in LowerFormalArguments()
1402 ArgValue = DAG.getLoad(LocVT, DL, Chain, FIN, in LowerFormalArguments()
1409 InVals.push_back(DAG.getLoad(VA.getValVT(), DL, Chain, ArgValue, in LowerFormalArguments()
1418 SDValue Address = DAG.getNode(ISD::ADD, DL, PtrVT, ArgValue, in LowerFormalArguments()
1425 InVals.push_back(convertLocVTToValVT(DAG, DL, VA, Chain, ArgValue)); in LowerFormalArguments()
1454 SDValue ArgValue = DAG.getCopyFromReg(Chain, DL, VReg, MVT::f64); in LowerFormalArguments() local
1455 MemOps[I] = DAG.getStore(ArgValue.getValue(1), DL, ArgValue, FIN, in LowerFormalArguments()
1534 SDValue ArgValue = OutVals[I]; in LowerCall() local
1541 DAG.getStore(Chain, DL, ArgValue, SpillSlot, in LowerCall()
[all …]
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/
DPPCFastISel.cpp1616 Value *ArgValue = CLI.OutVals[i]; in fastLowerCall() local
1617 Type *ArgTy = ArgValue->getType(); in fastLowerCall()
1625 unsigned Arg = getRegForValue(ArgValue); in fastLowerCall()
1629 Args.push_back(ArgValue); in fastLowerCall()
DPPCISelLowering.cpp3580 SDValue ArgValue; in LowerFormalArguments_32SVR4() local
3591 ArgValue = DAG.getNode(PPCISD::BUILD_SPE64, dl, MVT::f64, ArgValueLo, in LowerFormalArguments_32SVR4()
3595 ArgValue = DAG.getCopyFromReg(Chain, dl, Reg, in LowerFormalArguments_32SVR4()
3598 ArgValue = DAG.getNode(ISD::TRUNCATE, dl, MVT::i1, ArgValue); in LowerFormalArguments_32SVR4()
3601 InVals.push_back(ArgValue); in LowerFormalArguments_32SVR4()
6970 SelectionDAG &DAG, SDValue ArgValue, in truncateScalarIntegerArg() argument
6976 ArgValue = DAG.getNode(ISD::AssertSext, dl, LocVT, ArgValue, in truncateScalarIntegerArg()
6979 ArgValue = DAG.getNode(ISD::AssertZext, dl, LocVT, ArgValue, in truncateScalarIntegerArg()
6982 return DAG.getNode(ISD::TRUNCATE, dl, ValVT, ArgValue); in truncateScalarIntegerArg()
7025 SDValue ArgValue; in LowerFormalArguments_AIX() local
[all …]
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/
DARMISelLowering.cpp3882 SDValue ArgValue = DAG.getCopyFromReg(Root, dl, Reg, MVT::i32); in GetF64FormalArgument() local
3899 std::swap (ArgValue, ArgValue2); in GetF64FormalArgument()
3900 return DAG.getNode(ARMISD::VMOVDRR, dl, MVT::f64, ArgValue, ArgValue2); in GetF64FormalArgument()
4001 SDValue ArgValue; in LowerFormalArguments() local
4075 ArgValue = DAG.getNode(ISD::UNDEF, dl, MVT::v2f64); in LowerFormalArguments()
4076 ArgValue = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, MVT::v2f64, in LowerFormalArguments()
4077 ArgValue, ArgValue1, in LowerFormalArguments()
4079 ArgValue = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, MVT::v2f64, in LowerFormalArguments()
4080 ArgValue, ArgValue2, in LowerFormalArguments()
4083 ArgValue = GetF64FormalArgument(VA, ArgLocs[++i], Chain, DAG, dl); in LowerFormalArguments()
[all …]
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/
DAArch64ISelLowering.cpp3397 SDValue ArgValue; in LowerFormalArguments() local
3425 ArgValue = DAG.getCopyFromReg(Chain, DL, Reg, RegVT); in LowerFormalArguments()
3440 ArgValue = DAG.getNode(ISD::BITCAST, DL, VA.getValVT(), ArgValue); in LowerFormalArguments()
3447 ArgValue = DAG.getNode(ISD::SRL, DL, RegVT, ArgValue, in LowerFormalArguments()
3449 ArgValue = DAG.getZExtOrTrunc(ArgValue, DL, VA.getValVT()); in LowerFormalArguments()
3493 ArgValue = DAG.getExtLoad( in LowerFormalArguments()
3500 ArgValue = DAG.getNode(ISD::AssertZext, DL, ArgValue.getValueType(), in LowerFormalArguments()
3501 ArgValue, DAG.getValueType(MVT::i32)); in LowerFormalArguments()
3502 InVals.push_back(ArgValue); in LowerFormalArguments()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/
DX86ISelLowering.cpp3393 SDValue ArgValue; in LowerFormalArguments() local
3408 ArgValue = in LowerFormalArguments()
3450 ArgValue = DAG.getCopyFromReg(Chain, dl, Reg, RegVT); in LowerFormalArguments()
3457 ArgValue = DAG.getNode(ISD::AssertSext, dl, RegVT, ArgValue, in LowerFormalArguments()
3460 ArgValue = DAG.getNode(ISD::AssertZext, dl, RegVT, ArgValue, in LowerFormalArguments()
3463 ArgValue = DAG.getBitcast(VA.getValVT(), ArgValue); in LowerFormalArguments()
3468 ArgValue = DAG.getNode(X86ISD::MOVDQ2Q, dl, VA.getValVT(), ArgValue); in LowerFormalArguments()
3474 ArgValue = lowerRegToMasks(ArgValue, VA.getValVT(), RegVT, dl, DAG); in LowerFormalArguments()
3476 ArgValue = DAG.getNode(ISD::TRUNCATE, dl, VA.getValVT(), ArgValue); in LowerFormalArguments()
3480 ArgValue = in LowerFormalArguments()
[all …]
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/
DSIISelLowering.cpp1532 SDValue ArgValue; in lowerStackParameter() local
1555 ArgValue = DAG.getExtLoad( in lowerStackParameter()
1559 return ArgValue; in lowerStackParameter()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/
DSelectionDAGBuilder.cpp9820 SDValue ArgValue = getCopyFromParts(DAG, dl, &InVals[0], 1, RegVT, VT, in LowerArguments() local
9829 SDB->DAG.getCopyToReg(NewRoot, SDB->getCurSDLoc(), SRetReg, ArgValue); in LowerArguments()