Searched refs:BRW_OPCODE_AND (Results 1 – 19 of 19) sorted by relevance
| /third_party/mesa3d/src/intel/compiler/ |
| D | brw_fs_cmod_propagation.cpp | 184 scan_inst->opcode != BRW_OPCODE_AND) in cmod_propagate_not()
233 if ((inst->opcode != BRW_OPCODE_AND && in opt_cmod_propagation_local()
257 if (inst->opcode == BRW_OPCODE_AND && in opt_cmod_propagation_local()
318 if (inst->opcode == BRW_OPCODE_AND) in opt_cmod_propagation_local()
|
| D | brw_vec4_cmod_propagation.cpp | 58 if ((inst->opcode != BRW_OPCODE_AND && in opt_cmod_propagation_local()
74 if (inst->opcode == BRW_OPCODE_AND && in opt_cmod_propagation_local()
265 if (inst->opcode == BRW_OPCODE_AND) in opt_cmod_propagation_local()
|
| D | brw_eu.c | 609 { BRW_OPCODE_AND, 5, "and", 2, 1, GFX_LT(GFX12) },
610 { BRW_OPCODE_AND, 101, "and", 2, 1, GFX_GE(GFX12) },
|
| D | brw_vec4_cse.cpp | 55 case BRW_OPCODE_AND: in is_expression()
|
| D | brw_shader.cpp | 864 case BRW_OPCODE_AND: in is_commutative()
1038 case BRW_OPCODE_AND: in can_do_cmod()
|
| D | brw_vec4_copy_propagation.cpp | 210 case BRW_OPCODE_AND: in try_constant_propagate()
|
| D | brw_fs_cse.cpp | 54 case BRW_OPCODE_AND: in is_expression()
|
| D | brw_fs_copy_propagation.cpp | 364 return (opcode == BRW_OPCODE_AND || in is_logic_op()
832 case BRW_OPCODE_AND: in try_constant_propagate()
|
| D | test_vec4_cmod_propagation.cpp | 260 EXPECT_EQ(BRW_OPCODE_AND, instruction(block0, 1)->opcode); in TEST_F()
598 EXPECT_EQ(BRW_OPCODE_AND, instruction(block0, 1)->opcode); in TEST_F()
|
| D | brw_eu_defines.h | 185 BRW_OPCODE_AND, enumerator
|
| D | brw_vec4_generator.cpp | 1377 brw_inst *insn_and = brw_next_insn(p, BRW_OPCODE_AND); in generate_pull_constant_load_gfx7()
1617 case BRW_OPCODE_AND: in generate_code()
|
| D | test_fs_cmod_propagation.cpp | 690 EXPECT_EQ(BRW_OPCODE_AND, instruction(block0, 1)->opcode); in TEST_F()
1000 EXPECT_EQ(BRW_OPCODE_AND, instruction(block0, 1)->opcode); in TEST_F()
2711 EXPECT_EQ(BRW_OPCODE_AND, instruction(block0, 0)->opcode); in TEST_F()
|
| D | brw_fs_generator.cpp | 1570 brw_inst *insn_and = brw_next_insn(p, BRW_OPCODE_AND); in generate_uniform_pull_constant_load_gfx7()
1978 case BRW_OPCODE_AND: in generate_code()
|
| D | brw_ir_performance.cpp | 301 case BRW_OPCODE_AND: in instruction_desc()
|
| D | brw_disasm.c | 77 return opcode == BRW_OPCODE_AND || in is_logic_instruction()
|
| D | brw_fs.cpp | 4817 case BRW_OPCODE_AND: in get_lowered_simd_width()
|
| D | brw_fs_nir.cpp | 4095 case nir_op_iand: return BRW_OPCODE_AND; in brw_op_for_nir_reduction_op()
|
| /third_party/mesa3d/src/intel/tools/ |
| D | i965_lex.l | 55 and { yylval.integer = BRW_OPCODE_AND; return AND; }
|
| D | i965_gram.y | 226 case BRW_OPCODE_AND: in i965_asm_binary_instruction()
|