| /third_party/skia/third_party/externals/swiftshader/third_party/subzero/src/ |
| D | IceRegAlloc.h | 52 using OrderedRanges = CfgVector<Variable *>;
53 using UnorderedRanges = CfgVector<Variable *>;
76 const CfgVector<InstNumberT> &LRBegin,
77 const CfgVector<InstNumberT> &LREnd) const;
123 CfgVector<InstNumberT> Kills;
134 CfgVector<Variable *> Vars;
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| D | IceLoopAnalyzer.cpp | 38 CfgVector<CfgUnorderedSet<SizeT>> getLoopBodies() { return Loops; } in getLoopBodies()
95 using LoopNodeList = CfgVector<LoopNode>;
96 using LoopNodePtrList = CfgVector<LoopNode *>;
118 CfgVector<CfgUnorderedSet<SizeT>> Loops;
257 CfgVector<Loop> ComputeLoopInfo(Cfg *Func) { in ComputeLoopInfo()
260 CfgVector<Loop> Loops; in ComputeLoopInfo()
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| D | IceCfg.h | 290 void sortAndCombineAllocas(CfgVector<InstAlloca *> &Allocas,
294 CfgVector<Inst *>
325 CfgVector<InstJumpTable *> JumpTables;
331 CfgVector<Loop> LoopInfo;
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| D | IceCfg.cpp | 374 CfgVector<PlacedList::iterator> PlaceIndex(Nodes.size(), NoPlace); in reorderNodes()
598 CfgVector<Inst *>
610 CfgVector<std::reference_wrapper<Inst>> Insts(Node->getInsts().begin(), in findLoopInvariantInstructions()
653 CfgVector<Inst *> InstVector(InvariantInsts.begin(), InvariantInsts.end()); in findLoopInvariantInstructions()
684 CfgUnorderedMap<SizeT, CfgVector<CfgNode *>> Splits; in shortCircuitJumps()
752 CfgUnorderedMap<Constant *, CfgVector<InstList::iterator>> FloatUses; in floatConstantCSE()
813 void Cfg::sortAndCombineAllocas(CfgVector<InstAlloca *> &Allocas, in sortAndCombineAllocas()
832 CfgVector<int32_t> Offsets; in sortAndCombineAllocas()
966 CfgVector<InstAlloca *> FixedAllocas; in processAllocas()
969 CfgVector<InstAlloca *> AlignedAllocas; in processAllocas()
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| D | IceDefs.h | 143 template <typename T> using CfgVector = std::vector<T, CfgLocalAllocator<T>>; variable
146 using OperandList = CfgVector<Operand *>;
147 using VarList = CfgVector<Variable *>;
148 using NodeList = CfgVector<CfgNode *>;
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| D | IceTargetLoweringMIPS32.h | 713 inline void discardNextGPRAndItsAliases(CfgVector<RegNumT> *Regs);
714 inline void alignGPR(CfgVector<RegNumT> *Regs);
715 void discardUnavailableGPRsAndTheirAliases(CfgVector<RegNumT> *Regs);
717 CfgVector<RegNumT> GPRArgs;
718 CfgVector<RegNumT> I64Args;
720 void discardUnavailableVFPRegsAndTheirAliases(CfgVector<RegNumT> *Regs);
722 CfgVector<RegNumT> FP32Args;
723 CfgVector<RegNumT> FP64Args;
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| D | IceLoopAnalyzer.h | 29 CfgVector<Loop> ComputeLoopInfo(Cfg *Func);
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| D | IceVariableSplitting.cpp | 150 CfgVector<VarInfo> Map;
433 CfgVector<Variable *> LinkedToFixups;
516 CfgVector<Variable *> LinkedToFixups; in splitBlockLocalVariables()
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| D | IceSwitchLowering.h | 27 using CaseClusterArray = CfgVector<CaseCluster>;
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| D | IceTargetLoweringARM32.h | 1109 void discardUnavailableGPRsAndTheirAliases(CfgVector<RegNumT> *Regs);
1111 CfgVector<RegNumT> GPRArgs;
1112 CfgVector<RegNumT> I64Args;
1114 void discardUnavailableVFPRegs(CfgVector<RegNumT> *Regs);
1116 CfgVector<RegNumT> FP32Args;
1117 CfgVector<RegNumT> FP64Args;
1118 CfgVector<RegNumT> Vec128Args;
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| D | IceRegAlloc.cpp | 162 const CfgVector<InstNumberT> &LRBegin, in livenessValidateIntervals()
163 const CfgVector<InstNumberT> &LREnd) const { in livenessValidateIntervals()
216 CfgVector<InstNumberT> LRBegin(Vars.size(), Inst::NumberSentinel); in initForInfOnly()
217 CfgVector<InstNumberT> LREnd(Vars.size(), Inst::NumberSentinel); in initForInfOnly()
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| D | IceTargetLowering.cpp | 498 CfgVector<Inst *> getInstructionsInRange(CfgNode *Node, InstNumberT Start, in getInstructionsInRange()
500 CfgVector<Inst *> Result; in getInstructionsInRange()
766 CfgVector<size_t> LocalsSize(Func->getNumNodes()); in getVarStackSlotParams()
871 CfgVector<size_t> LocalsSize(Func->getNumNodes()); in assignVarStackSlots()
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| D | IceOperand.h | 608 using RangeType = CfgVector<RangeElementType>;
612 explicit LiveRange(const CfgVector<InstNumberT> &Kills) { in LiveRange()
1024 using InstDefList = CfgVector<const Inst *>;
1131 CfgVector<VariableTracking> Metadata;
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| D | IceCfgNode.cpp | 953 bool IsLiveIn, CfgVector<SizeT> &LiveRegCount) { in emitRegisterUsage()
968 CfgVector<Variable *> LiveRegs; in emitRegisterUsage()
1002 CfgVector<SizeT> &LiveRegCount) { in emitLiveRangesEnded()
1070 CfgVector<SizeT> LiveRegCount(Func->getTarget()->getNumRegisters()); in emit()
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| D | IceInst.h | 253 CfgVector<Operand *> Srcs;
700 CfgVector<CfgNode *> Labels;
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| D | IceTargetLoweringMIPS32.cpp | 121 CfgVector<size_t> LocalsSize(Func->getNumNodes()); in assignVarStackSlots()
1172 CfgVector<RegNumT> *Source; in argInGPR()
1234 CfgVector<RegNumT> *Regs) { in discardNextGPRAndItsAliases()
1239 inline void TargetMIPS32::CallingConv::alignGPR(CfgVector<RegNumT> *Regs) { in alignGPR()
1250 CfgVector<RegNumT> *Regs) { in discardUnavailableGPRsAndTheirAliases()
1257 CfgVector<RegNumT> *Source; in argInVFP()
1304 CfgVector<RegNumT> *Regs) { in discardUnavailableVFPRegsAndTheirAliases()
3307 CfgVector<Variable *> RegArgs; in lowerCall()
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| D | IceTargetLoweringX8664.cpp | 2231 CfgVector<std::pair<const Type, Operand *>> GprArgs; in lowerCall()
2232 CfgVector<SizeT> GprArgIndices; in lowerCall()
3891 CfgVector<InstAssign *> PhiAssigns; in tryOptimizedCmpxchgCmpBr()
6295 CfgVector<Type> ArgTypes; in genTargetHelperCallFor()
6349 TargetX8664::getCallStackArgumentsSizeBytes(const CfgVector<Type> &ArgTypes, in getCallStackArgumentsSizeBytes()
6386 CfgVector<Type> ArgTypes; in getCallStackArgumentsSizeBytes()
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| D | IceTargetLoweringX8632.cpp | 2421 CfgVector<std::pair<const Type, Operand *>> GprArgs; in lowerCall()
2422 CfgVector<SizeT> GprArgIndices; in lowerCall()
4375 CfgVector<InstAssign *> PhiAssigns; in tryOptimizedCmpxchgCmpBr()
7031 CfgVector<Type> ArgTypes; in genTargetHelperCallFor()
7085 TargetX8632::getCallStackArgumentsSizeBytes(const CfgVector<Type> &ArgTypes, in getCallStackArgumentsSizeBytes()
7125 CfgVector<Type> ArgTypes; in getCallStackArgumentsSizeBytes()
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| D | IceTargetLoweringARM32.cpp | 1109 CfgVector<RegNumT> *Source; in argInGPR()
1143 CfgVector<RegNumT> *Regs) { in discardUnavailableGPRsAndTheirAliases()
1151 CfgVector<RegNumT> *Source; in argInVFP()
1181 CfgVector<RegNumT> *Regs) { in discardUnavailableVFPRegs()
3640 CfgVector<Variable *> RegArgs; in lowerCall()
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| D | IceTargetLoweringX8632.h | 287 uint32_t getCallStackArgumentsSizeBytes(const CfgVector<Type> &ArgTypes,
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| D | IceTargetLoweringX8664.h | 283 uint32_t getCallStackArgumentsSizeBytes(const CfgVector<Type> &ArgTypes,
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