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Searched refs:Def (Results 1 – 25 of 135) sorted by relevance

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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/WebAssembly/
DWebAssemblyLowerBrUnless.cpp77 MachineInstr *Def = MRI.getVRegDef(Cond); in runOnMachineFunction() local
78 switch (Def->getOpcode()) { in runOnMachineFunction()
81 Def->setDesc(TII.get(NE_I32)); in runOnMachineFunction()
85 Def->setDesc(TII.get(EQ_I32)); in runOnMachineFunction()
89 Def->setDesc(TII.get(LE_S_I32)); in runOnMachineFunction()
93 Def->setDesc(TII.get(LT_S_I32)); in runOnMachineFunction()
97 Def->setDesc(TII.get(GE_S_I32)); in runOnMachineFunction()
101 Def->setDesc(TII.get(GT_S_I32)); in runOnMachineFunction()
105 Def->setDesc(TII.get(LE_U_I32)); in runOnMachineFunction()
109 Def->setDesc(TII.get(LT_U_I32)); in runOnMachineFunction()
[all …]
DWebAssemblyRegStackify.cpp261 static bool shouldRematerialize(const MachineInstr &Def, AliasAnalysis &AA, in shouldRematerialize() argument
263 return Def.isAsCheapAsAMove() && TII->isTriviallyReMaterializable(Def, &AA); in shouldRematerialize()
273 if (MachineInstr *Def = MRI.getUniqueVRegDef(Reg)) in getVRegDef() local
274 return Def; in getVRegDef()
287 static bool hasOneUse(unsigned Reg, MachineInstr *Def, MachineRegisterInfo &MRI, in hasOneUse() argument
296 LI.getVNInfoAt(LIS.getInstructionIndex(*Def).getRegSlot()); in hasOneUse()
316 static bool isSafeToMove(const MachineInstr *Def, const MachineInstr *Insert, in isSafeToMove() argument
318 assert(Def->getParent() == Insert->getParent()); in isSafeToMove()
322 if (Def->getOpcode() == WebAssembly::CATCH || in isSafeToMove()
323 Def->getOpcode() == WebAssembly::EXTRACT_EXCEPTION_I32) { in isSafeToMove()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/
DAMDGPUGlobalISelUtils.cpp18 MachineInstr *Def = getDefIgnoringCopies(Reg, MRI); in getBaseWithConstantOffset() local
19 if (!Def) in getBaseWithConstantOffset()
22 if (Def->getOpcode() == TargetOpcode::G_CONSTANT) { in getBaseWithConstantOffset()
24 const MachineOperand &Op = Def->getOperand(1); in getBaseWithConstantOffset()
30 return std::make_tuple(Register(), Offset, Def); in getBaseWithConstantOffset()
34 if (Def->getOpcode() == TargetOpcode::G_ADD) { in getBaseWithConstantOffset()
36 if (mi_match(Def->getOperand(2).getReg(), MRI, m_ICst(Offset))) in getBaseWithConstantOffset()
37 return std::make_tuple(Def->getOperand(1).getReg(), Offset, Def); in getBaseWithConstantOffset()
40 if (mi_match(Def->getOperand(2).getReg(), MRI, m_Copy(m_ICst(Offset)))) in getBaseWithConstantOffset()
41 return std::make_tuple(Def->getOperand(1).getReg(), Offset, Def); in getBaseWithConstantOffset()
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DSILowerControlFlow.cpp365 if (MachineInstr *Def = MRI->getUniqueVRegDef(MI.getOperand(1).getReg())) { in emitIfBreak() local
366 SkipAnding = Def->getParent() == MI.getParent() in emitIfBreak()
367 && SIInstrInfo::isVALU(*Def); in emitIfBreak()
423 MachineInstr *Def = MRI.getUniqueVRegDef(CFMask); in emitEndCf() local
427 Def && Def->getParent() == &MBB ? std::next(MachineBasicBlock::iterator(Def)) in emitEndCf()
452 MachineInstr *Def = MRI->getUniqueVRegDef(Op.getReg()); in findMaskOperands() local
453 if (!Def || Def->getParent() != MI.getParent() || in findMaskOperands()
454 !(Def->isFullCopy() || (Def->getOpcode() == MI.getOpcode()))) in findMaskOperands()
460 for (auto I = Def->getIterator(); I != MI.getIterator(); ++I) in findMaskOperands()
465 for (const auto &SrcOp : Def->explicit_operands()) in findMaskOperands()
DSIFoldOperands.cpp474 MachineInstr *Def = MRI.getUniqueVRegDef(UseReg); in getRegSeqInit() local
475 if (!Def || !Def->isRegSequence()) in getRegSeqInit()
478 for (unsigned I = 1, E = Def->getNumExplicitOperands(); I < E; I += 2) { in getRegSeqInit()
479 MachineOperand *Sub = &Def->getOperand(I); in getRegSeqInit()
497 Defs.push_back(std::make_pair(Sub, Def->getOperand(I + 1).getImm())); in getRegSeqInit()
723 MachineOperand *Def = Defs[I].first; in foldOperand() local
725 if (Def->isImm() && in foldOperand()
726 TII->isInlineConstant(*Def, AMDGPU::OPERAND_REG_INLINE_C_INT32)) { in foldOperand()
727 int64_t Imm = Def->getImm(); in foldOperand()
733 } else if (Def->isReg() && TRI->isAGPR(*MRI, Def->getReg())) { in foldOperand()
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/third_party/typescript/tests/baselines/reference/
DkeyofInferenceLowerPriorityThanReturn.types17 declare class Table<Req, Def> {
18 >Table : Table<Req, Def>
20 protected dummy: [Table<Req, Def>, Req, Def];
21 >dummy : [Table<Req, Def>, Req, Def]
68 …ictDoNothing<Req extends object, Def extends object>(_table: Table<Req, Def>, _conflictTarget: Con…
69 …DoNothing : <Req extends object, Def extends object>(_table: Table<Req, Def>, _conflictTarget: Con…
70 >_table : Table<Req, Def>
71 >_conflictTarget : ConflictTarget<Req & Def>
83 …DoNothing : <Req extends object, Def extends object>(_table: Table<Req, Def>, _conflictTarget: Con…
DtsxDefaultImports.symbols17 import {default as Def} from "./a"
18 >default : Symbol(Def, Decl(a.ts, 2, 1))
19 >Def : Symbol(Def, Decl(b.ts, 0, 8))
21 let a = Def.E.one;
23 >Def.E.one : Symbol(SomeEnum.one, Decl(a.ts, 0, 15))
24 >Def.E : Symbol(Def.E, Decl(a.ts, 3, 32))
25 >Def : Symbol(Def, Decl(b.ts, 0, 8))
26 >E : Symbol(Def.E, Decl(a.ts, 3, 32))
DtsxDefaultImports.types17 import {default as Def} from "./a"
18 >default : typeof Def
19 >Def : typeof Def
21 let a = Def.E.one;
23 >Def.E.one : SomeEnum
24 >Def.E : typeof SomeEnum
25 >Def : typeof Def
DkeyofInferenceLowerPriorityThanReturn.symbols25 declare class Table<Req, Def> {
28 >Def : Symbol(Def, Decl(keyofInferenceLowerPriorityThanReturn.ts, 9, 24))
30 protected dummy: [Table<Req, Def>, Req, Def];
34 >Def : Symbol(Def, Decl(keyofInferenceLowerPriorityThanReturn.ts, 9, 24))
36 >Def : Symbol(Def, Decl(keyofInferenceLowerPriorityThanReturn.ts, 9, 24))
111 …ictDoNothing<Req extends object, Def extends object>(_table: Table<Req, Def>, _conflictTarget: Con…
114 >Def : Symbol(Def, Decl(keyofInferenceLowerPriorityThanReturn.ts, 39, 54))
118 >Def : Symbol(Def, Decl(keyofInferenceLowerPriorityThanReturn.ts, 39, 54))
122 >Def : Symbol(Def, Decl(keyofInferenceLowerPriorityThanReturn.ts, 39, 54))
DkeyofInferenceLowerPriorityThanReturn.js11 declare class Table<Req, Def> {
12 protected dummy: [Table<Req, Def>, Req, Def];
41 …ictDoNothing<Req extends object, Def extends object>(_table: Table<Req, Def>, _conflictTarget: Con…
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/
DPeepholeOptimizer.cpp255 RegSubRegPair Def, RewriteMapTy &RewriteMap);
367 const MachineInstr *Def = nullptr; member in __anon061c2cf30111::ValueTracker
423 Def = MRI.getVRegDef(Reg); in ValueTracker()
1113 RegSubRegPair Def, in getNewSource() argument
1116 RegSubRegPair LookupSrc(Def.Reg, Def.SubReg); in getNewSource()
1224 RegSubRegPair Def, RewriteMapTy &RewriteMap) { in rewriteSource() argument
1225 assert(!Register::isPhysicalRegister(Def.Reg) && in rewriteSource()
1229 RegSubRegPair NewSrc = getNewSource(MRI, TII, Def, RewriteMap); in rewriteSource()
1232 const TargetRegisterClass *DefRC = MRI->getRegClass(Def.Reg); in rewriteSource()
1240 if (Def.SubReg) { in rewriteSource()
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DMachineCopyPropagation.cpp155 Register Def = MI->getOperand(0).getReg(); in trackCopy() local
159 for (MCRegUnitIterator RUI(Def, &TRI); RUI.isValid(); ++RUI) in trackCopy()
167 if (!is_contained(Copy.DefRegs, Def)) in trackCopy()
168 Copy.DefRegs.push_back(Def); in trackCopy()
280 bool eraseIfRedundant(MachineInstr &Copy, unsigned Src, unsigned Def);
334 unsigned Def, const TargetRegisterInfo *TRI) { in isNopCopy() argument
338 assert(Def == PreviousDef); in isNopCopy()
344 return SubIdx == TRI->getSubRegIndex(PreviousDef, Def); in isNopCopy()
351 unsigned Def) { in eraseIfRedundant() argument
354 if (MRI->isReserved(Src) || MRI->isReserved(Def)) in eraseIfRedundant()
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DDetectDeadLanes.cpp91 LaneBitmask transferDefinedLanes(const MachineOperand &Def, unsigned OpNum,
252 const MachineOperand &Def = MI.getOperand(0); in transferUsedLanes() local
253 Register DefReg = Def.getReg(); in transferUsedLanes()
287 const MachineOperand &Def = *MI.defs().begin(); in transferDefinedLanesStep() local
288 Register DefReg = Def.getReg(); in transferDefinedLanesStep()
298 DefinedLanes = transferDefinedLanes(Def, OpNum, DefinedLanes); in transferDefinedLanesStep()
310 LaneBitmask DetectDeadLanes::transferDefinedLanes(const MachineOperand &Def, in transferDefinedLanes() argument
312 const MachineInstr &MI = *Def.getParent(); in transferDefinedLanes()
346 assert(Def.getSubReg() == 0 && in transferDefinedLanes()
348 DefinedLanes &= MRI->getMaxLaneMaskForVReg(Def.getReg()); in transferDefinedLanes()
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DReachingDefAnalysis.cpp181 for (int Def : MBBReachingDefs[MBBNumber][*Unit]) { in getReachingDef() local
182 if (Def >= InstId) in getReachingDef()
184 DefRes = Def; in getReachingDef()
227 void ReachingDefAnalysis::getReachingLocalUses(MachineInstr *Def, int PhysReg, in getReachingLocalUses() argument
229 MachineBasicBlock *MBB = Def->getParent(); in getReachingLocalUses()
230 MachineBasicBlock::iterator MI = MachineBasicBlock::iterator(Def); in getReachingLocalUses()
234 if (getReachingMIDef(&*MI, PhysReg) != Def) in getReachingLocalUses()
248 unsigned ReachingDefAnalysis::getNumUses(MachineInstr *Def, int PhysReg) { in getNumUses() argument
250 getReachingLocalUses(Def, PhysReg, Uses); in getNumUses()
281 int Def = getReachingDef(MI, PhysReg); in isReachingDefLiveOut() local
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DModuloSchedule.cpp386 Register Def = BBI->getOperand(0).getReg(); in generateExistingPhis() local
401 unsigned NumStages = getStagesForReg(Def, CurStageNum); in generateExistingPhis()
406 rewriteScheduledInstr(NewBB, InstrMap, CurStageNum, 0, &*BBI, Def, in generateExistingPhis()
409 VRMap[CurStageNum][Def] = VRMap[CurStageNum][LoopVal]; in generateExistingPhis()
495 VRMap[PrevStage - np + 1].count(Def)) in generateExistingPhis()
496 PhiOp2 = VRMap[PrevStage - np + 1][Def]; in generateExistingPhis()
503 else if (VRMap[PrevStage - np].count(Def) && in generateExistingPhis()
506 PhiOp2 = VRMap[PrevStage - np][Def]; in generateExistingPhis()
530 Def, NewReg); in generateExistingPhis()
532 VRMap[CurStageNum - np][Def] = NewReg; in generateExistingPhis()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/WindowsManifest/
DWindowsManifestMerger.cpp127 for (xmlNsPtr Def = Node->nsDef; Def; Def = Def->next) { in search() local
128 if (Def->prefix && xmlStringsEqual(Def->href, HRef)) { in search()
129 return Def; in search()
155 if (xmlNsPtr Def = search(HRef, Node)) in searchOrDefine() local
156 return Def; in searchOrDefine()
157 if (xmlNsPtr Def = xmlNewNs(Node, HRef, getPrefixForHref(HRef))) in searchOrDefine() local
158 return Def; in searchOrDefine()
182 for (xmlNsPtr Def = Node->nsDef; Def; Def = Def->next) { in getNamespaceWithPrefix() local
183 if (xmlStringsEqual(Def->prefix, Prefix)) { in getNamespaceWithPrefix()
184 return Def; in getNamespaceWithPrefix()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/IR/
DDominators.cpp116 bool DominatorTree::dominates(const Instruction *Def, in dominates() argument
119 const BasicBlock *DefBB = Def->getParent(); in dominates()
130 if (Def == User) in dominates()
137 if (isa<InvokeInst>(Def) || isa<PHINode>(User)) in dominates()
138 return dominates(Def, UseBB); in dominates()
145 for (; &*I != Def && &*I != User; ++I) in dominates()
148 return &*I == Def; in dominates()
153 bool DominatorTree::dominates(const Instruction *Def, in dominates() argument
155 const BasicBlock *DefBB = Def->getParent(); in dominates()
170 if (const auto *II = dyn_cast<InvokeInst>(Def)) { in dominates()
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/third_party/typescript/tests/cases/conformance/types/typeRelationships/typeInference/
DkeyofInferenceLowerPriorityThanReturn.ts10 declare class Table<Req, Def> {
11 protected dummy: [Table<Req, Def>, Req, Def];
40 …ictDoNothing<Req extends object, Def extends object>(_table: Table<Req, Def>, _conflictTarget: Con…
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/ToolDrivers/llvm-dlltool/
DDlltoolDriver.cpp131 Expected<COFFModuleDefinition> Def = in dlltoolDriverMain() local
134 if (!Def) { in dlltoolDriverMain()
136 << errorToErrorCode(Def.takeError()).message(); in dlltoolDriverMain()
142 Def->OutputFile = Arg->getValue(); in dlltoolDriverMain()
144 if (Def->OutputFile.empty()) { in dlltoolDriverMain()
156 for (COFFShortExport& E : Def->Exports) { in dlltoolDriverMain()
164 for (COFFShortExport& E : Def->Exports) { in dlltoolDriverMain()
181 writeImportLibrary(Def->OutputFile, Path, Def->Exports, Machine, true)) in dlltoolDriverMain()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/
DAArch64AdvSIMDScalarPass.cpp209 MachineRegisterInfo::def_instr_iterator Def = in isProfitableToTransform() local
211 assert(std::next(Def) == MRI->def_instr_end() && "Multiple def in SSA!"); in isProfitableToTransform()
212 MachineOperand *MOSrc0 = getSrcFromCopy(&*Def, MRI, SubReg0); in isProfitableToTransform()
222 MachineRegisterInfo::def_instr_iterator Def = in isProfitableToTransform() local
224 assert(std::next(Def) == MRI->def_instr_end() && "Multiple def in SSA!"); in isProfitableToTransform()
225 MachineOperand *MOSrc1 = getSrcFromCopy(&*Def, MRI, SubReg1); in isProfitableToTransform()
302 MachineRegisterInfo::def_instr_iterator Def = in transformInstruction() local
304 assert(std::next(Def) == MRI->def_instr_end() && "Multiple def in SSA!"); in transformInstruction()
305 MachineOperand *MOSrc0 = getSrcFromCopy(&*Def, MRI, SubReg0); in transformInstruction()
315 Def->eraseFromParent(); in transformInstruction()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/
DMVEVPTBlockPass.cpp78 auto *Def = RDA->getReachingMIDef(MI, ARM::VPR); in findVCMPToFoldIntoVPST() local
79 if (!Def) in findVCMPToFoldIntoVPST()
83 if (!(NewOpcode = VCMPOpcodeToVPT(Def->getOpcode()))) in findVCMPToFoldIntoVPST()
88 if (!RDA->hasSameReachingDef(Def, MI, Def->getOperand(1).getReg()) || in findVCMPToFoldIntoVPST()
89 !RDA->hasSameReachingDef(Def, MI, Def->getOperand(2).getReg())) in findVCMPToFoldIntoVPST()
92 return Def; in findVCMPToFoldIntoVPST()
DA15SDOptimizer.cpp201 MachineInstr *Def = Op->getParent(); in eraseInstrWithNoUses() local
205 if (DeadInstr.find(Def) != DeadInstr.end()) in eraseInstrWithNoUses()
212 for (MachineOperand &MODef : Def->operands()) { in eraseInstrWithNoUses()
222 if (&Use == Def) in eraseInstrWithNoUses()
233 LLVM_DEBUG(dbgs() << "Deleting instruction " << *Def << "\n"); in eraseInstrWithNoUses()
234 DeadInstr.insert(Def); in eraseInstrWithNoUses()
303 MachineInstr *Def = MRI->getVRegDef(OpReg); in optimizeSDPattern() local
304 if (!Def) in optimizeSDPattern()
306 if (Def->isImplicitDef()) in optimizeSDPattern()
346 MachineInstr *Def = MRI->getVRegDef(MI->getOperand(1).getReg()); in elideCopies() local
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/MCA/
DInstruction.cpp196 if (!all_of(getDefs(), [](const WriteState &Def) { return Def.isReady(); })) in updatePending() argument
213 [](const WriteState &Def) { return !Def.getDependentWrite(); })) in updateDispatched() argument
235 for (WriteState &Def : getDefs()) in cycleEvent()
236 Def.cycleEvent(); in cycleEvent()
244 for (WriteState &Def : getDefs()) in cycleEvent()
245 Def.cycleEvent(); in cycleEvent()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Transforms/Utils/
DPredicateInfo.cpp104 Value *Def = nullptr; member
153 bool isADef = A.Def; in operator ()()
154 bool isBDef = B.Def; in operator ()()
164 if (!VD.Def && VD.U) { in getBlockEdge()
197 bool isADef = A.Def; in comparePHIRelated()
198 bool isBDef = B.Def; in comparePHIRelated()
199 assert((!A.Def || !A.U) && (!B.Def || !B.U) && in comparePHIRelated()
207 if (VD.Def) in getMiddleDef()
208 return VD.Def; in getMiddleDef()
227 const Instruction *getDefOrUser(const Value *Def, const Use *U) const { in getDefOrUser()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/TableGen/
DJSONBackend.cpp79 if (auto *Def = dyn_cast<DefInit>(&I)) { in translateInit() local
81 obj["def"] = Def->getDef()->getName(); in translateInit()
142 auto &Def = *D.second; in run() local
147 for (const RecordVal &RV : Def.getValues()) { in run()
148 if (!Def.isTemplateArg(RV.getNameInit())) { in run()
159 for (const auto &SuperPair : Def.getSuperClasses()) in run()
164 obj["!anonymous"] = Def.isAnonymous(); in run()
169 for (const auto &SuperPair : Def.getSuperClasses()) { in run()

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