Searched refs:DefRegs (Results 1 – 8 of 8) sorted by relevance
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/ |
| D | MachineCopyPropagation.cpp | 90 SmallVector<unsigned, 4> DefRegs; member
124 RegsToInvalidate.insert(I->second.DefRegs.begin(), in invalidateRegister()
125 I->second.DefRegs.end()); in invalidateRegister()
140 markRegsUnavailable(I->second.DefRegs, TRI); in clobberRegister()
167 if (!is_contained(Copy.DefRegs, Def)) in trackCopy()
168 Copy.DefRegs.push_back(Def); in trackCopy()
191 if (CI->second.DefRegs.size() != 1) in findCopyDefViaUnit()
193 MCRegUnitIterator RUI(CI->second.DefRegs[0], &TRI); in findCopyDefViaUnit()
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| D | LiveVariables.cpp | 513 SmallVector<unsigned, 4> DefRegs; in runOnInstr() local
535 DefRegs.push_back(MOReg); in runOnInstr()
554 for (unsigned i = 0, e = DefRegs.size(); i != e; ++i) { in runOnInstr()
555 unsigned MOReg = DefRegs[i]; in runOnInstr()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| D | AMDGPURegisterBankInfo.cpp | 1124 SmallVector<unsigned, 16> DefRegs(OpdMapper.getVRegs(0)); in applyMappingWideLoad() local
1175 for (unsigned DefIdx = 0, e = DefRegs.size(); DefIdx != e; ++DefIdx) { in applyMappingWideLoad()
1179 B.buildExtractVectorElement(DefRegs[DefIdx], TmpReg, IdxReg); in applyMappingWideLoad()
1589 SmallVector<Register, 2> DefRegs(OpdMapper.getVRegs(0)); in applyMappingImpl() local
1594 if (DefRegs.empty()) { in applyMappingImpl()
1610 setRegsToType(MRI, DefRegs, HalfTy); in applyMappingImpl()
1612 B.buildSelect(DefRegs[0], CondRegs[0], Src1Regs[0], Src2Regs[0]); in applyMappingImpl()
1613 B.buildSelect(DefRegs[1], CondRegs[0], Src1Regs[1], Src2Regs[1]); in applyMappingImpl()
1668 SmallVector<Register, 2> DefRegs(OpdMapper.getVRegs(0)); in applyMappingImpl() local
1673 if (DefRegs.empty()) { in applyMappingImpl()
[all …]
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/ |
| D | HexagonExpandCondsets.cpp | 469 std::set<RegisterRef> DefRegs; in updateDeadsInRange() local
479 DefRegs.insert(Op); in updateDeadsInRange()
499 if (!Op.isReg() || !DefRegs.count(Op)) in updateDeadsInRange()
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| D | HexagonConstPropagation.cpp | 2840 SmallVector<unsigned,2> DefRegs; in rewriteHexConstDefs() local
2849 DefRegs.push_back(R); in rewriteHexConstDefs()
2862 for (unsigned i = 0, n = DefRegs.size(); i < n; ++i) { in rewriteHexConstDefs()
2863 unsigned R = DefRegs[i]; in rewriteHexConstDefs()
2952 AllDefs = (ChangedNum == DefRegs.size()); in rewriteHexConstDefs()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/ |
| D | MipsInstrInfo.td | 1676 list<Register> DefRegs> :
1680 let Defs = DefRegs;
1712 list<Register> DefRegs> :
1715 let Defs = DefRegs;
1736 class MoveToLOHI<string opstr, RegisterOperand RO, list<Register> DefRegs>:
1739 let Defs = DefRegs;
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
| D | ARMISelLowering.cpp | 9982 DenseMap<unsigned, bool> DefRegs; in EmitSjLjDispatchBlock() local
9987 DefRegs[OI->getReg()] = true; in EmitSjLjDispatchBlock()
10002 if (!DefRegs[Reg]) in EmitSjLjDispatchBlock()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 32194 DenseMap<unsigned, bool> DefRegs; in EmitSjLjDispatchBlock() local
32197 DefRegs[MOp.getReg()] = true; in EmitSjLjDispatchBlock()
32202 if (!DefRegs[Reg]) in EmitSjLjDispatchBlock()
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