| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/ |
| D | LegalizeDAG.cpp | 4330 unsigned ExtOp, TruncOp; in PromoteNode() local
4332 ExtOp = ISD::BITCAST; in PromoteNode()
4339 ExtOp = ISD::ANY_EXTEND; in PromoteNode()
4343 ExtOp = ISD::SIGN_EXTEND; in PromoteNode()
4347 ExtOp = ISD::ZERO_EXTEND; in PromoteNode()
4353 Tmp1 = DAG.getNode(ExtOp, dl, NVT, Node->getOperand(0)); in PromoteNode()
4354 Tmp2 = DAG.getNode(ExtOp, dl, NVT, Node->getOperand(1)); in PromoteNode()
4363 unsigned ExtOp = Node->getOpcode() == ISD::UMUL_LOHI ? ISD::ZERO_EXTEND in PromoteNode() local
4365 Tmp1 = DAG.getNode(ExtOp, dl, NVT, Node->getOperand(0)); in PromoteNode()
4366 Tmp2 = DAG.getNode(ExtOp, dl, NVT, Node->getOperand(1)); in PromoteNode()
[all …]
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| D | DAGCombiner.cpp | 13176 unsigned ExtOp = IsInputSigned && IsOutputSigned ? ISD::SIGN_EXTEND in FoldIntToFPToInt() local
13178 return DAG.getNode(ExtOp, SDLoc(N), VT, Src); in FoldIntToFPToInt()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/ |
| D | HexagonConstExtenders.cpp | 1534 MachineOperand ExtOp(EV); in insertInitializer() local
1545 .add(ExtOp); in insertInitializer()
1551 .add(ExtOp); in insertInitializer()
1556 .add(ExtOp) in insertInitializer()
1562 .add(ExtOp); in insertInitializer()
1569 .add(ExtOp) in insertInitializer()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/ |
| D | BasicTTIImpl.h | 1377 unsigned ExtOp = variable
1381 Cost += 2 * ConcreteTTI->getCastInstrCost(ExtOp, ExtTy, RetTy);
1441 unsigned ExtOp = variable
1445 Cost += 2 * ConcreteTTI->getCastInstrCost(ExtOp, ExtTy, MulTy);
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| D | X86InstrSSE.td | 4973 SDNode ExtOp, SDNode InVecOp> {
4976 def : Pat<(v16i16 (ExtOp (v16i8 VR128:$src))),
4985 def : Pat<(v8i32 (ExtOp (v8i16 VR128:$src))),
4990 def : Pat<(v4i64 (ExtOp (v4i32 VR128:$src))),
4999 def : Pat<(v16i16 (ExtOp (loadv16i8 addr:$src))),
5020 def : Pat<(v8i32 (ExtOp (loadv8i16 addr:$src))),
5028 def : Pat<(v4i64 (ExtOp (loadv4i32 addr:$src))),
5048 SDNode ExtOp> {
5050 def : Pat<(v8i16 (ExtOp (v16i8 VR128:$src))),
5054 def : Pat<(v4i32 (ExtOp (v16i8 VR128:$src))),
[all …]
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| D | X86InstrAVX512.td | 9474 multiclass AVX512_pmovx_patterns_base<string OpcPrefix, SDNode ExtOp> {
9477 def : Pat<(v16i16 (ExtOp (loadv16i8 addr:$src))),
9482 def : Pat<(v8i32 (ExtOp (loadv8i16 addr:$src))),
9485 def : Pat<(v4i64 (ExtOp (loadv4i32 addr:$src))),
9491 def : Pat<(v32i16 (ExtOp (loadv32i8 addr:$src))),
9495 def : Pat<(v16i32 (ExtOp (loadv16i8 addr:$src))),
9497 def : Pat<(v16i32 (ExtOp (loadv16i16 addr:$src))),
9500 def : Pat<(v8i64 (ExtOp (loadv8i16 addr:$src))),
9503 def : Pat<(v8i64 (ExtOp (loadv8i32 addr:$src))),
9508 multiclass AVX512_pmovx_patterns<string OpcPrefix, SDNode ExtOp,
[all …]
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| D | X86ISelLowering.cpp | 17784 SDValue ExtOp = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, ExtVecVT, in InsertBitToMaskVector() local
17787 return DAG.getNode(ISD::TRUNCATE, dl, VecVT, ExtOp); in InsertBitToMaskVector()
35659 SDValue ExtOp = in SimplifyDemandedVectorEltsForTargetNode() local
35663 insertSubVector(UndefVec, ExtOp, 0, TLO.DAG, DL, ExtSizeInBits); in SimplifyDemandedVectorEltsForTargetNode()
35695 SDValue ExtOp = in SimplifyDemandedVectorEltsForTargetNode() local
35699 insertSubVector(UndefVec, ExtOp, 0, TLO.DAG, DL, ExtSizeInBits); in SimplifyDemandedVectorEltsForTargetNode()
35738 SDValue ExtOp = TLO.DAG.getNode(Opc, DL, ExtVT, Ext0, Ext1); in SimplifyDemandedVectorEltsForTargetNode() local
35741 insertSubVector(UndefVec, ExtOp, 0, TLO.DAG, DL, ExtSizeInBits); in SimplifyDemandedVectorEltsForTargetNode()
37160 SDValue ExtOp = DAG.getNode(OpCode, dl, MVT::i32, SrcOp, in combineExtractWithShuffle() local
37162 return DAG.getZExtOrTrunc(ExtOp, dl, VT); in combineExtractWithShuffle()
[all …]
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUCodeGenPrepare.cpp | 401 Value *ExtOp = Builder.CreateZExt(I.getOperand(0), I32Ty); in promoteUniformBitreverseToI32() local
402 Value *ExtRes = Builder.CreateCall(I32, { ExtOp }); in promoteUniformBitreverseToI32()
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| D | SIISelLowering.cpp | 9067 unsigned ExtOp = Signed ? ISD::SIGN_EXTEND : ISD::ZERO_EXTEND; in performIntMed3ImmCombine() local
9069 SDValue Tmp1 = DAG.getNode(ExtOp, SL, NVT, Op0->getOperand(0)); in performIntMed3ImmCombine()
9070 SDValue Tmp2 = DAG.getNode(ExtOp, SL, NVT, Op0->getOperand(1)); in performIntMed3ImmCombine()
9071 SDValue Tmp3 = DAG.getNode(ExtOp, SL, NVT, Op1); in performIntMed3ImmCombine()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/GlobalISel/ |
| D | MachineIRBuilder.cpp | 439 unsigned ExtOp = getBoolExtOp(getMRI()->getType(Op.getReg()).isVector(), IsFP); in buildBoolExt() local
440 return buildInstr(ExtOp, Res, Op); in buildBoolExt()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
| D | ARMInstrNEON.td | 3000 ValueType TyQ, ValueType TyD, SDPatternOperator IntOp, SDNode ExtOp,
3006 (TyQ (ExtOp (TyD (IntOp (TyD DPR:$Vn),
3090 ValueType TyQ, ValueType TyD, SDNode OpNode, SDNode ExtOp,
3095 [(set QPR:$Vd, (OpNode (TyQ (ExtOp (TyD DPR:$Vn))),
3096 (TyQ (ExtOp (TyD DPR:$Vm)))))]> {
3103 ValueType TyQ, ValueType TyD, SDPatternOperator IntOp, SDNode ExtOp,
3108 [(set QPR:$Vd, (TyQ (ExtOp (TyD (IntOp (TyD DPR:$Vn),
3157 SDNode OpNode, SDNode ExtOp, bit Commutable>
3162 (TyQ (ExtOp (TyD DPR:$Vm)))))]> {
3721 SDNode OpNode, SDNode ExtOp, bit Commutable = 0> {
[all …]
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| D | ARMISelLowering.cpp | 11276 unsigned ExtOp = VT.bitsGT(tmp.getValueType()) ? ISD::ANY_EXTEND : ISD::TRUNCATE; in AddCombineBUILD_VECTORToVPADDL() local
11277 return DAG.getNode(ExtOp, dl, VT, tmp); in AddCombineBUILD_VECTORToVPADDL()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Transforms/Scalar/ |
| D | IndVarSimplify.cpp | 1396 Value *ExtOp = createExtendInst(Op, WideType, Cmp->isSigned(), Cmp); in widenLoopCompare() local
1397 DU.NarrowUse->replaceUsesOfWith(Op, ExtOp); in widenLoopCompare()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/ |
| D | PPCISelLowering.cpp | 6063 unsigned ExtOp = Flags.isSExt() ? ISD::SIGN_EXTEND : ISD::ZERO_EXTEND; in LowerCall_64SVR4() local
6064 Arg = DAG.getNode(ExtOp, dl, MVT::i64, Arg); in LowerCall_64SVR4()
6626 unsigned ExtOp = Flags.isSExt() ? ISD::SIGN_EXTEND : ISD::ZERO_EXTEND; in LowerCall_Darwin() local
6627 Arg = DAG.getNode(ExtOp, dl, MVT::i64, Arg); in LowerCall_Darwin()
13190 ConstantSDNode *ExtOp = dyn_cast<ConstantSDNode>(Extract.getOperand(1)); in combineBVOfVecSExt() local
13191 if (!ExtOp) in combineBVOfVecSExt()
13194 Index = ExtOp->getZExtValue(); in combineBVOfVecSExt()
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