Searched refs:FMINNUM_IEEE (Results 1 – 17 of 17) sorted by relevance
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 658 FMINNUM_IEEE, FMAXNUM_IEEE, enumerator
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| D | TargetLowering.h | 2261 case ISD::FMINNUM_IEEE: in isCommutativeBinOp()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/Target/ |
| D | GenericOpcodes.td | 557 // FMINNUM_IEEE/FMAXNUM_IEEE - Perform floating-point minimum or maximum on
576 // as less than 0.0. While FMINNUM_IEEE/FMAXNUM_IEEE follow IEEE 754-2008
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| D | TargetSelectionDAG.td | 445 def fminnum_ieee : SDNode<"ISD::FMINNUM_IEEE", SDTFPBinOp,
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAGDumper.cpp | 186 case ISD::FMINNUM_IEEE: return "fminnum_ieee"; in getOperationName()
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| D | LegalizeVectorOps.cpp | 414 case ISD::FMINNUM_IEEE: in LegalizeOp()
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| D | LegalizeVectorTypes.cpp | 116 case ISD::FMINNUM_IEEE: in ScalarizeVectorResult()
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| D | TargetLowering.cpp | 6315 ISD::FMINNUM_IEEE : ISD::FMAXNUM_IEEE; in expandFMINNUM_FMAXNUM()
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| D | SelectionDAG.cpp | 4164 case ISD::FMINNUM_IEEE: in isKnownNeverNaN()
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| D | DAGCombiner.cpp | 8330 unsigned IEEEOpcode = (LHS == True) ? ISD::FMINNUM_IEEE : ISD::FMAXNUM_IEEE; in combineMinNumMaxNum()
8345 unsigned IEEEOpcode = (LHS == True) ? ISD::FMAXNUM_IEEE : ISD::FMINNUM_IEEE; in combineMinNumMaxNum()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| D | SIISelLowering.cpp | 422 setOperationAction(ISD::FMINNUM_IEEE, MVT::f32, Legal); in SITargetLowering()
424 setOperationAction(ISD::FMINNUM_IEEE, MVT::f64, Legal); in SITargetLowering()
604 setOperationAction(ISD::FMINNUM_IEEE, MVT::f16, Legal); in SITargetLowering()
606 setOperationAction(ISD::FMINNUM_IEEE, MVT::v4f16, Custom); in SITargetLowering()
629 setOperationAction(ISD::FMINNUM_IEEE, MVT::v2f16, Legal); in SITargetLowering()
724 setTargetDAGCombine(ISD::FMINNUM_IEEE); in SITargetLowering()
4101 case ISD::FMINNUM_IEEE: in LowerOperation()
8808 case ISD::FMINNUM_IEEE: in isCanonicalized()
9028 case ISD::FMINNUM_IEEE: in minMaxOpcToMin3Max3Opc()
9198 (Opc == ISD::FMINNUM_IEEE && Op0.getOpcode() == ISD::FMAXNUM_IEEE) || in performMinMaxCombine()
[all …]
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| D | AMDGPUISelLowering.cpp | 520 case ISD::FMINNUM_IEEE: in fnegFoldsIntoOp()
3651 return ISD::FMINNUM_IEEE; in inverseMinMax()
3652 case ISD::FMINNUM_IEEE: in inverseMinMax()
3766 case ISD::FMINNUM_IEEE: in performFNegCombine()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/ |
| D | TargetLoweringBase.cpp | 641 setOperationAction(ISD::FMINNUM_IEEE, VT, Expand); in initActions()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/PowerPC/ |
| D | PPCGenFastISel.inc | 2149 // FastEmit functions for ISD::FMINNUM_IEEE.
3288 …case ISD::FMINNUM_IEEE: return fastEmit_ISD_FMINNUM_IEEE_rr(VT, RetVT, Op0, Op0IsKill, Op1, Op1IsK…
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| D | PPCGenDAGISel.inc | 37573 /* 95732*/ /*SwitchOpcode*/ 25|128,2/*281*/, TARGET_VAL(ISD::FMINNUM_IEEE),// ->96017
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/ |
| D | PPCISelLowering.cpp | 565 setOperationAction(ISD::FMINNUM_IEEE, MVT::f64, Legal); in PPCTargetLowering()
566 setOperationAction(ISD::FMINNUM_IEEE, MVT::f32, Legal); in PPCTargetLowering()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 37237 case ISD::FMINNUM_IEEE: in scalarizeExtEltFP()
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