Searched refs:FMOV (Results 1 – 15 of 15) sorted by relevance
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
D | AArch64SchedExynosM3.td | 551 def : InstRW<[M3WriteNALU1], (instregex "^FMOV[DS][ir]")>; 556 def : InstRW<[M3WriteNALU1], (instregex "^FMOV[WX][DS]r")>; 557 def : InstRW<[M3WriteNALU1], (instregex "^FMOV[DS][WX]r")>; 558 def : InstRW<[M3WriteNEONI], (instregex "^FMOV(DX|XD)Highr")>;
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D | AArch64SchedExynosM5.td | 721 def : InstRW<[M5WriteNALU1], (instregex "^FMOV[HSD]i")>; 722 def : InstRW<[M5WriteNALU2], (instregex "^FMOV[HSD]r")>; 723 def : InstRW<[M5WriteSA], (instregex "^FMOV[WX][HSD]r")>; 724 def : InstRW<[M5WriteFCVTA], (instregex "^FMOV[HSD][WX]r")>;
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D | AArch64SchedFalkorDetails.td | 1149 def : InstRW<[FalkorWr_FMOV], (instregex "^FMOV(WS|XD|XDHigh)r$")>; 1150 def : InstRW<[FalkorWr_1GTOV_0cyc], (instregex "^FMOV(S|D)i$")>; // imm fwd 1153 def : InstRW<[FalkorWr_1VTOG_1cyc], (instregex "^FMOV(SW|DX|DXHigh)r$")>; 1154 def : InstRW<[FalkorWr_1VXVY_0cyc], (instregex "^FMOV(Sr|Dr|v.*_ns)$")>; // imm fwd
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D | AArch64SchedExynosM4.td | 664 def : InstRW<[M4WriteNALU1], (instregex "^FMOV[HSD][ir]")>; 665 def : InstRW<[M4WriteSA], (instregex "^FMOV[WX][HSD]r")>; 666 def : InstRW<[M4WriteNEONJ], (instregex "^FMOV[HSD][WX]r")>;
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D | AArch64ISelLowering.h | 85 FMOV, enumerator
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D | AArch64SchedKryoDetails.td | 861 (instregex "FMOV(XDHigh|DXHigh|DX)r")>; 867 (instregex "FMOV(Di|Dr|Si|Sr|SWr|WSr|XDr|v.*_ns)")>;
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D | AArch64InstrInfo.td | 452 def AArch64fmov : SDNode<"AArch64ISD::FMOV", SDT_AArch64MOVIedit>; 3392 defm FMOV : UnscaledConversion<"fmov">; 3394 // Add pseudo ops for FMOV 0 so we can mark them as isReMaterializable 3420 defm FMOV : SingleOperandFPData<0b0000, "fmov">; 3622 defm FMOV : FPMoveImmediate<"fmov">; 5356 // AdvSIMD FMOV 7207 // EXTRACT_SUBREG instruction, which will become FMOV. This is easier for the
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D | AArch64ISelLowering.cpp | 1271 case AArch64ISD::FMOV: return "AArch64ISD::FMOV"; in getTargetNodeName() 7839 (NewOp = tryAdvSIMDModImmFP(AArch64ISD::FMOV, Op, DAG, DefBits))) in ConstantBuildVector() 7854 (NewOp = tryAdvSIMDModImmFP(AArch64ISD::FMOV, Op, DAG, DefBits))) in ConstantBuildVector()
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D | AArch64InstrFormats.td | 4558 // Unscaled integer <-> floating point conversion (i.e. FMOV)
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/third_party/mesa3d/src/gallium/drivers/vc4/ |
D | vc4_qir.h | 672 QIR_ALU1(FMOV) in QIR_ALU1() argument
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/ |
D | MicroMipsInstrFPU.td | 162 defm FMOV : ABSS_MMM<"mov.d", II_MOV_D>, ABS_FM_MM<1, 0x1>;
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D | MipsInstrFPU.td | 560 defm FMOV : ABSS_M<"mov.d", II_MOV_D>, ABSS_FM<0x6, 17>, ISA_MIPS1;
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/third_party/mesa3d/src/broadcom/compiler/ |
D | v3d_compiler.h | 1397 VIR_M_ALU1(FMOV) in VIR_A_ALU2()
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/third_party/pcre2/pcre2/src/sljit/ |
D | sljitNativeARM_64.c | 95 #define FMOV 0x1e604000 macro 1612 FAIL_IF(push_inst(compiler, (FMOV ^ inv_bits) | VD(dst_r) | VN(src))); in sljit_emit_fop1()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/AArch64/ |
D | AArch64GenFastISel.inc | 11254 // FastEmit functions for AArch64ISD::FMOV. 11372 case AArch64ISD::FMOV: return fastEmit_AArch64ISD_FMOV_i_Predicate_imm0_255(VT, RetVT, imm0);
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