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Searched refs:FMULS (Results 1 – 20 of 20) sorted by relevance

/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AVR/
DAVRInstrFormats.td280 // 0b10 for FMULS
DAVRInstrInfo.td578 def FMULS : FFMULRdRr<0b10,
/third_party/pcre2/pcre2/src/sljit/
DsljitNativeSPARC_common.c152 #define FMULS (OPC1(0x2) | OPC3(0x34) | DOP(0x49)) macro
1331 …FAIL_IF(push_inst(compiler, SELECT_FOP(op, FMULS, FMULD) | FD(dst_r) | FS1(src1) | FS2(src2), MOVA… in sljit_emit_fop2()
DsljitNativePPC_common.c179 #define FMULS (HI(59) | LO(25)) macro
1990 …FAIL_IF(push_inst(compiler, SELECT_FOP(op, FMULS, FMUL) | FD(dst_r) | FA(src1) | FC(src2) /* FMUL … in sljit_emit_fop2()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/
DX86IntrinsicsInfo.h633 X86ISD::FMULS, X86ISD::FMULS_RND),
635 X86ISD::FMULS, X86ISD::FMULS_RND),
DX86ISelLowering.h209 FMUL_RND, FMULS, FMULS_RND, enumerator
DX86InstrFragmentsSIMD.td511 def X86fmuls : SDNode<"X86ISD::FMULS", SDTFPBinOp>;
DX86ISelLowering.cpp29873 case X86ISD::FMULS: return "X86ISD::FMULS"; in getTargetNodeName()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/
DP9InstrResources.td426 FMULS,
DPPCInstrInfo.cpp240 case PPC::FMULS: in isAssociativeAndCommutative()
DPPCInstrInfo.td3017 defm FMULS : AForm_3r<59, 25,
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/PowerPC/
DPPCGenMCCodeEmitter.inc945 UINT64_C(3959423026), // FMULS
3500 case PPC::FMULS:
7355 CEFBS_None, // FMULS = 932
DPPCGenFastISel.inc2179 return fastEmitInst_rr(PPC::FMULS, &PPC::F4RCRegClass, Op0, Op0IsKill, Op1, Op1IsKill);
DPPCGenInstrInfo.inc947 FMULS = 932,
3916 …Commutable), 0x18ULL, ImplicitList18, nullptr, OperandInfo111, -1 ,nullptr }, // Inst #932 = FMULS
12652 { PPC::FMULS_rec, PPC::FMULS },
12854 { PPC::FMULS, PPC::FMULS_rec },
DPPCGenAsmWriter.inc2600 25909U, // FMULS
4891 38U, // FMULS
DPPCGenDisassemblerTables.inc2424 /* 11324 */ MCD::OPC_Decode, 164, 7, 128, 1, // Opcode: FMULS
DPPCGenAsmMatcher.inc5684 …{ 6011 /* fmuls */, PPC::FMULS, Convert__RegF4RC1_0__RegF4RC1_1__RegF4RC1_2, AMFBS_None, { MCK_Reg…
DPPCGenDAGISel.inc38394 /* 97347*/ OPC_MorphNodeTo1, TARGET_VAL(PPC::FMULS), 0,
38397 // Dst: (FMULS:{ *:[f32] } f32:{ *:[f32] }:$FRA, f32:{ *:[f32] }:$FRC)
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Sparc/
DSparcInstrInfo.td1243 def FMULS : F3_3<2, 0b110100, 0b001001001,
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/X86/
DX86GenFastISel.inc12042 // FastEmit functions for X86ISD::FMULS.
15172 case X86ISD::FMULS: return fastEmit_X86ISD_FMULS_rr(VT, RetVT, Op0, Op0IsKill, Op1, Op1IsKill);